diff options
| author | Shawn Guo <shawn.guo@freescale.com> | 2014-09-01 14:29:53 +0800 |
|---|---|---|
| committer | Shawn Guo <shawn.guo@freescale.com> | 2014-09-16 10:06:48 +0800 |
| commit | e90f41990dce3557e345410ef33b0a47e8cb49fc (patch) | |
| tree | f01f3cfc4d7c27959d17797f9c78884615ba166b /include | |
| parent | b1f156db47ae914a308488ce28e84f3d4ad4f667 (diff) | |
ARM: imx6sl: add BYPASS support for PLL clocks
This is the same change for imx6sl clock driver as "ARM: imx6q: add BYPASS
support for PLL clocks" for imx6q. The difference is that only anaclk1
is available on imx6sl.
Signed-off-by: Shawn Guo <shawn.guo@freescale.com>
Diffstat (limited to 'include')
| -rw-r--r-- | include/dt-bindings/clock/imx6sl-clock.h | 27 |
1 files changed, 26 insertions, 1 deletions
diff --git a/include/dt-bindings/clock/imx6sl-clock.h b/include/dt-bindings/clock/imx6sl-clock.h index b91dd462ba85..f10a928fe2dd 100644 --- a/include/dt-bindings/clock/imx6sl-clock.h +++ b/include/dt-bindings/clock/imx6sl-clock.h @@ -146,6 +146,31 @@ #define IMX6SL_CLK_PLL4_AUDIO_DIV 133 #define IMX6SL_CLK_SPBA 134 #define IMX6SL_CLK_ENET 135 -#define IMX6SL_CLK_END 136 +#define IMX6SL_CLK_LVDS1_SEL 136 +#define IMX6SL_CLK_LVDS1_OUT 137 +#define IMX6SL_CLK_LVDS1_IN 138 +#define IMX6SL_CLK_ANACLK1 139 +#define IMX6SL_PLL1_BYPASS_SRC 140 +#define IMX6SL_PLL2_BYPASS_SRC 141 +#define IMX6SL_PLL3_BYPASS_SRC 142 +#define IMX6SL_PLL4_BYPASS_SRC 143 +#define IMX6SL_PLL5_BYPASS_SRC 144 +#define IMX6SL_PLL6_BYPASS_SRC 145 +#define IMX6SL_PLL7_BYPASS_SRC 146 +#define IMX6SL_CLK_PLL1 147 +#define IMX6SL_CLK_PLL2 148 +#define IMX6SL_CLK_PLL3 149 +#define IMX6SL_CLK_PLL4 150 +#define IMX6SL_CLK_PLL5 151 +#define IMX6SL_CLK_PLL6 152 +#define IMX6SL_CLK_PLL7 153 +#define IMX6SL_PLL1_BYPASS 154 +#define IMX6SL_PLL2_BYPASS 155 +#define IMX6SL_PLL3_BYPASS 156 +#define IMX6SL_PLL4_BYPASS 157 +#define IMX6SL_PLL5_BYPASS 158 +#define IMX6SL_PLL6_BYPASS 159 +#define IMX6SL_PLL7_BYPASS 160 +#define IMX6SL_CLK_END 161 #endif /* __DT_BINDINGS_CLOCK_IMX6SL_H */ |