diff options
| author | Anson Huang <b20788@freescale.com> | 2015-03-16 13:08:06 +0800 |
|---|---|---|
| committer | Jason Liu <r64343@freescale.com> | 2015-05-08 17:22:32 +0800 |
| commit | 47c4180c8210d639bd140c85b975b85d4d38d67a (patch) | |
| tree | b74302e9a8a99495b0d0b7a6fa8b8fcb3d85faac /include | |
| parent | e89472429091967bfa4a09ed08220d64d814b3ad (diff) | |
MLK-10430 ARM: imx: use IOMUX IRQ to make GPC state machine correct on imx7d
When ARM is waked up from WFI by irq number which < 32, GPC state
machine may keep ARM WFI signal available for next time entering
low power mode, so the issue is when we just set the low power mode
in GPC, ARM is still executing instructions, whenever GPC's low power
mode is enabled, the whole system is forced into low power mode, this
is unexpected, low power mode should only be entered when ARM is in WFI.
To fix this issue, we should make sure the last wakeup irq is from our
SOC platform, the irq number should be >= 32, so here we force the IOMUX
irq to be always pending by setting bit 12 of IOMUX_GPR1, then whenever
we set the low power mode in GPC, we should unmask it in GPC first then
mask it back, it will clean all previous internal logics in GPC low power
mode.
Signed-off-by: Anson Huang <b20788@freescale.com>
Diffstat (limited to 'include')
| -rw-r--r-- | include/linux/mfd/syscon/imx7-iomuxc-gpr.h | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/include/linux/mfd/syscon/imx7-iomuxc-gpr.h b/include/linux/mfd/syscon/imx7-iomuxc-gpr.h index 24089a026af8..dd00de556ce8 100644 --- a/include/linux/mfd/syscon/imx7-iomuxc-gpr.h +++ b/include/linux/mfd/syscon/imx7-iomuxc-gpr.h @@ -36,6 +36,7 @@ #define IOMUXC_GPR22 0x58 /* For imx7d iomux gpr register field define */ +#define IMX7D_GPR1_IRQ_MASK (0x1 << 12) #define IMX7D_GPR1_ENET1_TX_CLK_SEL_MASK (0x1 << 13) #define IMX7D_GPR1_ENET2_TX_CLK_SEL_MASK (0x1 << 14) #define IMX7D_GPR1_ENET_TX_CLK_SEL_MASK (0x3 << 13) |