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| author | Liu Ying <Ying.Liu@freescale.com> | 2011-05-24 09:58:49 +0800 |
|---|---|---|
| committer | Liu Ying <Ying.Liu@freescale.com> | 2011-05-24 10:16:27 +0800 |
| commit | 4f93e8429c9c53c0f89bcbd24e006e43948b847e (patch) | |
| tree | 850c39edcd66ea06d900cf60cb164a5a64af5a8d /include | |
| parent | 66f5efcf76144ca6f054e73dd0c10e2e7e5a4014 (diff) | |
ENGR00142551-1 IPUv3:Support triple buffer
This patch supports IPUv3 triple buffer.
Only channel 23, 27 and 28 are tested.
Test was done on MX51 BBG and MX53 SMD.
IPUv1 interface is changed accordingly
to pass building.
Signed-off-by: Liu Ying <Ying.Liu@freescale.com>
(cherry picked from commit 73ef4408712acfee2d132f73555085a61be7b17c)
Diffstat (limited to 'include')
| -rw-r--r-- | include/linux/ipu.h | 2 |
1 files changed, 2 insertions, 0 deletions
diff --git a/include/linux/ipu.h b/include/linux/ipu.h index 768ec3de9937..64428ab7cb77 100644 --- a/include/linux/ipu.h +++ b/include/linux/ipu.h @@ -887,6 +887,7 @@ int32_t ipu_init_channel_buffer(ipu_channel_t channel, ipu_buffer_t type, uint32_t stride, ipu_rotate_mode_t rot_mode, dma_addr_t phyaddr_0, dma_addr_t phyaddr_1, + dma_addr_t phyaddr_2, uint32_t u_offset, uint32_t v_offset); int32_t ipu_update_channel_buffer(ipu_channel_t channel, ipu_buffer_t type, @@ -1081,6 +1082,7 @@ typedef struct _ipu_channel_buf_parm { ipu_rotate_mode_t rot_mode; dma_addr_t phyaddr_0; dma_addr_t phyaddr_1; + dma_addr_t phyaddr_2; uint32_t u_offset; uint32_t v_offset; uint32_t bufNum; |