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authorAnson Huang <b20788@freescale.com>2013-08-12 17:13:52 -0400
committerJason Liu <r64343@freescale.com>2013-08-23 07:30:13 +0800
commit444c63854ddbbb32e45761f4b9eeba420b1d9fcd (patch)
treebef3533a0a1ef50e5d8c99b1411b33af125f6c6d /include
parent04efe508880039034d9c1a701b67d3f0be2be04b (diff)
ENGR00274768-1 ARM: imx6q: update gint bit definitions of IOMUXC_GPR1
Need to use IOMUXC_GPR1_GINT bit for cpuidle driver, so update this bit's definitions. Signed-off-by: Anson Huang <b20788@freescale.com>
Diffstat (limited to 'include')
-rw-r--r--include/linux/mfd/syscon/imx6q-iomuxc-gpr.h6
1 files changed, 4 insertions, 2 deletions
diff --git a/include/linux/mfd/syscon/imx6q-iomuxc-gpr.h b/include/linux/mfd/syscon/imx6q-iomuxc-gpr.h
index b6bdcd66c07d..98a9f2ac8b7a 100644
--- a/include/linux/mfd/syscon/imx6q-iomuxc-gpr.h
+++ b/include/linux/mfd/syscon/imx6q-iomuxc-gpr.h
@@ -1,5 +1,5 @@
/*
- * Copyright (C) 2012 Freescale Semiconductor, Inc.
+ * Copyright (C) 2012-2013 Freescale Semiconductor, Inc.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 as
@@ -122,7 +122,9 @@
#define IMX6Q_GPR1_USB_OTG_ID_SEL_MASK BIT(13)
#define IMX6Q_GPR1_USB_OTG_ID_SEL_ENET_RX_ER 0x0
#define IMX6Q_GPR1_USB_OTG_ID_SEL_GPIO_1 BIT(13)
-#define IMX6Q_GPR1_GINT BIT(12)
+#define IMX6Q_GPR1_GINT_MASK BIT(12)
+#define IMX6Q_GPR1_GINT_CLEAR 0x0
+#define IMX6Q_GPR1_GINT_ASSERT BIT(12)
#define IMX6Q_GPR1_ADDRS3_MASK (0x3 << 10)
#define IMX6Q_GPR1_ADDRS3_32MB (0x0 << 10)
#define IMX6Q_GPR1_ADDRS3_64MB (0x1 << 10)