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| author | Colin Ian King <colin.king@canonical.com> | 2019-10-23 12:28:09 +0100 |
|---|---|---|
| committer | Greg Kroah-Hartman <gregkh@linuxfoundation.org> | 2019-12-05 15:36:52 +0100 |
| commit | 7086d6a65075d96c203a03d464bd439fd81160e5 (patch) | |
| tree | cdad131b6418e0db9ae5136736578be48641e402 /lib | |
| parent | ae3883adf0b73a9b0fec533ce023195ec5348dc2 (diff) | |
clk: sunxi-ng: a80: fix the zero'ing of bits 16 and 18
[ Upstream commit cdfc2e2086bf9c465f44e2db25561373b084a113 ]
The zero'ing of bits 16 and 18 is incorrect. Currently the code
is masking with the bitwise-and of BIT(16) & BIT(18) which is
0, so the updated value for val is always zero. Fix this by bitwise
and-ing value with the correct mask that will zero bits 16 and 18.
Addresses-Coverity: (" Suspicious &= or |= constant expression")
Fixes: b8eb71dcdd08 ("clk: sunxi-ng: Add A80 CCU")
Signed-off-by: Colin Ian King <colin.king@canonical.com>
Signed-off-by: Maxime Ripard <mripard@kernel.org>
Signed-off-by: Sasha Levin <sashal@kernel.org>
Diffstat (limited to 'lib')
0 files changed, 0 insertions, 0 deletions