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authorAlex Williamson <alex.williamson@hp.com>2005-09-06 11:20:49 -0600
committerTony Luck <tony.luck@intel.com>2005-09-14 16:22:11 -0700
commit0b9afede3d9c66fef06f1d5ef5ff15c4b97730fc (patch)
tree95f55e1219eed9c3fd2458ddbf960307c631114e /lib
parent1619cca2921f6927f4240e03f413d4165c7002fc (diff)
[IA64] more robust zx1/sx1000 machvec support
Machine vector selection has always been a bit of a hack given how early in system boot it needs to be done. Services like ACPI namespace are not available and there are non-trivial problems to moving them to early boot. However, there's no reason we can't change to a different machvec later in boot when the services we need are available. By adding a entry point for later initialization of the swiotlb, we can add an error path for the hpzx1 machevec initialization and fall back to the DIG machine vector if IOMMU hardware isn't found in the system. Since ia64 uses 4GB for zone DMA (no ISA support), it's trivial to allocate a contiguous range from the slab for bounce buffer usage. Signed-off-by: Alex Williamson <alex.williamson@hp.com> Signed-off-by: Tony Luck <tony.luck@intel.com>
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