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authorJay Agarwal <jagarwal@nvidia.com>2012-08-16 18:08:12 +0530
committerSimone Willett <swillett@nvidia.com>2012-08-27 17:30:39 -0700
commit812e6d344d35d7ef6df9ccbeed5f6a65c53e7977 (patch)
treec457dd2721a4223ad988d962b5ee0fcf96ed6c24 /sound/soc/codecs/aic326x_tiload.c
parentce8ef677d55d74149d75a0ccf8e3b493bf68e110 (diff)
arm: tegra: pcie: WAR to avoid hang on PCIe device
Setting DFPCI_RSPPASSPW bit in AFI_CONFIGURATION register to avoid instant hang on CPU read/write while gpu transfers are in progress. Bug 1034443 Change-Id: I40c99588753b8b2cb2d418b54c6ac73f7b8ddc13 Signed-off-by: Jay Agarwal <jagarwal@nvidia.com> Reviewed-on: http://git-master/r/124037 Reviewed-by: Simone Willett <swillett@nvidia.com> Tested-by: Simone Willett <swillett@nvidia.com>
Diffstat (limited to 'sound/soc/codecs/aic326x_tiload.c')
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