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authorMark Brown <broonie@opensource.wolfsonmicro.com>2010-08-13 19:05:04 +0100
committerMark Brown <broonie@opensource.wolfsonmicro.com>2010-08-15 14:52:12 +0100
commitc5607d8e7a4c30d2ff62b8eefe3f977d5c71d2fe (patch)
tree4bcb668243cacfabcb9d58076911093391dbd94b /sound/soc/codecs/wm8580.h
parent8ef339df25ed424e7430fd411a52840c6af368c6 (diff)
ASoC: Automatically calculate clock ratio for WM8580
Implement set_sysclk() and then rather than assuming 256fs use the supplied value to calculate and configure the clock ratio for the currently used sample rate. As a side effect we also end up implementing clock selection for the ADC path. In order to avoid confusion remove the existing set_clkdiv() based configuration of the clock source for the DAC and update the SMDK64xx driver (which is the only in-tree user of the CODEC). Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com> Acked-by: Liam Girdwood <lrg@slimlogic.co.uk>
Diffstat (limited to 'sound/soc/codecs/wm8580.h')
-rw-r--r--sound/soc/codecs/wm8580.h14
1 files changed, 7 insertions, 7 deletions
diff --git a/sound/soc/codecs/wm8580.h b/sound/soc/codecs/wm8580.h
index 8328ef667593..1d34656d0dcb 100644
--- a/sound/soc/codecs/wm8580.h
+++ b/sound/soc/codecs/wm8580.h
@@ -19,14 +19,14 @@
#define WM8580_PLLB 2
#define WM8580_MCLK 1
-#define WM8580_DAC_CLKSEL 2
-#define WM8580_CLKOUTSRC 3
+#define WM8580_CLKOUTSRC 2
-#define WM8580_CLKSRC_MCLK 1
-#define WM8580_CLKSRC_PLLA 2
-#define WM8580_CLKSRC_PLLB 3
-#define WM8580_CLKSRC_OSC 4
-#define WM8580_CLKSRC_NONE 5
+#define WM8580_CLKSRC_MCLK 1
+#define WM8580_CLKSRC_PLLA 2
+#define WM8580_CLKSRC_PLLB 3
+#define WM8580_CLKSRC_OSC 4
+#define WM8580_CLKSRC_NONE 5
+#define WM8580_CLKSRC_ADCMCLK 6
#define WM8580_DAI_PAIFRX 0
#define WM8580_DAI_PAIFTX 1