diff options
| author | Nikesh Oswal <noswal@nvidia.com> | 2012-03-14 17:48:09 +0530 |
|---|---|---|
| committer | Simone Willett <swillett@nvidia.com> | 2012-03-23 14:00:51 -0700 |
| commit | c7b93d42d9943b40774d9f3405f89dd74740e2ee (patch) | |
| tree | 7b93783b30d9a16961f43cc86212f4f054b871be /sound/soc/codecs | |
| parent | 62e8fcd20e27244fcb532e0de9ef86bb66ae83b1 (diff) | |
asoc: codecs: max98088: check for revision id
check for revision id, it must be 0x40 as per the datasheet,
if its not 0x40 then dont allow the card to register by failing
in the codec probe. This functionality will be required when the
same board support multiple codecs. Also register the irq only
after validating the codec.
Change-Id: I8553b85d534428c7137ec2d03e2f814b898609a6
Signed-off-by: Nikesh Oswal <noswal@nvidia.com>
Reviewed-on: http://git-master/r/90061
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Scott Peterson <speterson@nvidia.com>
Diffstat (limited to 'sound/soc/codecs')
| -rw-r--r-- | sound/soc/codecs/max98088.c | 17 |
1 files changed, 9 insertions, 8 deletions
diff --git a/sound/soc/codecs/max98088.c b/sound/soc/codecs/max98088.c index cee6354656e7..e2ad10d2deaa 100644 --- a/sound/soc/codecs/max98088.c +++ b/sound/soc/codecs/max98088.c @@ -2073,6 +2073,15 @@ static int max98088_probe(struct snd_soc_codec *codec) max98088->mic1pre = 0; max98088->mic2pre = 0; + ret = snd_soc_read(codec, M98088_REG_FF_REV_ID); + if (ret != 0x40) { + dev_err(codec->dev, "Failed to read device revision: %d\n", + ret); + ret = -ENODEV; + goto err_access; + } + dev_info(codec->dev, "revision %c\n", ret + 'A'); + if (max98088->irq) { /* register an audio interrupt */ ret = request_threaded_irq(max98088->irq, NULL, @@ -2085,14 +2094,6 @@ static int max98088_probe(struct snd_soc_codec *codec) } } - ret = snd_soc_read(codec, M98088_REG_FF_REV_ID); - if (ret < 0) { - dev_err(codec->dev, "Failed to read device revision: %d\n", - ret); - goto err_access; - } - dev_info(codec->dev, "revision %c\n", ret + 'A'); - snd_soc_write(codec, M98088_REG_51_PWR_SYS, M98088_PWRSV); /* initialize registers cache to hardware default */ |