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authorNikesh Oswal <noswal@nvidia.com>2011-12-13 15:10:28 +0530
committerVarun Wadekar <vwadekar@nvidia.com>2011-12-15 12:11:53 +0530
commitc7eca96f46f1162893f1031d406e22d2e20b061a (patch)
treee4b48cbea1c90cf2235f5b93f72823be03e51872 /sound/soc/tegra/tegra20_spdif.h
parente3794ce5d5d055f9e7939874297e0fe12e41e619 (diff)
asoc: tegra: restore i2s/das/spdif registers after suspend for t20
when system resumes from suspend state the i2s/das/spdif registers have power on reset values, this change restores the registers with their prior values from cache Bug: 904530 Change-Id: I35c14d95d2d6bf5bc116a1a80e21f4904c8969e5 Signed-off-by: Nikesh Oswal <noswal@nvidia.com> Reviewed-on: http://git-master/r/69715 Reviewed-by: Automatic_Commit_Validation_User Reviewed-by: Sumit Bhattacharya <sumitb@nvidia.com> Reviewed-by: Scott Peterson <speterson@nvidia.com>
Diffstat (limited to 'sound/soc/tegra/tegra20_spdif.h')
-rw-r--r--sound/soc/tegra/tegra20_spdif.h8
1 files changed, 8 insertions, 0 deletions
diff --git a/sound/soc/tegra/tegra20_spdif.h b/sound/soc/tegra/tegra20_spdif.h
index 1938aa67917f..c1fb6ed2a79f 100644
--- a/sound/soc/tegra/tegra20_spdif.h
+++ b/sound/soc/tegra/tegra20_spdif.h
@@ -535,6 +535,10 @@
* This 4-word deep FIFO transmits user FIFO field information. The order of
* transmission is from LSB to MSB bit.
*/
+#ifdef CONFIG_PM
+#define TEGRA20_SPDIF_CTRL_CACHE_SIZE ((TEGRA20_SPDIF_DATA_FIFO_CSR >> 2) + 1)
+#define TEGRA20_SPDIF_TX_CACHE_SIZE (((TEGRA20_SPDIF_CH_STA_TX_F - TEGRA20_SPDIF_CH_STA_TX_A) >> 2) + 1)
+#endif
struct tegra20_spdif {
struct clk *clk_spdif_out;
@@ -543,6 +547,10 @@ struct tegra20_spdif {
void __iomem *regs;
struct dentry *debug;
u32 reg_ctrl;
+#ifdef CONFIG_PM
+ u32 reg_ctrl_cache[TEGRA20_SPDIF_CTRL_CACHE_SIZE];
+ u32 reg_tx_cache[TEGRA20_SPDIF_TX_CACHE_SIZE];
+#endif
};
#endif