diff options
| author | Nikesh Oswal <noswal@nvidia.com> | 2011-11-18 14:59:12 +0530 |
|---|---|---|
| committer | Dan Willemsen <dwillemsen@nvidia.com> | 2011-11-30 21:50:23 -0800 |
| commit | ab8abd6275cfe826002956d13a72d290ae344474 (patch) | |
| tree | dee88307d894907f8894e97d2db1786003230f18 /sound/soc/tegra/tegra30_ahub.c | |
| parent | 9f655d719048c0eda67e041f365325f07ac0eef5 (diff) | |
asoc: tegra: add power management functionality in t30 drivers
add code for handling register save/restore and clocks
disable/enable during suspend/resume
Bug: 862023
Change-Id: I1b709b6bf674c9a2d93c2a21c1f44bbadff64aab
Signed-off-by: Nikesh Oswal <noswal@nvidia.com>
Reviewed-on: http://git-master/r/65478
Reviewed-by: Sumit Bhattacharya <sumitb@nvidia.com>
Reviewed-by: Scott Peterson <speterson@nvidia.com>
Rebase-Id: R2383486dac0892e317dbd25044df59284031b6c4
Diffstat (limited to 'sound/soc/tegra/tegra30_ahub.c')
| -rw-r--r-- | sound/soc/tegra/tegra30_ahub.c | 36 |
1 files changed, 36 insertions, 0 deletions
diff --git a/sound/soc/tegra/tegra30_ahub.c b/sound/soc/tegra/tegra30_ahub.c index 8ee96bca2aff..866474a962b3 100644 --- a/sound/soc/tegra/tegra30_ahub.c +++ b/sound/soc/tegra/tegra30_ahub.c @@ -39,6 +39,9 @@ static struct tegra30_ahub *ahub; static inline void tegra30_apbif_write(u32 reg, u32 val) { +#ifdef CONFIG_PM + ahub->apbif_reg_cache[reg >> 2] = val; +#endif __raw_writel(val, ahub->apbif_regs + reg); } @@ -49,6 +52,9 @@ static inline u32 tegra30_apbif_read(u32 reg) static inline void tegra30_audio_write(u32 reg, u32 val) { +#ifdef CONFIG_PM + ahub->ahub_reg_cache[reg >> 2] = val; +#endif __raw_writel(val, ahub->audio_regs + reg); } @@ -57,6 +63,36 @@ static inline u32 tegra30_audio_read(u32 reg) return __raw_readl(ahub->audio_regs + reg); } +#ifdef CONFIG_PM +int tegra30_ahub_apbif_resume() +{ + int i = 0; + int cache_idx_rsvd; + + tegra30_ahub_enable_clocks(); + + /*restore ahub regs*/ + for (i = 0; i < TEGRA30_AHUB_AUDIO_RX_COUNT; i++) + tegra30_audio_write(i<<2, ahub->ahub_reg_cache[i]); + + /*restore apbif regs*/ + cache_idx_rsvd = TEGRA30_APBIF_CACHE_REG_INDEX_RSVD; + for (i = 0; i < TEGRA30_APBIF_CACHE_REG_COUNT; i++) { + if (i == cache_idx_rsvd) { + cache_idx_rsvd += + TEGRA30_APBIF_CACHE_REG_INDEX_RSVD_STRIDE; + continue; + } + + tegra30_apbif_write(i<<2, ahub->apbif_reg_cache[i]); + } + + tegra30_ahub_disable_clocks(); + + return 0; +} +#endif + /* * clk_apbif isn't required for a theoretical I2S<->I2S configuration where * no PCM data is read from or sent to memory. However, that's an unlikely |