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authorNicolin Chen <Guangyu.Chen@freescale.com>2014-06-24 14:44:18 +0800
committerNitin Garg <nitin.garg@freescale.com>2015-01-15 21:17:59 -0600
commit2d0cc419474c35dfdec76b0363ff65c15fa103a2 (patch)
treee402d9813d06e13b34b1462bc4cd35b39e83d774 /sound
parent1dd5ad6b2ad9055ce825786f751dbde9ef3ff399 (diff)
ENGR00320241 ASoC: fsl_spdif: Complete the volatile register list
Not only SIS but also other read-only or write-only reigsters should be marked as volatile register so as not to let regcache cache them. So this patch just adds those missing registers. Signed-off-by: Nicolin Chen <Guangyu.Chen@freescale.com> (cherry picked from commit 56ad235ba23274fc05422ad4b13153d1c56801c4)
Diffstat (limited to 'sound')
-rw-r--r--sound/soc/fsl/fsl_spdif.c9
1 files changed, 9 insertions, 0 deletions
diff --git a/sound/soc/fsl/fsl_spdif.c b/sound/soc/fsl/fsl_spdif.c
index b18269b29db8..17b57caf49c9 100644
--- a/sound/soc/fsl/fsl_spdif.c
+++ b/sound/soc/fsl/fsl_spdif.c
@@ -1029,6 +1029,15 @@ static bool fsl_spdif_volatile_reg(struct device *dev, unsigned int reg)
{
switch (reg) {
case REG_SPDIF_SIS:
+ case REG_SPDIF_SRL:
+ case REG_SPDIF_SRR:
+ case REG_SPDIF_SRCSH:
+ case REG_SPDIF_SRCSL:
+ case REG_SPDIF_SRU:
+ case REG_SPDIF_SRQ:
+ case REG_SPDIF_STL:
+ case REG_SPDIF_STR:
+ case REG_SPDIF_SRFM:
return true;
default:
return false;