diff options
author | Alan Tull <r80115@freescale.com> | 2009-04-17 12:35:42 -0500 |
---|---|---|
committer | Justin Waters <justin.waters@timesys.com> | 2009-10-13 11:02:49 -0400 |
commit | ffdef27863bd653e9c3e99169308573466f7787e (patch) | |
tree | a6f7db3774fd25b24671f769663d52164c45c94b /sound | |
parent | 4004caf0b56ce07878497f339104359d08f9d115 (diff) |
ENGR00111670-3 sgtl5000: Use internal vddd reg for sgtl5000 rev 0x11
For rev 0x11 of SGTL5000, the VDDD pin is being driven by the
"simple digital supply regulator". Disabling the regulator
brings VDDD down to 0v. So leave the regulator on and don't
connect anything to the VDDD pin.
Signed-off-by: Alan Tull <r80115@freescale.com>
Diffstat (limited to 'sound')
-rw-r--r-- | sound/soc/codecs/sgtl5000.c | 11 |
1 files changed, 10 insertions, 1 deletions
diff --git a/sound/soc/codecs/sgtl5000.c b/sound/soc/codecs/sgtl5000.c index 04208683c4c1..10c2b967a238 100644 --- a/sound/soc/codecs/sgtl5000.c +++ b/sound/soc/codecs/sgtl5000.c @@ -856,7 +856,8 @@ static int sgtl5000_init(struct snd_soc_device *socdev) short_ctrl = 0; sss = SGTL5000_DAC_SEL_I2S_IN << SGTL5000_DAC_SEL_SHIFT; - if (!plat->vddd) { + /* workaround for rev 0x11: use vddd linear regulator */ + if (!plat->vddd || (sgtl5000->rev >= 0x11)) { /* set VDDD to 1.2v */ lreg_ctrl |= 0x8 << SGTL5000_LINREG_VDDD_SHIFT; /* power internal linear regulator */ @@ -916,6 +917,14 @@ static int sgtl5000_init(struct snd_soc_device *socdev) sgtl5000_write(codec, SGTL5000_CHIP_LINREG_CTRL, lreg_ctrl); sgtl5000_write(codec, SGTL5000_CHIP_ANA_POWER, ana_pwr); msleep(10); + + /* If vddd linear reg has been enabled, we can disable simple reg */ + if (ana_pwr & SGTL5000_LINEREG_D_POWERUP) { + ana_pwr &= ~SGTL5000_LINREG_SIMPLE_POWERUP; + sgtl5000_write(codec, SGTL5000_CHIP_ANA_POWER, ana_pwr); + msleep(10); + } + sgtl5000_write(codec, SGTL5000_CHIP_REF_CTRL, ref_ctrl); sgtl5000_write(codec, SGTL5000_CHIP_LINE_OUT_CTRL, lo_ctrl); sgtl5000_write(codec, SGTL5000_CHIP_SHORT_CTRL, short_ctrl); |