diff options
| author | Rahul Mittal <rmittal@nvidia.com> | 2013-03-29 00:16:17 +0530 |
|---|---|---|
| committer | Mrutyunjay Sawant <msawant@nvidia.com> | 2013-03-29 01:01:24 -0700 |
| commit | e7aebb422442da581331b1c0edc42ccc44952742 (patch) | |
| tree | 8b943aea095ea1701bfe0fa57082bf22df215465 /sound | |
| parent | 7d28e8ec2a186453330789afba49492815e780b4 (diff) | |
asoc: tegra: Add rt5640 pll configuration for hifi i2s slave
- Configure codec PLL to generate 512*fs mhz clock from 12mhz clk_m input
- Correct bclk_ms bit in codec which should be 1 for frame_size = 32 bits
Bug 1256349
Change-Id: I94238622a43aff9efdefbf8aaf68e655fa6662cd
Signed-off-by: Rahul Mittal <rmittal@nvidia.com>
Reviewed-on: http://git-master/r/211493
Reviewed-by: Scott Peterson <speterson@nvidia.com>
GVS: Gerrit_Virtual_Submit
Diffstat (limited to 'sound')
| -rw-r--r-- | sound/soc/codecs/rt5640.c | 2 | ||||
| -rw-r--r-- | sound/soc/tegra/tegra_rt5640.c | 26 |
2 files changed, 23 insertions, 5 deletions
diff --git a/sound/soc/codecs/rt5640.c b/sound/soc/codecs/rt5640.c index 509e4c16eed4..e6a031c2c5ff 100644 --- a/sound/soc/codecs/rt5640.c +++ b/sound/soc/codecs/rt5640.c @@ -2253,7 +2253,7 @@ static int rt5640_hw_params(struct snd_pcm_substream *substream, mutex_unlock(&rt5640->lock); return -EINVAL; } - bclk_ms = frame_size > 32 ? 1 : 0; + bclk_ms = frame_size >= 32 ? 1 : 0; rt5640->bclk[dai->id] = rt5640->lrck[dai->id] * (32 << bclk_ms); dev_dbg(dai->dev, "bclk is %dHz and lrck is %dHz\n", diff --git a/sound/soc/tegra/tegra_rt5640.c b/sound/soc/tegra/tegra_rt5640.c index 16bfa42dec14..faa45d9e6606 100644 --- a/sound/soc/tegra/tegra_rt5640.c +++ b/sound/soc/tegra/tegra_rt5640.c @@ -154,11 +154,29 @@ static int tegra_rt5640_hw_params(struct snd_pcm_substream *substream, return err; } - err = snd_soc_dai_set_sysclk(codec_dai, 0, rate, SND_SOC_CLOCK_IN); - if (err < 0) { - dev_err(card->dev, "codec_dai clock not set\n"); - return err; + if (pdata->i2s_param[HIFI_CODEC].is_i2s_master) { + err = snd_soc_dai_set_sysclk(codec_dai, 0, rate, + SND_SOC_CLOCK_IN); + if (err < 0) { + dev_err(card->dev, "codec_dai clock not set\n"); + return err; + } + } else { + err = snd_soc_dai_set_pll(codec_dai, RT5640_SCLK_S_PLL1, + RT5640_PLL1_S_MCLK, rate, 512 * srate); + if (err < 0) { + dev_err(card->dev, "codec_dai pll not set\n"); + return err; + } + + err = snd_soc_dai_set_sysclk(codec_dai, RT5640_SCLK_S_PLL1, + 512 * srate, SND_SOC_CLOCK_IN); + if (err < 0) { + dev_err(card->dev, "codec_dai clock not set\n"); + return err; + } } + if(machine_is_roth()) { if(initTfa == 1) { i2s_tfa = i2s; |