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author | Thomas Bogendoerfer <tsbogend@alpha.franken.de> | 2020-09-14 18:05:00 +0200 |
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committer | Greg Kroah-Hartman <gregkh@linuxfoundation.org> | 2020-09-23 08:44:27 +0200 |
commit | 5c56e5fc60b501877437281b84f8ddcf7241e5f2 (patch) | |
tree | c71c40a05533f6258a4beb8d477be994b129ba01 /tools | |
parent | 19fadc7cfc8533064c422c7e02a1b3fbf83e31ea (diff) |
MIPS: SNI: Fix MIPS_L1_CACHE_SHIFT
[ Upstream commit 564c836fd945a94b5dd46597d6b7adb464092650 ]
Commit 930beb5ac09a ("MIPS: introduce MIPS_L1_CACHE_SHIFT_<N>") forgot
to select the correct MIPS_L1_CACHE_SHIFT for SNI RM. This breaks non
coherent DMA because of a wrong allocation alignment.
Fixes: 930beb5ac09a ("MIPS: introduce MIPS_L1_CACHE_SHIFT_<N>")
Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
Signed-off-by: Sasha Levin <sashal@kernel.org>
Diffstat (limited to 'tools')
0 files changed, 0 insertions, 0 deletions