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| author | Naidu Tellapati <naidu.tellapati@imgtec.com> | 2015-05-08 18:47:31 -0300 |
|---|---|---|
| committer | Greg Kroah-Hartman <gregkh@linuxfoundation.org> | 2015-06-06 08:21:09 -0700 |
| commit | 9ac144beb909307828a779745d8189bfa52a45f9 (patch) | |
| tree | 31ee50a2d5603581bd52e5cb06ebd8ae8799ce3f /virt/kvm/async_pf.h | |
| parent | eb20e69ac83a1e4d764a49bf671e1e2e5dc4c15c (diff) | |
pwm: img: Impose upper and lower timebase steps value
commit 1e70897d0e20f988abedcf73b33684ecd2be9511 upstream.
The PWM hardware on Pistachio platform has a maximum timebase steps
value to 255. To fix it, let's introduce a compatible-specific
data structure to contain the SoC-specific details and use it to
specify a maximum timebase.
Also, let's limit the minimum timebase to 16 steps, to allow a sane
range of duty cycle steps.
Fixes: 277bb6a29e00 ("pwm: Imagination Technologies PWM DAC driver")
Signed-off-by: Naidu Tellapati <naidu.tellapati@imgtec.com>
Signed-off-by: Ezequiel Garcia <ezequiel.garcia@imgtec.com>
Signed-off-by: Thierry Reding <thierry.reding@gmail.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Diffstat (limited to 'virt/kvm/async_pf.h')
0 files changed, 0 insertions, 0 deletions