diff options
| -rw-r--r-- | arch/arm/mach-tegra/tegra12_dvfs.c | 4 | ||||
| -rw-r--r-- | arch/arm/mach-tegra/tegra12_edp.c | 5 | ||||
| -rw-r--r-- | arch/arm/mach-tegra/tegra12_speedo.c | 2 |
3 files changed, 8 insertions, 3 deletions
diff --git a/arch/arm/mach-tegra/tegra12_dvfs.c b/arch/arm/mach-tegra/tegra12_dvfs.c index c6ae432e7a3a..e050570a16b1 100644 --- a/arch/arm/mach-tegra/tegra12_dvfs.c +++ b/arch/arm/mach-tegra/tegra12_dvfs.c @@ -147,8 +147,8 @@ void __init tegra12x_vdd_cpu_align(int step_uv, int offset_uv) /* CPU DVFS tables */ static unsigned long cpu_max_freq[] = { -/* speedo_id 0 1 2 3 4 */ - 2014500, 2320500, 2116500, 2524500, 1500000, +/* speedo_id 0 1 2 3 4 5 */ + 2014500, 2320500, 2116500, 2524500, 1500000, 2218500, }; static struct cpu_cvb_dvfs cpu_cvb_dvfs_table[] = { diff --git a/arch/arm/mach-tegra/tegra12_edp.c b/arch/arm/mach-tegra/tegra12_edp.c index d0c3455545fa..84f026618ce1 100644 --- a/arch/arm/mach-tegra/tegra12_edp.c +++ b/arch/arm/mach-tegra/tegra12_edp.c @@ -204,6 +204,7 @@ struct tegra_sysedp_corecap *tegra_get_sysedp_corecap(unsigned int *sz) gpu_speedo_id = tegra_gpu_speedo_id(); switch (cpu_speedo_id) { + case 0x5: case 0x2: if (gpu_speedo_id == 1) { /* 575 variants */ @@ -316,6 +317,10 @@ static struct tegra_edp_cpu_leakage_params t12x_leakage_params[] = { .cpu_speedo_id = 3, /* Prod SKU */ EDP_PARAMS_COMMON_PART, }, + { + .cpu_speedo_id = 5, /* Prod SKU */ + EDP_PARAMS_COMMON_PART, + }, }; #ifdef CONFIG_TEGRA_GPU_EDP diff --git a/arch/arm/mach-tegra/tegra12_speedo.c b/arch/arm/mach-tegra/tegra12_speedo.c index 1042adbfd662..a9dd9c474c06 100644 --- a/arch/arm/mach-tegra/tegra12_speedo.c +++ b/arch/arm/mach-tegra/tegra12_speedo.c @@ -106,7 +106,7 @@ static void rev_sku_to_speedo_ids(int rev, int sku) case 0x1F: case 0x87: case 0x27: - cpu_speedo_id = 2; + cpu_speedo_id = sku == 0x27 ? 5 : 2; soc_speedo_id = 0; gpu_speedo_id = 1; threshold_index = 0; |