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-rw-r--r--arch/arm/mach-tegra/board-e1853.c30
-rw-r--r--arch/arm/mach-tegra/board-p1852.c8
-rw-r--r--drivers/mtd/maps/tegra_nor.c85
-rw-r--r--include/linux/platform_data/tegra_nor.h46
4 files changed, 151 insertions, 18 deletions
diff --git a/arch/arm/mach-tegra/board-e1853.c b/arch/arm/mach-tegra/board-e1853.c
index cec5667fb95b..3b6d2bfc3d4c 100644
--- a/arch/arm/mach-tegra/board-e1853.c
+++ b/arch/arm/mach-tegra/board-e1853.c
@@ -355,6 +355,35 @@ static void e1853_usb_init(void)
platform_device_register(&tegra_ehci3_device);
}
+static struct tegra_nor_platform_data e1853_nor_data = {
+ .flash = {
+ .map_name = "cfi_probe",
+ .width = 2,
+ },
+ .chip_parms = {
+ .MuxMode = NorMuxMode_ADMux,
+ .BurstLength = NorBurstLength_CntBurst,
+ .ReadMode = NorReadMode_Async,
+ .ReadyActive = NorReadyActive_BeforeData,
+ /* FIXME: Need to use characterized value */
+ .timing_default = {
+ .timing0 = 0xA0A05585,
+ .timing1 = 0x200A0406,
+ },
+ .timing_read = {
+ .timing0 = 0xA0A05585,
+ .timing1 = 0x00050406,
+ },
+ },
+};
+
+static void e1853_nor_init(void)
+{
+ tegra_nor_device.resource[2].end = TEGRA_NOR_FLASH_BASE + SZ_64M - 1;
+ tegra_nor_device.dev.platform_data = &e1853_nor_data;
+ platform_device_register(&tegra_nor_device);
+}
+
static void __init tegra_e1853_init(void)
{
tegra_init_board_info();
@@ -368,6 +397,7 @@ static void __init tegra_e1853_init(void)
e1853_spi_init();
platform_add_devices(e1853_devices, ARRAY_SIZE(e1853_devices));
e1853_panel_init();
+ e1853_nor_init();
e1853_pcie_init();
}
diff --git a/arch/arm/mach-tegra/board-p1852.c b/arch/arm/mach-tegra/board-p1852.c
index aefc21774a7d..4ff3eaf47899 100644
--- a/arch/arm/mach-tegra/board-p1852.c
+++ b/arch/arm/mach-tegra/board-p1852.c
@@ -1,6 +1,4 @@
/*
- * arch/arm/mach-tegra/board-p1852.c
- *
* Copyright (c) 2012, NVIDIA CORPORATION. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify it
@@ -15,6 +13,8 @@
* You should have received a copy of the GNU General Public License
* along with this program. If not, see <http://www.gnu.org/licenses/>.
*
+ * arch/arm/mach-tegra/board-p1852.c
+ *
*/
#include <linux/kernel.h>
@@ -606,6 +606,10 @@ static struct tegra_nor_platform_data p1852_nor_data = {
.width = 2,
},
.chip_parms = {
+ .MuxMode = NorMuxMode_ADNonMux,
+ .ReadMode = NorReadMode_Page,
+ .PageLength = NorPageLength_8Word,
+ .ReadyActive = NorReadyActive_WithData,
/* FIXME: Need to use characterized value */
.timing_default = {
.timing0 = 0x30300263,
diff --git a/drivers/mtd/maps/tegra_nor.c b/drivers/mtd/maps/tegra_nor.c
index 5e66daf6fb6a..41adb1e40382 100644
--- a/drivers/mtd/maps/tegra_nor.c
+++ b/drivers/mtd/maps/tegra_nor.c
@@ -1,9 +1,5 @@
/*
- * drivers/mtd/maps/tegra_nor.c
- *
- * MTD mapping driver for the internal SNOR controller in Tegra SoCs
- *
- * Copyright (C) 2009 - 2012 NVIDIA Corporation
+ * Copyright (C) 2009-2012, NVIDIA Corporation. All rights reserved.
*
* Author:
* Raghavendra VK <rvk@nvidia.com>
@@ -21,6 +17,11 @@
* You should have received a copy of the GNU General Public License along
* with this program; if not, write to the Free Software Foundation, Inc.,
* 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, USA.
+ *
+ * drivers/mtd/maps/tegra_nor.c
+ *
+ * MTD mapping driver for the internal SNOR controller in Tegra SoCs
+ *
*/
#include <linux/platform_device.h>
@@ -160,6 +161,7 @@ static void tegra_flash_dma(struct map_info *map,
u32 copy_to = (u32)to;
struct tegra_nor_info *c =
container_of(map, struct tegra_nor_info, map);
+ struct tegra_nor_chip_parms *chip_parm = &c->plat->chip_parms;
unsigned int bytes_remaining = len;
snor_config = c->init_config;
@@ -174,9 +176,52 @@ static void tegra_flash_dma(struct map_info *map,
* controller register only after all parameters are set.
*/
/* SNOR CONFIGURATION SETUP */
- snor_config |= TEGRA_SNOR_CONFIG_DEVICE_MODE(1);
- /* 8 word page */
- snor_config |= TEGRA_SNOR_CONFIG_PAGE_SZ(2);
+ switch(chip_parm->ReadMode)
+ {
+ case NorReadMode_Async:
+ snor_config |= TEGRA_SNOR_CONFIG_DEVICE_MODE(0);
+ break;
+
+ case NorReadMode_Page:
+ switch(chip_parm->PageLength)
+ {
+ case NorPageLength_Unsupported :
+ snor_config |= TEGRA_SNOR_CONFIG_DEVICE_MODE(0);
+ break;
+
+ case NorPageLength_4Word :
+ snor_config |= TEGRA_SNOR_CONFIG_DEVICE_MODE(1);
+ snor_config |= TEGRA_SNOR_CONFIG_PAGE_SZ(1);
+ break;
+
+ case NorPageLength_8Word :
+ snor_config |= TEGRA_SNOR_CONFIG_DEVICE_MODE(1);
+ snor_config |= TEGRA_SNOR_CONFIG_PAGE_SZ(2);
+ break;
+ }
+ break;
+
+ case NorReadMode_Burst:
+ snor_config |= TEGRA_SNOR_CONFIG_DEVICE_MODE(2);
+ switch(chip_parm->BurstLength)
+ {
+ case NorBurstLength_CntBurst :
+ snor_config |= TEGRA_SNOR_CONFIG_BURST_LEN(0);
+ break;
+ case NorBurstLength_8Word :
+ snor_config |= TEGRA_SNOR_CONFIG_BURST_LEN(1);
+ break;
+
+ case NorBurstLength_16Word :
+ snor_config |= TEGRA_SNOR_CONFIG_BURST_LEN(2);
+ break;
+
+ case NorBurstLength_32Word :
+ snor_config |= TEGRA_SNOR_CONFIG_BURST_LEN(3);
+ break;
+ }
+ break;
+ }
snor_config |= TEGRA_SNOR_CONFIG_MST_ENB;
/* SNOR DMA CONFIGURATION SETUP */
/* NOR -> AHB */
@@ -273,8 +318,28 @@ static int tegra_snor_controller_init(struct tegra_nor_info *info)
default:
return -EINVAL;
}
- config |= TEGRA_SNOR_CONFIG_BURST_LEN(0);
- config &= ~TEGRA_SNOR_CONFIG_MUX_MODE;
+ switch (chip_parm->MuxMode)
+ {
+ case NorMuxMode_ADNonMux:
+ config &= ~TEGRA_SNOR_CONFIG_MUX_MODE;
+ break;
+ case NorMuxMode_ADMux:
+ config |= TEGRA_SNOR_CONFIG_MUX_MODE;
+ break;
+ default:
+ return -EINVAL;
+ }
+ switch (chip_parm->ReadyActive)
+ {
+ case NorReadyActive_WithData:
+ config &= ~TEGRA_SNOR_CONFIG_RDY_ACTIVE;
+ break;
+ case NorReadyActive_BeforeData:
+ config |= TEGRA_SNOR_CONFIG_RDY_ACTIVE;
+ break;
+ default:
+ return -EINVAL;
+ }
snor_tegra_writel(info, config, TEGRA_SNOR_CONFIG_REG);
info->init_config = config;
diff --git a/include/linux/platform_data/tegra_nor.h b/include/linux/platform_data/tegra_nor.h
index cd8faff2f1cd..4bd980d2195b 100644
--- a/include/linux/platform_data/tegra_nor.h
+++ b/include/linux/platform_data/tegra_nor.h
@@ -1,10 +1,5 @@
/*
- * include/linux/platform_data/tegra_nor.h
- *
- * Copyright (C) 2010 - 2011 NVIDIA Corporation.
- *
- * Author:
- * Raghavendra V K <rvk@nvidia.com>
+ * Copyright (C) 2010-2012, NVIDIA Corporation. All rights reserved.
*
* This software is licensed under the terms of the GNU General Public
* License version 2, as published by the Free Software Foundation, and
@@ -15,6 +10,11 @@
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
+ * include/linux/platform_data/tegra_nor.h
+ *
+ * Author:
+ * Raghavendra V K <rvk@nvidia.com>
+ *
*/
#ifndef __MACH_TEGRA_NOR_PDATA_H
@@ -22,11 +22,45 @@
#include <asm/mach/flash.h>
+typedef enum {
+ NorMuxMode_ADNonMux,
+ NorMuxMode_ADMux,
+}NorMuxMode;
+
+typedef enum {
+ NorPageLength_Unsupported,
+ NorPageLength_4Word,
+ NorPageLength_8Word,
+}NorPageLength;
+
+typedef enum {
+ NorBurstLength_CntBurst,
+ NorBurstLength_8Word,
+ NorBurstLength_16Word,
+ NorBurstLength_32Word,
+}NorBurstLength;
+
+typedef enum {
+ NorReadMode_Async,
+ NorReadMode_Page,
+ NorReadMode_Burst,
+}NorReadMode;
+
+typedef enum {
+ NorReadyActive_WithData,
+ NorReadyActive_BeforeData,
+}NorReadyActive;
+
struct tegra_nor_chip_parms {
struct {
uint32_t timing0;
uint32_t timing1;
} timing_default, timing_read;
+ NorMuxMode MuxMode;
+ NorReadMode ReadMode;
+ NorPageLength PageLength;
+ NorBurstLength BurstLength;
+ NorReadyActive ReadyActive;
};
struct tegra_nor_platform_data {