diff options
-rw-r--r-- | drivers/video/tegra/dc/dc.c | 29 | ||||
-rw-r--r-- | drivers/video/tegra/dc/dc_priv.h | 4 | ||||
-rw-r--r-- | drivers/video/tegra/dc/rgb.c | 21 |
3 files changed, 30 insertions, 24 deletions
diff --git a/drivers/video/tegra/dc/dc.c b/drivers/video/tegra/dc/dc.c index 81e88bd9709e..04de0ede49c2 100644 --- a/drivers/video/tegra/dc/dc.c +++ b/drivers/video/tegra/dc/dc.c @@ -54,6 +54,9 @@ #define TEGRA_CRC_LATCHED_DELAY 34 +#define DC_COM_PIN_OUTPUT_POLARITY1_INIT_VAL 0x01000000 +#define DC_COM_PIN_OUTPUT_POLARITY3_INIT_VAL 0x0 + #ifndef CONFIG_TEGRA_FPGA_PLATFORM #define ALL_UF_INT (WIN_A_UF_INT | WIN_B_UF_INT | WIN_C_UF_INT) #else @@ -1611,18 +1614,6 @@ static int tegra_dc_program_mode(struct tegra_dc *dc, struct tegra_dc_mode *mode tegra_dc_writel(dc, DE_SELECT_ACTIVE | DE_CONTROL_NORMAL, DC_DISP_DATA_ENABLE_OPTIONS); - val = tegra_dc_readl(dc, DC_COM_PIN_OUTPUT_POLARITY1); - if (mode->flags & TEGRA_DC_MODE_FLAG_NEG_V_SYNC) - val |= PIN1_LVS_OUTPUT; - else - val &= ~PIN1_LVS_OUTPUT; - - if (mode->flags & TEGRA_DC_MODE_FLAG_NEG_H_SYNC) - val |= PIN1_LHS_OUTPUT; - else - val &= ~PIN1_LHS_OUTPUT; - tegra_dc_writel(dc, val, DC_COM_PIN_OUTPUT_POLARITY1); - /* TODO: MIPI/CRT/HDMI clock cals */ val = DISP_DATA_FORMAT_DF1P1C; @@ -1790,7 +1781,7 @@ tegra_dc_config_pwm(struct tegra_dc *dc, struct tegra_dc_pwm_params *cfg) } EXPORT_SYMBOL(tegra_dc_config_pwm); -static void tegra_dc_set_out_pin_polars(struct tegra_dc *dc, +void tegra_dc_set_out_pin_polars(struct tegra_dc *dc, const struct tegra_dc_out_pin *pins, const unsigned int n_pins) { @@ -1843,8 +1834,8 @@ static void tegra_dc_set_out_pin_polars(struct tegra_dc *dc, } } - pol1 = tegra_dc_readl(dc, DC_COM_PIN_OUTPUT_POLARITY1); - pol3 = tegra_dc_readl(dc, DC_COM_PIN_OUTPUT_POLARITY3); + pol1 = DC_COM_PIN_OUTPUT_POLARITY1_INIT_VAL; + pol3 = DC_COM_PIN_OUTPUT_POLARITY3_INIT_VAL; pol1 |= set1; pol1 &= ~unset1; @@ -2363,10 +2354,6 @@ static bool _tegra_dc_controller_enable(struct tegra_dc *dc) if (dc->out_ops && dc->out_ops->enable) dc->out_ops->enable(dc); - if (dc->out->out_pins) - tegra_dc_set_out_pin_polars(dc, dc->out->out_pins, - dc->out->n_out_pins); - if (dc->out->postpoweron) dc->out->postpoweron(); @@ -2419,10 +2406,6 @@ static bool _tegra_dc_controller_reset_enable(struct tegra_dc *dc) if (dc->out_ops && dc->out_ops->enable) dc->out_ops->enable(dc); - if (dc->out->out_pins) - tegra_dc_set_out_pin_polars(dc, dc->out->out_pins, - dc->out->n_out_pins); - if (dc->out->postpoweron) dc->out->postpoweron(); diff --git a/drivers/video/tegra/dc/dc_priv.h b/drivers/video/tegra/dc/dc_priv.h index bd0625b1cf8c..0f9a0531a77e 100644 --- a/drivers/video/tegra/dc/dc_priv.h +++ b/drivers/video/tegra/dc/dc_priv.h @@ -214,5 +214,9 @@ unsigned long tegra_dc_get_bandwidth(struct tegra_dc_win *wins[], int n); u32 tegra_dc_read_checksum_latched(struct tegra_dc *dc); void tegra_dc_enable_crc(struct tegra_dc *dc); void tegra_dc_disable_crc(struct tegra_dc *dc); + +void tegra_dc_set_out_pin_polars(struct tegra_dc *dc, + const struct tegra_dc_out_pin *pins, + const unsigned int n_pins); #endif diff --git a/drivers/video/tegra/dc/rgb.c b/drivers/video/tegra/dc/rgb.c index 7b87a2da4b4d..2112643058f4 100644 --- a/drivers/video/tegra/dc/rgb.c +++ b/drivers/video/tegra/dc/rgb.c @@ -23,6 +23,19 @@ #include "dc_priv.h" +static const u32 tegra_dc_rgb_enable_partial_pintable[] = { + DC_COM_PIN_OUTPUT_ENABLE0, 0x00000000, + DC_COM_PIN_OUTPUT_ENABLE1, 0x00000000, + DC_COM_PIN_OUTPUT_ENABLE2, 0x00000000, + DC_COM_PIN_OUTPUT_ENABLE3, 0x00000000, + DC_COM_PIN_OUTPUT_POLARITY0, 0x00000000, + DC_COM_PIN_OUTPUT_POLARITY2, 0x00000000, + DC_COM_PIN_OUTPUT_DATA0, 0x00000000, + DC_COM_PIN_OUTPUT_DATA1, 0x00000000, + DC_COM_PIN_OUTPUT_DATA2, 0x00000000, + DC_COM_PIN_OUTPUT_DATA3, 0x00000000, +}; + static const u32 tegra_dc_rgb_enable_pintable[] = { DC_COM_PIN_OUTPUT_ENABLE0, 0x00000000, DC_COM_PIN_OUTPUT_ENABLE1, 0x00000000, @@ -88,7 +101,13 @@ void tegra_dc_rgb_enable(struct tegra_dc *dc) tegra_dc_writel(dc, DISP_CTRL_MODE_C_DISPLAY, DC_CMD_DISPLAY_COMMAND); - tegra_dc_write_table(dc, tegra_dc_rgb_enable_pintable); + if (dc->out->out_pins) { + tegra_dc_set_out_pin_polars(dc, dc->out->out_pins, + dc->out->n_out_pins); + tegra_dc_write_table(dc, tegra_dc_rgb_enable_partial_pintable); + } else { + tegra_dc_write_table(dc, tegra_dc_rgb_enable_pintable); + } memcpy(out_sel_pintable, tegra_dc_rgb_enable_out_sel_pintable, sizeof(tegra_dc_rgb_enable_out_sel_pintable)); |