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-rw-r--r--arch/arm64/boot/dts/freescale/Makefile4
-rwxr-xr-xarch/arm64/boot/dts/freescale/imx8mp-verdin-dev.dtsi145
-rwxr-xr-xarch/arm64/boot/dts/freescale/imx8mp-verdin-nonwifi-dev.dts18
-rwxr-xr-xarch/arm64/boot/dts/freescale/imx8mp-verdin-nonwifi.dtsi12
-rwxr-xr-xarch/arm64/boot/dts/freescale/imx8mp-verdin-wifi-dev.dts18
-rwxr-xr-xarch/arm64/boot/dts/freescale/imx8mp-verdin-wifi.dtsi41
-rwxr-xr-xarch/arm64/boot/dts/freescale/imx8mp-verdin.dtsi1264
7 files changed, 1501 insertions, 1 deletions
diff --git a/arch/arm64/boot/dts/freescale/Makefile b/arch/arm64/boot/dts/freescale/Makefile
index a45e8def8d39..ef352ba3e20a 100644
--- a/arch/arm64/boot/dts/freescale/Makefile
+++ b/arch/arm64/boot/dts/freescale/Makefile
@@ -72,7 +72,9 @@ dtb-$(CONFIG_ARCH_MXC) += imx8mn-ab2.dtb imx8mn-ddr4-ab2.dtb
dtb-$(CONFIG_ARCH_MXC) += imx8mp-evk.dtb imx8mp-evk-root.dtb imx8mp-evk-inmate.dtb imx8mp-evk-rpmsg.dtb \
imx8mp-evk-rm67191.dtb imx8mp-evk-flexcan2.dtb imx8mp-evk-it6263-lvds-dual-channel.dtb \
imx8mp-evk-jdi-wuxga-lvds-panel.dtb imx8mp-ab2.dtb imx8mp-evk-sof-wm8960.dtb \
- imx8mp-evk-dsp.dtb imx8mp-evk-ov2775.dtb imx8mp-evk-basler.dtb
+ imx8mp-evk-dsp.dtb imx8mp-evk-ov2775.dtb imx8mp-evk-basler.dtb \
+ imx8mp-verdin-nonwifi-dev.dtb \
+ imx8mp-verdin-wifi-dev.dtb
dtb-$(CONFIG_ARCH_MXC) += imx8mq-evk.dtb imx8mq-evk-rpmsg.dtb imx8mq-evk-pcie1-m2.dtb imx8mq-evk-usd-wifi.dtb \
imx8mq-evk-usdhc2-m2.dtb
dtb-$(CONFIG_ARCH_MXC) += imx8mq-evk-ak4497.dtb imx8mq-evk-audio-tdm.dtb imx8mq-evk-pdm.dtb
diff --git a/arch/arm64/boot/dts/freescale/imx8mp-verdin-dev.dtsi b/arch/arm64/boot/dts/freescale/imx8mp-verdin-dev.dtsi
new file mode 100755
index 000000000000..7d1578a7df6a
--- /dev/null
+++ b/arch/arm64/boot/dts/freescale/imx8mp-verdin-dev.dtsi
@@ -0,0 +1,145 @@
+// SPDX-License-Identifier: GPL-2.0+ OR MIT
+/*
+ * Copyright 2020 Toradex
+ */
+
+/* Verdin SPI_1 */
+&ecspi1 {
+ status = "okay";
+
+ spidev10: spidev@0 {
+ compatible = "toradex,evalspi";
+ reg = <0>;
+ spi-max-frequency = <10000000>;
+ status = "okay";
+ };
+};
+
+/* EEPROM on display adapter boards */
+&eeprom_display_adapter {
+ status = "okay";
+};
+
+/* EEPROM on Verdin Development board */
+&eeprom_carrier_board {
+ status = "okay";
+};
+
+&eqos {
+ status = "okay";
+};
+
+&fec {
+ status = "okay";
+};
+
+&flexcan1 {
+ status = "okay";
+};
+
+&flexcan2 {
+ status = "okay";
+};
+
+/* Verdin QSPI_1 */
+&flexspi {
+ status = "okay";
+};
+
+&gpio_expander_21 {
+ status = "okay";
+};
+
+/* Current measurement into module VCC */
+&hwmon {
+ status = "okay";
+};
+
+&i2c3 {
+ status = "okay";
+};
+
+&i2c4 {
+ status = "okay";
+};
+
+/* Verdin PCIE_1 */
+&pcie {
+ status = "okay";
+};
+
+&pcie_phy{
+ status = "okay";
+};
+
+/* Verdin PWM_1 */
+&pwm1 {
+ status = "okay";
+};
+
+/* Verdin PWM_2 */
+&pwm2 {
+ status = "okay";
+};
+
+/* VERDIN I2S_1 */
+&sai1 {
+ status = "okay";
+};
+
+/* Verdin UART_1 */
+&uart1 {
+ status = "okay";
+};
+
+/* Verdin UART_2 */
+&uart2 {
+ status = "okay";
+};
+
+/* Verdin UART_3, used as the Linux Console */
+&uart3 {
+ status = "okay";
+};
+
+/* Verdin UART_4 */
+/* Often used by the M7 and then should not be enabled here. */
+&uart4 {
+ status = "disabled";
+};
+
+/* Verdin USB_1 */
+&usb3_phy0 {
+ status = "okay";
+};
+
+&usb3_0 {
+ status = "okay";
+};
+
+&usb_dwc3_0 {
+ status = "okay";
+};
+
+/* Verdin USB_2 */
+&usb3_phy1 {
+ status = "okay";
+};
+
+&usb3_1 {
+ status = "okay";
+};
+
+&usb_dwc3_1 {
+ status = "okay";
+};
+
+/* Verdin SD_1 */
+&usdhc2 {
+ status = "okay";
+};
+
+/* Audio Codec */
+&wm8904_1a {
+ status = "okay";
+};
diff --git a/arch/arm64/boot/dts/freescale/imx8mp-verdin-nonwifi-dev.dts b/arch/arm64/boot/dts/freescale/imx8mp-verdin-nonwifi-dev.dts
new file mode 100755
index 000000000000..a3d7034fe247
--- /dev/null
+++ b/arch/arm64/boot/dts/freescale/imx8mp-verdin-nonwifi-dev.dts
@@ -0,0 +1,18 @@
+// SPDX-License-Identifier: GPL-2.0+ OR MIT
+/*
+ * Copyright 2020 Toradex
+ */
+
+/dts-v1/;
+
+#include "imx8mp-verdin.dtsi"
+#include "imx8mp-verdin-nonwifi.dtsi"
+#include "imx8mp-verdin-dev.dtsi"
+
+/ {
+ model = "Toradex Verdin iMX8M Plus on Verdin Development Board";
+ compatible = "toradex,verdin-imx8mp-nonwifi-dev",
+ "toradex,verdin-imx8mp-nonwifi",
+ "toradex,verdin-imx8mp",
+ "fsl,imx8mp";
+};
diff --git a/arch/arm64/boot/dts/freescale/imx8mp-verdin-nonwifi.dtsi b/arch/arm64/boot/dts/freescale/imx8mp-verdin-nonwifi.dtsi
new file mode 100755
index 000000000000..6394c793b59f
--- /dev/null
+++ b/arch/arm64/boot/dts/freescale/imx8mp-verdin-nonwifi.dtsi
@@ -0,0 +1,12 @@
+// SPDX-License-Identifier: GPL-2.0+ OR MIT
+/*
+ * Copyright 2020 Toradex
+ */
+
+&gpio3 {
+ gpio-line-names = "";
+};
+
+&gpio4 {
+ gpio-line-names = "";
+};
diff --git a/arch/arm64/boot/dts/freescale/imx8mp-verdin-wifi-dev.dts b/arch/arm64/boot/dts/freescale/imx8mp-verdin-wifi-dev.dts
new file mode 100755
index 000000000000..94115d613f65
--- /dev/null
+++ b/arch/arm64/boot/dts/freescale/imx8mp-verdin-wifi-dev.dts
@@ -0,0 +1,18 @@
+// SPDX-License-Identifier: GPL-2.0+ OR MIT
+/*
+ * Copyright 2020 Toradex
+ */
+
+/dts-v1/;
+
+#include "imx8mp-verdin.dtsi"
+#include "imx8mp-verdin-wifi.dtsi"
+#include "imx8mp-verdin-dev.dtsi"
+
+/ {
+ model = "Toradex Verdin iMX8M Plus WB on Verdin Development Board";
+ compatible = "toradex,verdin-imx8mp-wifi-dev",
+ "toradex,verdin-imx8mp-wifi",
+ "toradex,verdin-imx8mp",
+ "fsl,imx8mp";
+};
diff --git a/arch/arm64/boot/dts/freescale/imx8mp-verdin-wifi.dtsi b/arch/arm64/boot/dts/freescale/imx8mp-verdin-wifi.dtsi
new file mode 100755
index 000000000000..6742d93fce41
--- /dev/null
+++ b/arch/arm64/boot/dts/freescale/imx8mp-verdin-wifi.dtsi
@@ -0,0 +1,41 @@
+// SPDX-License-Identifier: GPL-2.0+ OR MIT
+/*
+ * Copyright 2020 Toradex
+ */
+
+/ {
+ reg_wifi_en: regulator-wifi-en {
+ compatible = "regulator-fixed";
+ enable-active-high;
+ gpio = <&gpio2 11 GPIO_ACTIVE_HIGH>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_wifi_pwr_en>;
+ regulator-name = "V3.3_WI-FI";
+ regulator-min-microvolt = <3300000>;
+ regulator-max-microvolt = <3300000>;
+ startup-delay-us = <2000>;
+ };
+};
+
+/* On-module Wi-Fi */
+&usdhc1 {
+ bus-width = <4>;
+ cap-power-off-card;
+ keep-power-in-suspend;
+ non-removable;
+ pinctrl-names = "default", "state_100mhz", "state_200mhz";
+ pinctrl-0 = <&pinctrl_usdhc1>, <&pinctrl_wifi_ctrl>;
+ pinctrl-1 = <&pinctrl_usdhc1_100mhz>, <&pinctrl_wifi_ctrl>;
+ pinctrl-2 = <&pinctrl_usdhc1_200mhz>, <&pinctrl_wifi_ctrl>;
+ vmmc-supply = <&reg_wifi_en>;
+ wifi-host;
+ status = "okay";
+};
+
+&gpio3 {
+ gpio-line-names = "";
+};
+
+&gpio4 {
+ gpio-line-names = "";
+};
diff --git a/arch/arm64/boot/dts/freescale/imx8mp-verdin.dtsi b/arch/arm64/boot/dts/freescale/imx8mp-verdin.dtsi
new file mode 100755
index 000000000000..43a805236e63
--- /dev/null
+++ b/arch/arm64/boot/dts/freescale/imx8mp-verdin.dtsi
@@ -0,0 +1,1264 @@
+// SPDX-License-Identifier: GPL-2.0+ OR MIT
+/*
+ * Copyright 2020 Toradex
+ */
+
+#include "dt-bindings/pwm/pwm.h"
+#include "imx8mp.dtsi"
+
+/ {
+ chosen {
+ bootargs = "console=ttymxc2,115200 earlycon";
+ stdout-path = &uart3;
+ };
+
+ aliases {
+ rtc0 = &rtc_i2c;
+ rtc1 = &snvs_rtc;
+ };
+
+ gpio-keys {
+ compatible = "gpio-keys";
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_gpio_keys>;
+
+ wakeup {
+ debounce-interval = <10>;
+ gpios = <&gpio4 0 GPIO_ACTIVE_LOW>;
+ label = "Wake-Up";
+ linux,code = <KEY_WAKEUP>;
+ wakeup-source;
+ };
+ };
+
+ /* Carrier Board Supply */
+ reg_3p3v: regulator-3p3v {
+ compatible = "regulator-fixed";
+ regulator-max-microvolt = <3300000>;
+ regulator-min-microvolt = <3300000>;
+ regulator-name = "REG_3P3V";
+ };
+
+ reg_aux_usb: regulator-aux-usb {
+ compatible = "regulator-fixed";
+ regulator-max-microvolt = <3300000>;
+ regulator-min-microvolt = <3300000>;
+ regulator-name = "REG_AUX_USB";
+ };
+
+ reg_mipi_phy: regulator-mipi-phy {
+ compatible = "regulator-fixed";
+ regulator-max-microvolt = <1000000>;
+ regulator-min-microvolt = <1000000>;
+ regulator-name = "REG_MIPI_PHY";
+ };
+
+ reg_ethphy: regulator-ethphy {
+ compatible = "regulator-fixed";
+ enable-active-high;
+ gpio = <&gpio2 20 GPIO_ACTIVE_HIGH>; /* PMIC_EN_ETH */
+ off-on-delay = <500000>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_reg_eth>;
+ regulator-boot-on;
+ regulator-max-microvolt = <3300000>;
+ regulator-min-microvolt = <3300000>;
+ regulator-name = "V3.3_ETH";
+ startup-delay-us = <200000>;
+ };
+
+ reg_usb0_vbus: regulator-usb0-vbus {
+ compatible = "regulator-fixed";
+ enable-active-high;
+ /* Verdin USB1_EN */
+ gpio = <&gpio1 12 GPIO_ACTIVE_HIGH>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_reg_usb1_en>;
+ regulator-max-microvolt = <5000000>;
+ regulator-min-microvolt = <5000000>;
+ regulator-name = "usb0_vbus";
+ };
+
+ reg_usb1_vbus: regulator-usb1-vbus {
+ compatible = "regulator-fixed";
+ enable-active-high;
+ /* Verdin USB2_EN */
+ gpio = <&gpio1 14 GPIO_ACTIVE_HIGH>; /* USB_2_EN */
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_reg_usb2_en>;
+ regulator-max-microvolt = <5000000>;
+ regulator-min-microvolt = <5000000>;
+ regulator-name = "usb1_vbus";
+ };
+
+ reg_usdhc2_vmmc: regulator-usdhc2 {
+ compatible = "regulator-fixed";
+ enable-active-high;
+ gpio = <&gpio4 22 GPIO_ACTIVE_HIGH>; /* SD_1_PWR_EN */
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_usdhc2_pwr_en>;
+ regulator-max-microvolt = <3300000>;
+ regulator-min-microvolt = <3300000>;
+ regulator-name = "V3.3_SD";
+ startup-delay-us = <2000>;
+ off-on-delay = <100000>;
+ };
+
+ reserved-memory {
+ #address-cells = <2>;
+ #size-cells = <2>;
+ ranges;
+
+ rpmsg_reserved: rpmsg@0x55800000 {
+ no-map;
+ reg = <0 0x55800000 0 0x800000>;
+ };
+ };
+
+ sound_card: sound-card {
+ compatible = "simple-audio-card";
+ simple-audio-card,bitclock-master = <&dailink_master>;
+ simple-audio-card,format = "i2s";
+ simple-audio-card,frame-master = <&dailink_master>;
+ simple-audio-card,name = "imx8mm-wm8904";
+ simple-audio-card,routing =
+ "Headphone Jack", "HPOUTL",
+ "Headphone Jack", "HPOUTR",
+ "IN2L", "Line In Jack",
+ "IN2R", "Line In Jack",
+ "Microphone Jack", "MICBIAS",
+ "IN1L", "Microphone Jack",
+ "IN1R", "Microphone Jack";
+ simple-audio-card,widgets =
+ "Microphone", "Microphone Jack",
+ "Headphone", "Headphone Jack",
+ "Line", "Line In Jack";
+
+ dailink_master: simple-audio-card,codec {
+ sound-dai = <&wm8904_1a>;
+ };
+
+ simple-audio-card,cpu {
+ sound-dai = <&sai1>;
+ };
+ };
+};
+
+&A53_0 {
+ cpu-supply = <&buck2_reg>;
+};
+
+/* compare with commit d0307f1e31c64 */
+&clk {
+ init-on-array = <IMX8MP_CLK_HSIO_ROOT>;
+};
+
+/* Verdin SPI_1 */
+&ecspi1 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_ecspi1>;
+ cs-gpios = <&gpio5 9 GPIO_ACTIVE_LOW>;
+};
+
+&eqos {
+ phy-handle = <&ethphy0>;
+ phy-mode = "rgmii-id";
+ phy-supply = <&reg_ethphy>;
+ pinctrl-names = "default", "sleep";
+ pinctrl-0 = <&pinctrl_eqos>;
+ pinctrl-1 = <&pinctrl_eqos_sleep>;
+
+ mdio {
+ compatible = "snps,dwmac-mdio";
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ ethphy0: ethernet-phy@7 {
+ compatible = "ethernet-phy-ieee802.3-c22";
+ interrupt-parent = <&gpio1>;
+ interrupts = <10 IRQ_TYPE_LEVEL_LOW>;
+ reg = <7>;
+ micrel,led-mode = <0>;
+ };
+ };
+};
+
+&fec {
+ fsl,magic-packet;
+ phy-handle = <&ethphy1>;
+ phy-mode = "rgmii-id";
+ phy-supply = <&reg_ethphy>;
+ pinctrl-names = "default", "sleep";
+ pinctrl-0 = <&pinctrl_fec>;
+ pinctrl-1 = <&pinctrl_fec_sleep>;
+
+ mdio {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ ethphy1: ethernet-phy@3 {
+ compatible = "ethernet-phy-ieee802.3-c22";
+ interrupt-parent = <&gpio4>;
+ interrupts = <18 IRQ_TYPE_LEVEL_LOW>;
+ micrel,led-mode = <0>;
+ reg = <3>;
+ };
+ };
+};
+
+/* Verdin CAN_1 */
+&flexcan1 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_flexcan1>;
+ status = "disabled";
+};
+
+
+/* Verdin CAN_2 */
+&flexcan2 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_flexcan2>;
+ status = "disabled";
+};
+
+/* Verdin QSPI_1 */
+&flexspi {
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_flexspi0>;
+#if 0
+ flash0: mt25qu256aba@0 {
+ #address-cells = <1>;
+ #size-cells = <1>;
+ compatible = "micron,mt25qu256aba";
+ reg = <0>;
+ spi-max-frequency = <80000000>;
+ spi-nor,ddr-quad-read-dummy = <6>;
+ };
+#endif
+};
+
+&gpio1 {
+ gpio-line-names = "";
+};
+
+&gpio2 {
+ gpio-line-names = "";
+
+ ctrl_sleep_moci {
+ gpio-hog;
+ gpios = <29 GPIO_ACTIVE_HIGH>;
+ line-name = "CTRL_SLEEP_MOCI#";
+ output-high;
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_ctrl_sleep_moci>;
+ };
+};
+
+&gpio5 {
+ gpio-line-names = "";
+};
+
+/* On-module I2C */
+&i2c1 {
+ clock-frequency = <400000>;
+ pinctrl-names = "default", "gpio";
+ pinctrl-0 = <&pinctrl_i2c1>;
+ pinctrl-1 = <&pinctrl_i2c1_gpio>;
+ scl-gpios = <&gpio5 14 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
+ sda-gpios = <&gpio5 15 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
+ status = "okay";
+
+ pmic: pca9450@25 {
+ compatible = "nxp,pca9450";
+ gpio_intr = <&gpio1 3 GPIO_ACTIVE_LOW>;
+ i2c-lt-en = <0x101>;
+ /* PMIC PCA9450 PMIC_nINT GPIO1_IO3 */
+ pinctrl-0 = <&pinctrl_pmic>;
+ reg = <0x25>;
+
+ regulators {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ pca9450,pmic-buck2-uses-i2c-dvs;
+ /* Run/Standby voltage */
+ pca9450,pmic-buck2-dvs-voltage = <950000>, <850000>;
+
+ buck1_reg: regulator@0 {
+ reg = <0>;
+ regulator-compatible = "buck1";
+ regulator-min-microvolt = <600000>;
+ regulator-max-microvolt = <2187500>;
+ regulator-boot-on;
+ regulator-always-on;
+ regulator-ramp-delay = <3125>;
+ };
+
+ buck2_reg: regulator@1 {
+ reg = <1>;
+ regulator-compatible = "buck2";
+ regulator-min-microvolt = <600000>;
+ regulator-max-microvolt = <2187500>;
+ regulator-boot-on;
+ regulator-always-on;
+ regulator-ramp-delay = <3125>;
+ };
+
+ buck4_reg: regulator@3 {
+ reg = <3>;
+ regulator-compatible = "buck4";
+ regulator-min-microvolt = <600000>;
+ regulator-max-microvolt = <3400000>;
+ regulator-boot-on;
+ regulator-always-on;
+ };
+
+ buck5_reg: regulator@4 {
+ reg = <4>;
+ regulator-compatible = "buck5";
+ regulator-min-microvolt = <600000>;
+ regulator-max-microvolt = <3400000>;
+ regulator-boot-on;
+ regulator-always-on;
+ };
+
+ buck6_reg: regulator@5 {
+ reg = <5>;
+ regulator-compatible = "buck6";
+ regulator-min-microvolt = <600000>;
+ regulator-max-microvolt = <3400000>;
+ regulator-boot-on;
+ regulator-always-on;
+ };
+
+ ldo1_reg: regulator@6 {
+ reg = <6>;
+ regulator-compatible = "ldo1";
+ regulator-min-microvolt = <1600000>;
+ regulator-max-microvolt = <3300000>;
+ regulator-boot-on;
+ regulator-always-on;
+ };
+
+ ldo2_reg: regulator@7 {
+ reg = <7>;
+ regulator-compatible = "ldo2";
+ regulator-min-microvolt = <800000>;
+ regulator-max-microvolt = <1150000>;
+ regulator-boot-on;
+ regulator-always-on;
+ };
+
+ ldo3_reg: regulator@8 {
+ reg = <8>;
+ regulator-compatible = "ldo3";
+ regulator-min-microvolt = <800000>;
+ regulator-max-microvolt = <3300000>;
+ regulator-boot-on;
+ regulator-always-on;
+ };
+
+ ldo4_reg: regulator@9 {
+ reg = <9>;
+ regulator-compatible = "ldo4";
+ regulator-min-microvolt = <3300000>;
+ regulator-max-microvolt = <3300000>;
+ regulator-always-on;
+ };
+
+ ldo5_reg: regulator@10 {
+ reg = <10>;
+ regulator-compatible = "ldo5";
+ regulator-min-microvolt = <1800000>;
+ regulator-max-microvolt = <3300000>;
+ regulator-boot-on;
+ regulator-always-on;
+ };
+ };
+ };
+
+ rtc_i2c: rtc@32 {
+ compatible = "epson,rx8130";
+ reg = <0x32>;
+ };
+
+ adc@49 {
+ compatible = "ti,ads1015";
+ reg = <0x49>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ /* Verdin I2C_1 (ADC_4 - ADC_3) */
+ channel@0 {
+ reg = <0>;
+ ti,gain = <2>;
+ ti,datarate = <4>;
+ };
+
+ /* Verdin I2C_1 (ADC_4 - ADC_1) */
+ channel@1 {
+ reg = <1>;
+ ti,gain = <2>;
+ ti,datarate = <4>;
+ };
+
+ /* Verdin I2C_1 (ADC_3 - ADC_1) */
+ channel@2 {
+ reg = <2>;
+ ti,gain = <2>;
+ ti,datarate = <4>;
+ };
+
+ /* Verdin I2C_1 (ADC_2 - ADC_1) */
+ channel@3 {
+ reg = <3>;
+ ti,gain = <2>;
+ ti,datarate = <4>;
+ };
+
+ /* Verdin I2C_1 ADC_4 */
+ channel@4 {
+ reg = <4>;
+ ti,gain = <2>;
+ ti,datarate = <4>;
+ };
+
+ /* Verdin I2C_1 ADC_3 */
+ channel@5 {
+ reg = <5>;
+ ti,gain = <2>;
+ ti,datarate = <4>;
+ };
+
+ /* Verdin I2C_1 ADC_2 */
+ channel@6 {
+ reg = <6>;
+ ti,gain = <2>;
+ ti,datarate = <4>;
+ };
+
+ /* Verdin I2C_1 ADC_1 */
+ channel@7 {
+ reg = <7>;
+ ti,gain = <2>;
+ ti,datarate = <4>;
+ };
+ };
+
+ eeprom@50 {
+ compatible = "st,24c02";
+ pagesize = <16>;
+ reg = <0x50>;
+ };
+};
+
+/* Verdin I2C_4_CSI */
+&i2c3 {
+ clock-frequency = <400000>;
+ pinctrl-names = "default", "gpio";
+ pinctrl-0 = <&pinctrl_i2c3>;
+ pinctrl-1 = <&pinctrl_i2c3_gpio>;
+ scl-gpios = <&gpio5 18 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
+ sda-gpios = <&gpio5 19 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
+};
+
+/* Verdin I2C_1 */
+&i2c4 {
+ clock-frequency = <400000>;
+ pinctrl-names = "default", "gpio";
+ pinctrl-0 = <&pinctrl_i2c4>;
+ pinctrl-1 = <&pinctrl_i2c4_gpio>;
+ scl-gpios = <&gpio5 20 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
+ sda-gpios = <&gpio5 21 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
+
+ /* Audio Codec */
+ wm8904_1a: codec@1a {
+ compatible = "wlf,wm8904";
+ #sound-dai-cells = <0>;
+ clocks = <&clk IMX8MP_CLK_SAI2>;
+ clock-names = "mclk";
+ reg = <0x1a>;
+ status = "disabled";
+ DCVDD-supply = <&reg_3p3v>;
+ DBVDD-supply = <&reg_3p3v>;
+ AVDD-supply = <&reg_3p3v>;
+ CPVDD-supply = <&reg_3p3v>;
+ MICVDD-supply = <&reg_3p3v>;
+ };
+
+ gpio_expander_21: gpio-expander@21 {
+ compatible = "nxp,pcal6416";
+ #gpio-cells = <2>;
+ gpio-controller;
+ reg = <0x21>;
+ status = "disabled";
+ vcc-supply = <&reg_3p3v>;
+ };
+
+ /* Current measurement into module VCC */
+ hwmon: hwmon@40 {
+ compatible = "ti,ina219";
+ reg = <0x40>;
+ shunt-resistor = <10000>;
+ status = "disabled";
+ };
+
+ /* EEPROM on display adapter (MIPI DSI Display Adapter) */
+ eeprom_display_adapter: eeprom@50 {
+ compatible = "st,24c02";
+ pagesize = <16>;
+ reg = <0x50>;
+ status = "disabled";
+ };
+
+ /* EEPROM on carrier board */
+ eeprom_carrier_board: eeprom@57 {
+ compatible = "st,24c02";
+ pagesize = <16>;
+ reg = <0x57>;
+ status = "disabled";
+ };
+};
+
+&mu {
+ status = "okay";
+};
+
+/* Verdin PCIE_1 */
+&pcie {
+ clocks = <&clk IMX8MP_CLK_HSIO_AXI_DIV>,
+ <&clk IMX8MP_CLK_PCIE_AUX>,
+ <&clk IMX8MP_CLK_PCIE_PHY>,
+ <&clk IMX8MP_CLK_PCIE_ROOT>;
+ clock-names = "pcie", "pcie_aux", "pcie_phy", "pcie_bus";
+ assigned-clocks = <&clk IMX8MP_CLK_HSIO_AXI_SRC>,
+ <&clk IMX8MP_CLK_PCIE_AUX>;
+ assigned-clock-parents = <&clk IMX8MP_SYS_PLL2_500M>,
+ <&clk IMX8MP_SYS_PLL2_50M>;
+ epdev_on-supply = <&reg_3p3v>;
+ ext_osc = <0>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_pcie>;
+ reserved-region = <&rpmsg_reserved>;
+ reset-gpio = <&gpio4 19 GPIO_ACTIVE_LOW>;
+};
+
+/* Verdin PWM_1 */
+&pwm1 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_pwm_1>;
+ #pwm-cells = <3>;
+};
+
+/* Verdin PWM_2 */
+&pwm2 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_pwm_2>;
+ #pwm-cells = <3>;
+};
+
+/* VERDIN I2S_1 */
+&sai1 {
+ #sound-dai-cells = <0>;
+ assigned-clocks = <&clk IMX8MP_CLK_SAI1>;
+ assigned-clock-parents = <&clk IMX8MP_AUDIO_PLL1_OUT>;
+ assigned-clock-rates = <24576000>;
+ clocks = <&audiomix_clk IMX8MP_CLK_AUDIOMIX_SAI1_IPG>, <&clk IMX8MP_CLK_DUMMY>,
+ <&audiomix_clk IMX8MP_CLK_AUDIOMIX_SAI1_MCLK1>, <&clk IMX8MP_CLK_DUMMY>,
+ <&clk IMX8MP_CLK_DUMMY>;
+ clock-names = "bus", "mclk0", "mclk1", "mclk2", "mclk3";
+ fsl,sai-mclk-direction-output;
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_sai1>;
+};
+
+/* VERDIN I2S_2 */
+&sai3 {
+ #sound-dai-cells = <0>;
+ assigned-clocks = <&clk IMX8MP_CLK_SAI3>;
+ assigned-clock-parents = <&clk IMX8MP_AUDIO_PLL1_OUT>;
+ assigned-clock-rates = <12288000>;
+ clocks = <&audiomix_clk IMX8MP_CLK_AUDIOMIX_SAI3_IPG>, <&clk IMX8MP_CLK_DUMMY>,
+ <&audiomix_clk IMX8MP_CLK_AUDIOMIX_SAI3_MCLK1>, <&clk IMX8MP_CLK_DUMMY>,
+ <&clk IMX8MP_CLK_DUMMY>;
+ clock-names = "bus", "mclk0", "mclk1", "mclk2", "mclk3";
+ fsl,sai-mclk-direction-output;
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_sai3>;
+};
+
+&sdma2 {
+ status = "okay";
+};
+
+&snvs_pwrkey {
+ status = "okay";
+};
+
+/* Verdin UART_1 */
+&uart1 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_uart1>;
+ fsl,uart-has-rtscts;
+};
+
+/* Verdin UART_2 */
+&uart2 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_uart2>;
+ fsl,uart-has-rtscts;
+};
+
+/* Verdin UART_3, used as the Linux Console */
+&uart3 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_uart3>;
+};
+
+/* Verdin UART_4 */
+&uart4 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_uart4>;
+};
+
+/* Verdin USB_1 */
+&usb3_phy0 {
+ fsl,phy-tx-vref-tune = <6>;
+ fsl,phy-tx-rise-tune = <0>;
+ fsl,phy-tx-preemp-amp-tune = <3>;
+ fsl,phy-comp-dis-tune = <7>;
+ fsl,pcs-tx-deemph-3p5db = <0x21>;
+ fsl,phy-pcs-tx-swing-full = <0x7f>;
+ vbus-supply = <&reg_usb0_vbus>;
+};
+
+&usb_dwc3_0 {
+// dr_mode = "otg";
+ dr_mode = "peripheral";
+ hnp-disable;
+ srp-disable;
+ adp-disable;
+ usb-role-switch;
+};
+
+/* Verdin USB_2 */
+&usb3_phy1 {
+ fsl,phy-tx-preemp-amp-tune = <2>;
+ vbus-supply = <&reg_usb1_vbus>;
+};
+
+&usb_dwc3_1 {
+ dr_mode = "host";
+};
+
+/* Verdin SD_1 */
+&usdhc2 {
+ bus-width = <4>;
+ cd-gpios = <&gpio2 12 GPIO_ACTIVE_LOW>;
+ disable-wp;
+ pinctrl-names = "default", "state_100mhz", "state_200mhz";
+ pinctrl-0 = <&pinctrl_usdhc2>, <&pinctrl_usdhc2_cd>;
+ pinctrl-1 = <&pinctrl_usdhc2_100mhz>, <&pinctrl_usdhc2_cd>;
+ pinctrl-2 = <&pinctrl_usdhc2_200mhz>, <&pinctrl_usdhc2_cd>;
+ vmmc-supply = <&reg_usdhc2_vmmc>;
+};
+
+/* On-module eMMC */
+&usdhc3 {
+ bus-width = <8>;
+ keep-power-in-suspend;
+ non-removable;
+ pinctrl-names = "default", "state_100mhz", "state_200mhz";
+ pinctrl-0 = <&pinctrl_usdhc3>;
+ pinctrl-1 = <&pinctrl_usdhc3_100mhz>;
+ pinctrl-2 = <&pinctrl_usdhc3_200mhz>;
+ pm-ignore-notify;
+ status = "okay";
+ /* TODO Strobe */
+};
+
+&vpu_g1 {
+ status = "okay";
+};
+
+&vpu_g2 {
+ status = "okay";
+};
+
+&vpu_vc8000e {
+ status = "okay";
+};
+
+&wdog1 {
+ fsl,ext-reset-output;
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_wdog>;
+ status = "okay";
+};
+
+&iomuxc {
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_gpio3>, <&pinctrl_gpio4>, <&pinctrl_gpio7>,
+ <&pinctrl_gpio8>, <&pinctrl_gpio_hog1>,
+ <&pinctrl_gpio_hog2>, <&pinctrl_gpio_hog3>,
+ <&pinctrl_hdmi_hog>, <&pinctrl_pmic_tpm_ena>;
+
+ pinctrl_ctrl_sleep_moci: ctrlsleepmocigrp {
+ fsl,pins = <
+ MX8MP_IOMUXC_SAI3_RXC__GPIO4_IO29 0x1c4 /* CTRL_SLEEP_MOCI */
+ >;
+ };
+
+ pinctrl_ecspi1: ecspi1grp {
+ fsl,pins = <
+ MX8MP_IOMUXC_ECSPI1_SCLK__ECSPI1_SCLK 0x4 /* SODIMM 196 */
+ MX8MP_IOMUXC_ECSPI1_MOSI__ECSPI1_MOSI 0x4 /* SODIMM 200 */
+ MX8MP_IOMUXC_ECSPI1_MISO__ECSPI1_MISO 0x1c4 /* SODIMM 198 */
+ MX8MP_IOMUXC_ECSPI1_SS0__GPIO5_IO09 0x1c4 /* SODIMM 202 */
+ >;
+ };
+
+ /* Connection On Board PHY */
+ pinctrl_eqos: eqosgrp {
+ fsl,pins = <
+ MX8MP_IOMUXC_ENET_MDC__ENET_QOS_MDC 0x3
+ MX8MP_IOMUXC_ENET_MDIO__ENET_QOS_MDIO 0x3
+ MX8MP_IOMUXC_ENET_RD0__ENET_QOS_RGMII_RD0 0x91
+ MX8MP_IOMUXC_ENET_RD1__ENET_QOS_RGMII_RD1 0x91
+ MX8MP_IOMUXC_ENET_RD2__ENET_QOS_RGMII_RD2 0x91
+ MX8MP_IOMUXC_ENET_RD3__ENET_QOS_RGMII_RD3 0x91
+ MX8MP_IOMUXC_ENET_RXC__CCM_ENET_QOS_CLOCK_GENERATE_RX_CLK 0x91
+ MX8MP_IOMUXC_ENET_RX_CTL__ENET_QOS_RGMII_RX_CTL 0x91
+ MX8MP_IOMUXC_ENET_TD0__ENET_QOS_RGMII_TD0 0x1f
+ MX8MP_IOMUXC_ENET_TD1__ENET_QOS_RGMII_TD1 0x1f
+ MX8MP_IOMUXC_ENET_TD2__ENET_QOS_RGMII_TD2 0x1f
+ MX8MP_IOMUXC_ENET_TD3__ENET_QOS_RGMII_TD3 0x1f
+ MX8MP_IOMUXC_ENET_TX_CTL__ENET_QOS_RGMII_TX_CTL 0x1f
+ MX8MP_IOMUXC_ENET_TXC__CCM_ENET_QOS_CLOCK_GENERATE_TX_CLK 0x1f
+ MX8MP_IOMUXC_GPIO1_IO10__GPIO1_IO10 0x1c4
+ >;
+ };
+
+ pinctrl_eqos_sleep: eqossleepgrp {
+ fsl,pins = <
+ MX8MP_IOMUXC_ENET_MDC__ENET_QOS_MDC 0x3
+ MX8MP_IOMUXC_ENET_MDIO__ENET_QOS_MDIO 0x3
+ MX8MP_IOMUXC_ENET_RD0__ENET_QOS_RGMII_RD0 0x91
+ MX8MP_IOMUXC_ENET_RD1__ENET_QOS_RGMII_RD1 0x91
+ MX8MP_IOMUXC_ENET_RD2__ENET_QOS_RGMII_RD2 0x91
+ MX8MP_IOMUXC_ENET_RD3__ENET_QOS_RGMII_RD3 0x91
+ MX8MP_IOMUXC_ENET_RXC__CCM_ENET_QOS_CLOCK_GENERATE_RX_CLK 0x91
+ MX8MP_IOMUXC_ENET_RX_CTL__ENET_QOS_RGMII_RX_CTL 0x91
+ MX8MP_IOMUXC_ENET_TD0__GPIO1_IO21 0x1f
+ MX8MP_IOMUXC_ENET_TD1__GPIO1_IO20 0x1f
+ MX8MP_IOMUXC_ENET_TD2__GPIO1_IO19 0x1f
+ MX8MP_IOMUXC_ENET_TD3__GPIO1_IO18 0x1f
+ MX8MP_IOMUXC_ENET_TX_CTL__GPIO1_IO22 0x1f
+ MX8MP_IOMUXC_ENET_TXC__GPIO1_IO23 0x1f
+ MX8MP_IOMUXC_GPIO1_IO10__GPIO1_IO10 0x184
+ >;
+ };
+
+ /* Connection Carrier Board PHY ETH_2 */
+ pinctrl_fec: fecgrp {
+ fsl,pins = <
+ MX8MP_IOMUXC_SAI1_RXD2__ENET1_MDC 0x3
+ MX8MP_IOMUXC_SAI1_RXD3__ENET1_MDIO 0x3
+ MX8MP_IOMUXC_SAI1_RXD4__ENET1_RGMII_RD0 0x91
+ MX8MP_IOMUXC_SAI1_RXD5__ENET1_RGMII_RD1 0x91
+ MX8MP_IOMUXC_SAI1_RXD6__ENET1_RGMII_RD2 0x91
+ MX8MP_IOMUXC_SAI1_RXD7__ENET1_RGMII_RD3 0x91
+ MX8MP_IOMUXC_SAI1_TXC__ENET1_RGMII_RXC 0x91
+ MX8MP_IOMUXC_SAI1_TXFS__ENET1_RGMII_RX_CTL 0x91
+ MX8MP_IOMUXC_SAI1_TXD0__ENET1_RGMII_TD0 0x1f
+ MX8MP_IOMUXC_SAI1_TXD1__ENET1_RGMII_TD1 0x1f
+ MX8MP_IOMUXC_SAI1_TXD2__ENET1_RGMII_TD2 0x1f
+ MX8MP_IOMUXC_SAI1_TXD3__ENET1_RGMII_TD3 0x1f
+ MX8MP_IOMUXC_SAI1_TXD4__ENET1_RGMII_TX_CTL 0x1f
+ MX8MP_IOMUXC_SAI1_TXD5__ENET1_RGMII_TXC 0x1f
+ MX8MP_IOMUXC_SAI1_TXD6__GPIO4_IO18 0x1c4 /* SODIMM 189 */
+ >;
+ };
+
+ pinctrl_fec_sleep: fecsleepgrp {
+ fsl,pins = <
+ MX8MP_IOMUXC_SAI1_RXD2__ENET1_MDC 0x3 /* SODIMM 193 */
+ MX8MP_IOMUXC_SAI1_RXD3__ENET1_MDIO 0x3 /* SODIMM 191 */
+ MX8MP_IOMUXC_SAI1_RXD4__ENET1_RGMII_RD0 0x91 /* SODIMM 201 */
+ MX8MP_IOMUXC_SAI1_RXD5__ENET1_RGMII_RD1 0x91 /* SODIMM 203 */
+ MX8MP_IOMUXC_SAI1_RXD6__ENET1_RGMII_RD2 0x91 /* SODIMM 205 */
+ MX8MP_IOMUXC_SAI1_RXD7__ENET1_RGMII_RD3 0x91 /* SODIMM 207 */
+ MX8MP_IOMUXC_SAI1_TXC__ENET1_RGMII_RXC 0x91 /* SODIMM 197 */
+ MX8MP_IOMUXC_SAI1_TXFS__ENET1_RGMII_RX_CTL 0x91 /* SODIMM 199 */
+ MX8MP_IOMUXC_SAI1_TXD0__GPIO4_IO12 0x1f /* SODIMM 221 */
+ MX8MP_IOMUXC_SAI1_TXD1__GPIO4_IO13 0x1f /* SODIMM 219 */
+ MX8MP_IOMUXC_SAI1_TXD2__GPIO4_IO14 0x1f /* SODIMM 217 */
+ MX8MP_IOMUXC_SAI1_TXD3__GPIO4_IO15 0x1f /* SODIMM 215 */
+ MX8MP_IOMUXC_SAI1_TXD4__GPIO4_IO16 0x1f /* SODIMM 211 */
+ MX8MP_IOMUXC_SAI1_TXD5__GPIO4_IO17 0x1f /* SODIMM 213 */
+ MX8MP_IOMUXC_SAI1_TXD6__GPIO4_IO18 0x184 /* SODIMM 189 */
+ >;
+ };
+
+ pinctrl_flexcan1: flexcan1grp {
+ fsl,pins = <
+ MX8MP_IOMUXC_SPDIF_RX__CAN1_RX 0x154 /* SODIMM 22 */
+ MX8MP_IOMUXC_SPDIF_TX__CAN1_TX 0x154 /* SODIMM 20 */
+ >;
+ };
+
+ pinctrl_flexcan2: flexcan2grp {
+ fsl,pins = <
+ MX8MP_IOMUXC_SAI2_MCLK__CAN2_RX 0x154 /* SODIMM 26 */
+ MX8MP_IOMUXC_SAI2_TXD0__CAN2_TX 0x154 /* SODIMM 24 */
+ >;
+ };
+
+ pinctrl_flexspi0: flexspi0grp {
+ fsl,pins = <
+ MX8MP_IOMUXC_NAND_ALE__FLEXSPI_A_SCLK 0x1c2 /* SODIMM 52 */
+ MX8MP_IOMUXC_NAND_CE0_B__FLEXSPI_A_SS0_B 0x82 /* SODIMM 54 */
+ MX8MP_IOMUXC_NAND_READY_B__GPIO3_IO16 0x82 /* SODIMM 64 */
+ MX8MP_IOMUXC_NAND_DQS__FLEXSPI_A_DQS 0x82 /* SODIMM 66 */
+ MX8MP_IOMUXC_NAND_DATA00__FLEXSPI_A_DATA00 0x82 /* SODIMM 56 */
+ MX8MP_IOMUXC_NAND_DATA01__FLEXSPI_A_DATA01 0x82 /* SODIMM 58 */
+ MX8MP_IOMUXC_NAND_DATA02__FLEXSPI_A_DATA02 0x82 /* SODIMM 60 */
+ MX8MP_IOMUXC_NAND_DATA03__FLEXSPI_A_DATA03 0x82 /* SODIMM 62 */
+ >;
+ };
+
+ pinctrl_gpio3: gpio3grp {
+ fsl,pins = <
+ MX8MP_IOMUXC_GPIO1_IO05__GPIO1_IO05 0x184 /* SODIMM 210 */
+ >;
+ };
+
+ pinctrl_gpio4: gpio4grp {
+ fsl,pins = <
+ MX8MP_IOMUXC_GPIO1_IO06__GPIO1_IO06 0x184 /* SODIMM 212 */
+ >;
+ };
+
+ pinctrl_gpio5: gpio5grp {
+ fsl,pins = <
+ MX8MP_IOMUXC_GPIO1_IO07__GPIO1_IO07 0x184 /* SODIMM 216 */
+ >;
+ };
+
+ pinctrl_gpio6: gpio6grp {
+ fsl,pins = <
+ MX8MP_IOMUXC_GPIO1_IO08__GPIO1_IO08 0x184 /* SODIMM 218 */
+ >;
+ };
+
+ pinctrl_gpio7: gpio7grp {
+ fsl,pins = <
+ MX8MP_IOMUXC_SAI1_RXD1__GPIO4_IO03 0x184 /* SODIMM 220 */
+ >;
+ };
+
+ pinctrl_gpio8: gpio8grp {
+ fsl,pins = <
+ MX8MP_IOMUXC_SAI1_RXC__GPIO4_IO01 0x184 /* SODIMM 222 */
+ >;
+ };
+
+ pinctrl_gpio_hog1: gpiohog1grp {
+ fsl,pins = <
+ MX8MP_IOMUXC_ECSPI2_MISO__GPIO5_IO12 0x1c4 /* SODIMM 116 */
+ MX8MP_IOMUXC_ECSPI2_MOSI__GPIO5_IO11 0x1c4 /* SODIMM 152 */
+ MX8MP_IOMUXC_ECSPI2_SCLK__GPIO5_IO10 0x1c4 /* SODIMM 164 */
+ MX8MP_IOMUXC_ECSPI2_SS0__GPIO5_IO13 0x1c4 /* SODIMM 128 */
+ >;
+ };
+
+ pinctrl_gpio_hog2: gpiohog2grp {
+ fsl,pins = <
+ MX8MP_IOMUXC_SAI3_MCLK__GPIO5_IO02 0x1c4 /* SODIMM 91 */
+ >;
+ };
+
+ pinctrl_gpio_hog3: gpiohog3grp {
+ fsl,pins = <
+ MX8MP_IOMUXC_GPIO1_IO13__GPIO1_IO13 0x1c4 /* SODIMM 157 */
+ MX8MP_IOMUXC_GPIO1_IO15__GPIO1_IO15 0x1c4 /* SODIMM 187 */
+ >;
+ };
+
+ pinctrl_gpio_keys: gpiokeysgrp {
+ fsl,pins = <
+ MX8MP_IOMUXC_SAI1_RXFS__GPIO4_IO00 0x1c4 /* SODIMM 252 */
+ >;
+ };
+
+ pinctrl_hdmi_hog: hdmihoggrp {
+ fsl,pins = <
+ MX8MP_IOMUXC_HDMI_DDC_SCL__HDMIMIX_EARC_SCL 0x400001c3 /* SODIMM 59 */
+ MX8MP_IOMUXC_HDMI_DDC_SDA__HDMIMIX_EARC_SDA 0x400001c3 /* SODIMM 57 */
+ MX8MP_IOMUXC_HDMI_HPD__HDMIMIX_EARC_DC_HPD 0x40000019 /* SODIMM 61 */
+ MX8MP_IOMUXC_HDMI_CEC__HDMIMIX_EARC_CEC 0x40000019 /* SODIMM 63 */
+ >;
+ };
+
+ /* On-module I2C */
+ pinctrl_i2c1: i2c1grp {
+ fsl,pins = <
+ MX8MP_IOMUXC_I2C1_SCL__I2C1_SCL 0x400001c6 /* PMIC_I2C_SCL */
+ MX8MP_IOMUXC_I2C1_SDA__I2C1_SDA 0x400001c6 /* PMIC_I2C_SDA */
+ >;
+ };
+
+ pinctrl_i2c1_gpio: i2c1gpiogrp {
+ fsl,pins = <
+ MX8MP_IOMUXC_I2C1_SCL__GPIO5_IO14 0x400001c6 /* PMIC_I2C_SCL */
+ MX8MP_IOMUXC_I2C1_SDA__GPIO5_IO15 0x400001c6 /* PMIC_I2C_SDA */
+ >;
+ };
+
+ /* Verdin I2C_2_DSI */
+ pinctrl_i2c2: i2c2grp {
+ fsl,pins = <
+ MX8MP_IOMUXC_I2C2_SCL__I2C2_SCL 0x400001c6 /* SODIMM 55 */
+ MX8MP_IOMUXC_I2C2_SDA__I2C2_SDA 0x400001c6 /* SODIMM 53 */
+ >;
+ };
+
+ pinctrl_i2c2_gpio: i2c2gpiogrp {
+ fsl,pins = <
+ MX8MP_IOMUXC_I2C2_SCL__GPIO5_IO16 0x400001c6 /* SODIMM 55 */
+ MX8MP_IOMUXC_I2C2_SDA__GPIO5_IO17 0x400001c6 /* SODIMM 53 */
+ >;
+ };
+
+ /* Verdin I2C_4_CSI */
+ pinctrl_i2c3: i2c3grp {
+ fsl,pins = <
+ MX8MP_IOMUXC_I2C3_SCL__I2C3_SCL 0x400001c6 /* SODIMM 95 */
+ MX8MP_IOMUXC_I2C3_SDA__I2C3_SDA 0x400001c6 /* SODIMM 93 */
+ >;
+ };
+
+ pinctrl_i2c3_gpio: i2c3gpiogrp {
+ fsl,pins = <
+ MX8MP_IOMUXC_I2C3_SCL__GPIO5_IO18 0x400001c6 /* SODIMM 95 */
+ MX8MP_IOMUXC_I2C3_SDA__GPIO5_IO19 0x400001c6 /* SODIMM 93 */
+ >;
+ };
+
+ /* Verdin I2C_1 */
+ pinctrl_i2c4: i2c4grp {
+ fsl,pins = <
+ MX8MP_IOMUXC_I2C4_SCL__I2C4_SCL 0x400001c6 /* SODIMM 14 */
+ MX8MP_IOMUXC_I2C4_SDA__I2C4_SDA 0x400001c6 /* SODIMM 12 */
+ >;
+ };
+
+ pinctrl_i2c4_gpio: i2c4gpiogrp {
+ fsl,pins = <
+ MX8MP_IOMUXC_I2C4_SCL__GPIO5_IO20 0x400001c6 /* SODIMM 14 */
+ MX8MP_IOMUXC_I2C4_SDA__GPIO5_IO21 0x400001c6 /* SODIMM 12 */
+ >;
+ };
+
+ /* Verdin MEZ_DSI_1_BKL_EN */
+ pinctrl_mez_dsi_1_bkl_en: mezdsi1bklengrp {
+ fsl,pins = <
+ MX8MP_IOMUXC_SAI3_RXFS__GPIO4_IO28 0x1c4 /* SODIMM 21 */
+ >;
+ };
+
+ /* Verdin MEZ_DSI_1_INT HPD (pulled-down as active-high) */
+ pinctrl_mez_dsi_1_int_hpd: mezdsi1inthpdgrp {
+ fsl,pins = <
+ MX8MP_IOMUXC_SAI2_TXC__GPIO4_IO25 0x184 /* SODIMM 17 */
+ >;
+ };
+
+ /* Verdin MEZ_DSI_1_INT# (pulled-up as active-low) */
+ pinctrl_mez_dsi_1_int_n: mezdsi1intngrp {
+ fsl,pins = <
+ MX8MP_IOMUXC_SAI2_TXC__GPIO4_IO25 0x1c4 /* SODIMM 17 */
+ >;
+ };
+
+ /* MEZ_GPIO_1 shared with MEZ_DSI_1_INT on Verdin DSI to HDMI Display Adapter */
+ pinctrl_mez_gpio1: mezgpio1grp {
+ fsl,pins = <
+ MX8MP_IOMUXC_GPIO1_IO00__GPIO1_IO00 0x184 /* SODIMM 206 */
+ >;
+ };
+
+ pinctrl_mez_gpio2: mezgpio2grp {
+ fsl,pins = <
+ MX8MP_IOMUXC_GPIO1_IO01__GPIO1_IO01 0x1c4 /* SODIMM 208 */
+ >;
+ };
+
+ pinctrl_pcie: pciegrp {
+ fsl,pins = <
+ MX8MP_IOMUXC_SAI1_TXD7__GPIO4_IO19 0x4 /* SODIMM 244 */
+ MX8MP_IOMUXC_SD2_RESET_B__GPIO2_IO19 0x1c4 /* PMIC_EN_PCIe_CLK, unused */
+ >;
+ };
+
+ pinctrl_pmic: pmicirqgrp {
+ fsl,pins = <
+ MX8MP_IOMUXC_GPIO1_IO03__GPIO1_IO03 0x1c4 /* PMIC_INT# */
+ >;
+ };
+
+ pinctrl_pwm_1: pwm1grp {
+ fsl,pins = <
+ MX8MP_IOMUXC_SPDIF_EXT_CLK__PWM1_OUT 0x6 /* SODIMM 15 */
+ >;
+ };
+
+ pinctrl_pwm_2: pwm2grp {
+ fsl,pins = <
+ MX8MP_IOMUXC_GPIO1_IO11__PWM2_OUT 0x6 /* SODIMM 16 */
+ >;
+ };
+
+ pinctrl_pwm_3: pwm3grp {
+ fsl,pins = <
+ MX8MP_IOMUXC_SAI5_RXC__PWM3_OUT 0x6 /* SODIMM 19 */
+ >;
+ };
+
+ pinctrl_reg_eth: regethgrp {
+ fsl,pins = <
+ MX8MP_IOMUXC_SD2_WP__GPIO2_IO20 0x184 /* PMIC_EN_ETH */
+ >;
+ };
+
+ pinctrl_reg_usb1_en: regusb1engrp {
+ fsl,pins = <
+ MX8MP_IOMUXC_GPIO1_IO12__GPIO1_IO12 0x184 /* SODIMM 155 */
+ >;
+ };
+
+ pinctrl_reg_usb2_en: regusb2engrp {
+ fsl,pins = <
+ MX8MP_IOMUXC_GPIO1_IO14__GPIO1_IO14 0x184 /* SODIMM 185 */
+ >;
+ };
+
+ pinctrl_sai1: sai1grp {
+ fsl,pins = <
+ MX8MP_IOMUXC_SAI5_RXD1__AUDIOMIX_SAI1_TX_SYNC 0xd6 /* SODIMM 32 */
+ MX8MP_IOMUXC_SAI5_MCLK__AUDIOMIX_SAI1_TX_BCLK 0xd6 /* SODIMM 30 */
+ MX8MP_IOMUXC_SAI1_MCLK__AUDIOMIX_SAI1_MCLK 0xd6 /* SODIMM 38 */
+ MX8MP_IOMUXC_SAI1_RXD0__AUDIOMIX_SAI1_RX_DATA00 0xd6 /* SODIMM 36 */
+ MX8MP_IOMUXC_SAI5_RXFS__AUDIOMIX_SAI1_TX_DATA00 0xd6 /* SODIMM 34 */
+ >;
+ };
+
+ pinctrl_sai3: sai3grp {
+ fsl,pins = <
+ MX8MP_IOMUXC_SAI3_RXD__AUDIOMIX_SAI3_RX_DATA00 0xd6 /* SODIMM 48 */
+ MX8MP_IOMUXC_SAI3_TXFS__AUDIOMIX_SAI3_TX_SYNC 0xd6 /* SODIMM 44 */
+ MX8MP_IOMUXC_SAI3_TXC__AUDIOMIX_SAI3_TX_BCLK 0xd6 /* SODIMM 42 */
+ MX8MP_IOMUXC_SAI3_TXD__AUDIOMIX_SAI3_TX_DATA00 0xd6 /* SODIMM 46 */
+ >;
+ };
+
+ /* ctrl signal for optional ATTPM20P */
+ pinctrl_pmic_tpm_ena: pmictpmenagrp {
+ fsl,pins = <
+ MX8MP_IOMUXC_SD1_RESET_B__GPIO2_IO10 0x1c4 /* PMIC_TPM_ENA */
+ >;
+ };
+
+ pinctrl_uart1: uart1grp {
+ fsl,pins = <
+ MX8MP_IOMUXC_UART1_RXD__UART1_DCE_RX 0x1c4 /* SODIMM 129 */
+ MX8MP_IOMUXC_UART1_TXD__UART1_DCE_TX 0x1c4 /* SODIMM 131 */
+ MX8MP_IOMUXC_SAI2_TXFS__UART1_DCE_CTS 0x1c4 /* SODIMM 133 */
+ MX8MP_IOMUXC_SAI2_RXD0__UART1_DCE_RTS 0x1c4 /* SODIMM 135 */
+ >;
+ };
+
+ pinctrl_uart2: uart2grp {
+ fsl,pins = <
+ MX8MP_IOMUXC_UART2_RXD__UART2_DCE_RX 0x1c4 /* SODIMM 137 */
+ MX8MP_IOMUXC_UART2_TXD__UART2_DCE_TX 0x1c4 /* SODIMM 139 */
+ MX8MP_IOMUXC_SD1_DATA5__UART2_DCE_CTS 0x1c4 /* SODIMM 141 */
+ MX8MP_IOMUXC_SD1_DATA4__UART2_DCE_RTS 0x1c4 /* SODIMM 143 */
+ >;
+ };
+
+ pinctrl_uart3: uart3grp {
+ fsl,pins = <
+ MX8MP_IOMUXC_UART3_RXD__UART3_DCE_RX 0x1c4 /* SODIMM 147 */
+ MX8MP_IOMUXC_UART3_TXD__UART3_DCE_TX 0x1c4 /* SODIMM 149 */
+ >;
+ };
+
+ pinctrl_uart4: uart4grp {
+ fsl,pins = <
+ MX8MP_IOMUXC_UART4_TXD__UART4_DCE_TX 0x1c4 /* SODIMM 151 */
+ MX8MP_IOMUXC_UART4_RXD__UART4_DCE_RX 0x1c4 /* SODIMM 153 */
+ >;
+ };
+
+ /* On-module Wi-Fi/BT or SDHC interface on the X52 extention slot */
+ pinctrl_usdhc1: usdhc1grp {
+ fsl,pins = <
+ MX8MP_IOMUXC_SD1_CLK__USDHC1_CLK 0x190
+ MX8MP_IOMUXC_SD1_CMD__USDHC1_CMD 0x1d0
+ MX8MP_IOMUXC_SD1_DATA0__USDHC1_DATA0 0x1d0
+ MX8MP_IOMUXC_SD1_DATA1__USDHC1_DATA1 0x1d0
+ MX8MP_IOMUXC_SD1_DATA2__USDHC1_DATA2 0x1d0
+ MX8MP_IOMUXC_SD1_DATA3__USDHC1_DATA3 0x1d0
+ >;
+ };
+
+ pinctrl_usdhc1_100mhz: usdhc1grp-100mhz {
+ fsl,pins = <
+ MX8MP_IOMUXC_SD1_CLK__USDHC1_CLK 0x194
+ MX8MP_IOMUXC_SD1_CMD__USDHC1_CMD 0x1d4
+ MX8MP_IOMUXC_SD1_DATA0__USDHC1_DATA0 0x1d4
+ MX8MP_IOMUXC_SD1_DATA1__USDHC1_DATA1 0x1d4
+ MX8MP_IOMUXC_SD1_DATA2__USDHC1_DATA2 0x1d4
+ MX8MP_IOMUXC_SD1_DATA3__USDHC1_DATA3 0x1d4
+ >;
+ };
+
+ pinctrl_usdhc1_200mhz: usdhc1grp-200mhz {
+ fsl,pins = <
+ MX8MP_IOMUXC_SD1_CLK__USDHC1_CLK 0x196
+ MX8MP_IOMUXC_SD1_CMD__USDHC1_CMD 0x1d6
+ MX8MP_IOMUXC_SD1_DATA0__USDHC1_DATA0 0x1d6
+ MX8MP_IOMUXC_SD1_DATA1__USDHC1_DATA1 0x1d6
+ MX8MP_IOMUXC_SD1_DATA2__USDHC1_DATA2 0x1d6
+ MX8MP_IOMUXC_SD1_DATA3__USDHC1_DATA3 0x1d6
+ >;
+ };
+
+ pinctrl_usdhc2_cd: usdhc2cdgrp {
+ fsl,pins = <
+ MX8MP_IOMUXC_SD2_CD_B__GPIO2_IO12 0x1c4 /* SODIMM 84 */
+ >;
+ };
+
+ pinctrl_usdhc2_pwr_en: usdhc2pwrengrp {
+ fsl,pins = <
+ MX8MP_IOMUXC_SAI2_RXC__GPIO4_IO22 0x4 /* SODIMM 76 */
+ >;
+ };
+
+ pinctrl_usdhc2: usdhc2grp {
+ fsl,pins = <
+ MX8MP_IOMUXC_SD2_CLK__USDHC2_CLK 0x190 /* SODIMM 78 */
+ MX8MP_IOMUXC_SD2_CMD__USDHC2_CMD 0x1d0 /* SODIMM 74 */
+ MX8MP_IOMUXC_SD2_DATA0__USDHC2_DATA0 0x1d0 /* SODIMM 80 */
+ MX8MP_IOMUXC_SD2_DATA1__USDHC2_DATA1 0x1d0 /* SODIMM 82 */
+ MX8MP_IOMUXC_SD2_DATA2__USDHC2_DATA2 0x1d0 /* SODIMM 70 */
+ MX8MP_IOMUXC_SD2_DATA3__USDHC2_DATA3 0x1d0 /* SODIMM 72 */
+ MX8MP_IOMUXC_GPIO1_IO04__USDHC2_VSELECT 0x4
+ >;
+ };
+
+ pinctrl_usdhc2_100mhz: usdhc2grp-100mhz {
+ fsl,pins = <
+ MX8MP_IOMUXC_SD2_CLK__USDHC2_CLK 0x194
+ MX8MP_IOMUXC_SD2_CMD__USDHC2_CMD 0x1d4
+ MX8MP_IOMUXC_SD2_DATA0__USDHC2_DATA0 0x1d4
+ MX8MP_IOMUXC_SD2_DATA1__USDHC2_DATA1 0x1d4
+ MX8MP_IOMUXC_SD2_DATA2__USDHC2_DATA2 0x1d4
+ MX8MP_IOMUXC_SD2_DATA3__USDHC2_DATA3 0x1d4
+ MX8MP_IOMUXC_GPIO1_IO04__USDHC2_VSELECT 0x4
+ >;
+ };
+
+ pinctrl_usdhc2_200mhz: usdhc2grp-200mhz {
+ fsl,pins = <
+ MX8MP_IOMUXC_SD2_CLK__USDHC2_CLK 0x196
+ MX8MP_IOMUXC_SD2_CMD__USDHC2_CMD 0x1d6
+ MX8MP_IOMUXC_SD2_DATA0__USDHC2_DATA0 0x1d6
+ MX8MP_IOMUXC_SD2_DATA1__USDHC2_DATA1 0x1d6
+ MX8MP_IOMUXC_SD2_DATA2__USDHC2_DATA2 0x1d6
+ MX8MP_IOMUXC_SD2_DATA3__USDHC2_DATA3 0x1d6
+ MX8MP_IOMUXC_GPIO1_IO04__USDHC2_VSELECT 0x4
+ >;
+ };
+
+ pinctrl_usdhc3: usdhc3grp {
+ fsl,pins = <
+ MX8MP_IOMUXC_NAND_WE_B__USDHC3_CLK 0x190
+ MX8MP_IOMUXC_NAND_WP_B__USDHC3_CMD 0x1d0
+ MX8MP_IOMUXC_NAND_DATA04__USDHC3_DATA0 0x1d0
+ MX8MP_IOMUXC_NAND_DATA05__USDHC3_DATA1 0x1d0
+ MX8MP_IOMUXC_NAND_DATA06__USDHC3_DATA2 0x1d0
+ MX8MP_IOMUXC_NAND_DATA07__USDHC3_DATA3 0x1d0
+ MX8MP_IOMUXC_NAND_RE_B__USDHC3_DATA4 0x1d0
+ MX8MP_IOMUXC_NAND_CE2_B__USDHC3_DATA5 0x1d0
+ MX8MP_IOMUXC_NAND_CE3_B__USDHC3_DATA6 0x1d0
+ MX8MP_IOMUXC_NAND_CLE__USDHC3_DATA7 0x1d0
+ MX8MP_IOMUXC_NAND_CE1_B__USDHC3_STROBE 0x190
+ >;
+ };
+
+ pinctrl_usdhc3_100mhz: usdhc3grp-100mhz {
+ fsl,pins = <
+ MX8MP_IOMUXC_NAND_WE_B__USDHC3_CLK 0x194
+ MX8MP_IOMUXC_NAND_WP_B__USDHC3_CMD 0x1d4
+ MX8MP_IOMUXC_NAND_DATA04__USDHC3_DATA0 0x1d4
+ MX8MP_IOMUXC_NAND_DATA05__USDHC3_DATA1 0x1d4
+ MX8MP_IOMUXC_NAND_DATA06__USDHC3_DATA2 0x1d4
+ MX8MP_IOMUXC_NAND_DATA07__USDHC3_DATA3 0x1d4
+ MX8MP_IOMUXC_NAND_RE_B__USDHC3_DATA4 0x1d4
+ MX8MP_IOMUXC_NAND_CE2_B__USDHC3_DATA5 0x1d4
+ MX8MP_IOMUXC_NAND_CE3_B__USDHC3_DATA6 0x1d4
+ MX8MP_IOMUXC_NAND_CLE__USDHC3_DATA7 0x1d4
+ MX8MP_IOMUXC_NAND_CE1_B__USDHC3_STROBE 0x194
+ >;
+ };
+
+ pinctrl_usdhc3_200mhz: usdhc3grp-200mhz {
+ fsl,pins = <
+ MX8MP_IOMUXC_NAND_WE_B__USDHC3_CLK 0x196
+ MX8MP_IOMUXC_NAND_WP_B__USDHC3_CMD 0x1d6
+ MX8MP_IOMUXC_NAND_DATA04__USDHC3_DATA0 0x1d6
+ MX8MP_IOMUXC_NAND_DATA05__USDHC3_DATA1 0x1d6
+ MX8MP_IOMUXC_NAND_DATA06__USDHC3_DATA2 0x1d6
+ MX8MP_IOMUXC_NAND_DATA07__USDHC3_DATA3 0x1d6
+ MX8MP_IOMUXC_NAND_RE_B__USDHC3_DATA4 0x1d6
+ MX8MP_IOMUXC_NAND_CE2_B__USDHC3_DATA5 0x1d6
+ MX8MP_IOMUXC_NAND_CE3_B__USDHC3_DATA6 0x1d6
+ MX8MP_IOMUXC_NAND_CLE__USDHC3_DATA7 0x1d6
+ MX8MP_IOMUXC_NAND_CE1_B__USDHC3_STROBE 0x196
+ MX8MP_IOMUXC_GPIO1_IO09__USDHC3_RESET_B 0x1d1
+ >;
+ };
+
+ pinctrl_wdog: wdoggrp {
+ fsl,pins = <
+ MX8MP_IOMUXC_GPIO1_IO02__WDOG1_WDOG_B 0x1c4 /* PMIC_WDI */
+ >;
+ };
+
+ pinctrl_wifi_ctrl: wifictrlgrp {
+ fsl,pins = <
+ MX8MP_IOMUXC_SD1_DATA6__GPIO2_IO08 0x1c4 /* WIFI_WKUP_BT */
+ MX8MP_IOMUXC_SD1_DATA7__GPIO2_IO09 0x1c4 /* WIFI_WKUP_WLAN */
+ >;
+ };
+
+ pinctrl_wifi_i2s: bti2sgrp {
+ fsl,pins = <
+ MX8MP_IOMUXC_SAI5_RXD2__AUDIOMIX_SAI5_TX_BCLK 0xd6 /* WIFI_TX_BCLK */
+ MX8MP_IOMUXC_SAI5_RXD0__AUDIOMIX_SAI5_RX_DATA00 0xd6 /* WIFI_TX_DATA0 */
+ MX8MP_IOMUXC_SAI2_RXFS__AUDIOMIX_SAI5_TX_SYNC 0xd6 /* WIFI_TX_SYNC */
+ MX8MP_IOMUXC_SAI5_RXD3__AUDIOMIX_SAI5_TX_DATA00 0xd6 /* WIFI_RX_DATA0 */
+ >;
+ };
+
+ pinctrl_wifi_pwr_en: wifipwrengrp {
+ fsl,pins = <
+ MX8MP_IOMUXC_SD1_STROBE__GPIO2_IO11 0x184 /* PMIC_EN_WIFI */
+ >;
+ };
+};