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-rw-r--r--Documentation/devicetree/bindings/mtd/fsl-quadspi.txt16
1 files changed, 16 insertions, 0 deletions
diff --git a/Documentation/devicetree/bindings/mtd/fsl-quadspi.txt b/Documentation/devicetree/bindings/mtd/fsl-quadspi.txt
index c34aa6f8a424..951655466a11 100644
--- a/Documentation/devicetree/bindings/mtd/fsl-quadspi.txt
+++ b/Documentation/devicetree/bindings/mtd/fsl-quadspi.txt
@@ -1,5 +1,11 @@
* Freescale Quad Serial Peripheral Interface(QuadSPI)
+The QuadSPI controller acts as the SPI master. It is described with a node
+for the controller and a set of child nodes for each SPI NOR flash.
+
+Part I - The DT node for the controller:
+------------------------------
+
Required properties:
- compatible : Should be "fsl,vf610-qspi", "fsl,imx6sx-qspi",
"fsl,imx7d-qspi", "fsl,imx6ul-qspi",
@@ -24,6 +30,16 @@ Optional properties:
(Please check the board's schematic.)
- big-endian : That means the IP register is big endian
+Part II - The DT nodes for each SPI NOR flash
+------------------------------
+Required properties:
+- spi-max-frequency : Maximum frequency of the SPI bus the chip can operate at
+
+Optional properties:
+ Please refer to the Documentation/devicetree/bindings/mtd/spi-nor-flash.txt
+ If you set the "spi-nor,ddr-quad-read-dummy", it means you enable the DDR
+ quad read feature for the driver.
+
Example:
qspi0: quadspi@40044000 {