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-rw-r--r--Documentation/devicetree/bindings/display/bridge/sec_dsim.txt2
-rw-r--r--Documentation/devicetree/bindings/display/imx/fsl-imx-drm.txt2
2 files changed, 2 insertions, 2 deletions
diff --git a/Documentation/devicetree/bindings/display/bridge/sec_dsim.txt b/Documentation/devicetree/bindings/display/bridge/sec_dsim.txt
index fd4246136d37..dfca6387e1ab 100644
--- a/Documentation/devicetree/bindings/display/bridge/sec_dsim.txt
+++ b/Documentation/devicetree/bindings/display/bridge/sec_dsim.txt
@@ -7,7 +7,7 @@ an encoder or bridge must be implemented to manage the platform
specific initializations.
Required properties:
-- compatible: "fsl,imx8mm-mipi-dsim"
+- compatible: "fsl,imx8mm-mipi-dsim" or "fsl,imx8mn-mipi-dsim"
- reg: the register range of the MIPI DSIM controller
- interrupts: the interrupt number for this module
- clock, clock-names: phandles to the MIPI-DSI clocks described in
diff --git a/Documentation/devicetree/bindings/display/imx/fsl-imx-drm.txt b/Documentation/devicetree/bindings/display/imx/fsl-imx-drm.txt
index a7b35da0a100..8e25c4e0bd46 100644
--- a/Documentation/devicetree/bindings/display/imx/fsl-imx-drm.txt
+++ b/Documentation/devicetree/bindings/display/imx/fsl-imx-drm.txt
@@ -256,7 +256,7 @@ dcss_drm: dcss@0x32e00000 {
NXP i.MX eLCDIF (Enhanced LCD Interface)
========================================
Required properties:
-- compatible: should be "fsl,imx8mm-lcdif"
+- compatible: should be "fsl,imx8mm-lcdif" or "fsl,imx8mn-lcdif"
- reg: should be register base and length as documented in the
datasheet.
- interrupts, interrupt-names: Should contain interrupts and names as