diff options
Diffstat (limited to 'arch/arm/mach-davinci')
35 files changed, 1461 insertions, 291 deletions
diff --git a/arch/arm/mach-davinci/Kconfig b/arch/arm/mach-davinci/Kconfig index b77b860b36d7..32f147998cd9 100644 --- a/arch/arm/mach-davinci/Kconfig +++ b/arch/arm/mach-davinci/Kconfig @@ -61,6 +61,8 @@ config MACH_DAVINCI_EVM bool "TI DM644x EVM" default ARCH_DAVINCI_DM644x depends on ARCH_DAVINCI_DM644x + select MISC_DEVICES + select EEPROM_AT24 help Configure this option to specify the whether the board used for development is a DM644x EVM @@ -68,6 +70,8 @@ config MACH_DAVINCI_EVM config MACH_SFFSDR bool "Lyrtech SFFSDR" depends on ARCH_DAVINCI_DM644x + select MISC_DEVICES + select EEPROM_AT24 help Say Y here to select the Lyrtech Small Form Factor Software Defined Radio (SFFSDR) board. @@ -99,6 +103,8 @@ config MACH_DAVINCI_DM6467_EVM default ARCH_DAVINCI_DM646x depends on ARCH_DAVINCI_DM646x select MACH_DAVINCI_DM6467TEVM + select MISC_DEVICES + select EEPROM_AT24 help Configure this option to specify the whether the board used for development is a DM6467 EVM @@ -110,6 +116,8 @@ config MACH_DAVINCI_DM365_EVM bool "TI DM365 EVM" default ARCH_DAVINCI_DM365 depends on ARCH_DAVINCI_DM365 + select MISC_DEVICES + select EEPROM_AT24 help Configure this option to specify whether the board used for development is a DM365 EVM @@ -119,6 +127,8 @@ config MACH_DAVINCI_DA830_EVM default ARCH_DAVINCI_DA830 depends on ARCH_DAVINCI_DA830 select GPIO_PCF857X + select MISC_DEVICES + select EEPROM_AT24 help Say Y here to select the TI DA830/OMAP-L137/AM17x Evaluation Module. @@ -148,7 +158,6 @@ config MACH_DAVINCI_DA850_EVM bool "TI DA850/OMAP-L138/AM18x Reference Platform" default ARCH_DAVINCI_DA850 depends on ARCH_DAVINCI_DA850 - select GPIO_PCA953X help Say Y here to select the TI DA850/OMAP-L138/AM18x Evaluation Module. @@ -178,6 +187,12 @@ config DA850_UI_RMII endchoice +config GPIO_PCA953X + default MACH_DAVINCI_DA850_EVM + +config KEYBOARD_GPIO_POLLED + default MACH_DAVINCI_DA850_EVM + config MACH_TNETV107X bool "TI TNETV107X Reference Platform" default ARCH_DAVINCI_TNETV107X @@ -188,6 +203,8 @@ config MACH_TNETV107X config MACH_MITYOMAPL138 bool "Critical Link MityDSP-L138/MityARM-1808 SoM" depends on ARCH_DAVINCI_DA850 + select MISC_DEVICES + select EEPROM_AT24 help Say Y here to select the Critical Link MityDSP-L138/MityARM-1808 System on Module. Information on this SoM may be found at diff --git a/arch/arm/mach-davinci/aemif.c b/arch/arm/mach-davinci/aemif.c index 9c3f500fc12f..1ce70a91f2e9 100644 --- a/arch/arm/mach-davinci/aemif.c +++ b/arch/arm/mach-davinci/aemif.c @@ -90,7 +90,7 @@ int davinci_aemif_setup_timing(struct davinci_aemif_timing *t, void __iomem *base, unsigned cs) { unsigned set, val; - unsigned ta, rhold, rstrobe, rsetup, whold, wstrobe, wsetup; + int ta, rhold, rstrobe, rsetup, whold, wstrobe, wsetup; unsigned offset = A1CR_OFFSET + cs * 4; struct clk *aemif_clk; unsigned long clkrate; diff --git a/arch/arm/mach-davinci/board-da830-evm.c b/arch/arm/mach-davinci/board-da830-evm.c index b52a3a1abd94..8bc3701aa05c 100644 --- a/arch/arm/mach-davinci/board-da830-evm.c +++ b/arch/arm/mach-davinci/board-da830-evm.c @@ -20,6 +20,8 @@ #include <linux/i2c/at24.h> #include <linux/mtd/mtd.h> #include <linux/mtd/partitions.h> +#include <linux/spi/spi.h> +#include <linux/spi/flash.h> #include <asm/mach-types.h> #include <asm/mach/arch.h> @@ -30,6 +32,7 @@ #include <mach/da8xx.h> #include <mach/usb.h> #include <mach/aemif.h> +#include <mach/spi.h> #define DA830_EVM_PHY_ID "" /* @@ -534,6 +537,64 @@ static struct edma_rsv_info da830_edma_rsv[] = { }, }; +static struct mtd_partition da830evm_spiflash_part[] = { + [0] = { + .name = "DSP-UBL", + .offset = 0, + .size = SZ_8K, + .mask_flags = MTD_WRITEABLE, + }, + [1] = { + .name = "ARM-UBL", + .offset = MTDPART_OFS_APPEND, + .size = SZ_16K + SZ_8K, + .mask_flags = MTD_WRITEABLE, + }, + [2] = { + .name = "U-Boot", + .offset = MTDPART_OFS_APPEND, + .size = SZ_256K - SZ_32K, + .mask_flags = MTD_WRITEABLE, + }, + [3] = { + .name = "U-Boot-Environment", + .offset = MTDPART_OFS_APPEND, + .size = SZ_16K, + .mask_flags = 0, + }, + [4] = { + .name = "Kernel", + .offset = MTDPART_OFS_APPEND, + .size = MTDPART_SIZ_FULL, + .mask_flags = 0, + }, +}; + +static struct flash_platform_data da830evm_spiflash_data = { + .name = "m25p80", + .parts = da830evm_spiflash_part, + .nr_parts = ARRAY_SIZE(da830evm_spiflash_part), + .type = "w25x32", +}; + +static struct davinci_spi_config da830evm_spiflash_cfg = { + .io_type = SPI_IO_TYPE_DMA, + .c2tdelay = 8, + .t2cdelay = 8, +}; + +static struct spi_board_info da830evm_spi_info[] = { + { + .modalias = "m25p80", + .platform_data = &da830evm_spiflash_data, + .controller_data = &da830evm_spiflash_cfg, + .mode = SPI_MODE_0, + .max_speed_hz = 30000000, + .bus_num = 0, + .chip_select = 0, + }, +}; + static __init void da830_evm_init(void) { struct davinci_soc_info *soc_info = &davinci_soc_info; @@ -590,6 +651,12 @@ static __init void da830_evm_init(void) ret = da8xx_register_rtc(); if (ret) pr_warning("da830_evm_init: rtc setup failed: %d\n", ret); + + ret = da8xx_register_spi(0, da830evm_spi_info, + ARRAY_SIZE(da830evm_spi_info)); + if (ret) + pr_warning("da830_evm_init: spi 0 registration failed: %d\n", + ret); } #ifdef CONFIG_SERIAL_8250_CONSOLE diff --git a/arch/arm/mach-davinci/board-da850-evm.c b/arch/arm/mach-davinci/board-da850-evm.c index c6e11c682e4c..a7b41bf505f1 100644 --- a/arch/arm/mach-davinci/board-da850-evm.c +++ b/arch/arm/mach-davinci/board-da850-evm.c @@ -17,8 +17,10 @@ #include <linux/i2c.h> #include <linux/i2c/at24.h> #include <linux/i2c/pca953x.h> +#include <linux/input.h> #include <linux/mfd/tps6507x.h> #include <linux/gpio.h> +#include <linux/gpio_keys.h> #include <linux/platform_device.h> #include <linux/mtd/mtd.h> #include <linux/mtd/nand.h> @@ -27,6 +29,8 @@ #include <linux/regulator/machine.h> #include <linux/regulator/tps6507x.h> #include <linux/input/tps6507x-ts.h> +#include <linux/spi/spi.h> +#include <linux/spi/flash.h> #include <asm/mach-types.h> #include <asm/mach/arch.h> @@ -36,6 +40,7 @@ #include <mach/nand.h> #include <mach/mux.h> #include <mach/aemif.h> +#include <mach/spi.h> #define DA850_EVM_PHY_ID "0:00" #define DA850_LCD_PWR_PIN GPIO_TO_PIN(2, 8) @@ -46,6 +51,70 @@ #define DA850_MII_MDIO_CLKEN_PIN GPIO_TO_PIN(2, 6) +static struct mtd_partition da850evm_spiflash_part[] = { + [0] = { + .name = "UBL", + .offset = 0, + .size = SZ_64K, + .mask_flags = MTD_WRITEABLE, + }, + [1] = { + .name = "U-Boot", + .offset = MTDPART_OFS_APPEND, + .size = SZ_512K, + .mask_flags = MTD_WRITEABLE, + }, + [2] = { + .name = "U-Boot-Env", + .offset = MTDPART_OFS_APPEND, + .size = SZ_64K, + .mask_flags = MTD_WRITEABLE, + }, + [3] = { + .name = "Kernel", + .offset = MTDPART_OFS_APPEND, + .size = SZ_2M + SZ_512K, + .mask_flags = 0, + }, + [4] = { + .name = "Filesystem", + .offset = MTDPART_OFS_APPEND, + .size = SZ_4M, + .mask_flags = 0, + }, + [5] = { + .name = "MAC-Address", + .offset = SZ_8M - SZ_64K, + .size = SZ_64K, + .mask_flags = MTD_WRITEABLE, + }, +}; + +static struct flash_platform_data da850evm_spiflash_data = { + .name = "m25p80", + .parts = da850evm_spiflash_part, + .nr_parts = ARRAY_SIZE(da850evm_spiflash_part), + .type = "m25p64", +}; + +static struct davinci_spi_config da850evm_spiflash_cfg = { + .io_type = SPI_IO_TYPE_DMA, + .c2tdelay = 8, + .t2cdelay = 8, +}; + +static struct spi_board_info da850evm_spi_info[] = { + { + .modalias = "m25p80", + .platform_data = &da850evm_spiflash_data, + .controller_data = &da850evm_spiflash_cfg, + .mode = SPI_MODE_0, + .max_speed_hz = 30000000, + .bus_num = 1, + .chip_select = 0, + }, +}; + static struct mtd_partition da850_evm_norflash_partition[] = { { .name = "bootloaders + env", @@ -229,8 +298,6 @@ static const short da850_evm_nor_pins[] = { -1 }; -static u32 ui_card_detected; - #if defined(CONFIG_MMC_DAVINCI) || \ defined(CONFIG_MMC_DAVINCI_MODULE) #define HAS_MMC 1 @@ -242,7 +309,7 @@ static inline void da850_evm_setup_nor_nand(void) { int ret = 0; - if (ui_card_detected & !HAS_MMC) { + if (!HAS_MMC) { ret = davinci_cfg_reg_list(da850_evm_nand_pins); if (ret) pr_warning("da850_evm_init: nand mux setup failed: " @@ -266,34 +333,115 @@ static inline void da850_evm_setup_emac_rmii(int rmii_sel) struct davinci_soc_info *soc_info = &davinci_soc_info; soc_info->emac_pdata->rmii_en = 1; - gpio_set_value(rmii_sel, 0); + gpio_set_value_cansleep(rmii_sel, 0); } #else static inline void da850_evm_setup_emac_rmii(int rmii_sel) { } #endif + +#define DA850_KEYS_DEBOUNCE_MS 10 +/* + * At 200ms polling interval it is possible to miss an + * event by tapping very lightly on the push button but most + * pushes do result in an event; longer intervals require the + * user to hold the button whereas shorter intervals require + * more CPU time for polling. + */ +#define DA850_GPIO_KEYS_POLL_MS 200 + +enum da850_evm_ui_exp_pins { + DA850_EVM_UI_EXP_SEL_C = 5, + DA850_EVM_UI_EXP_SEL_B, + DA850_EVM_UI_EXP_SEL_A, + DA850_EVM_UI_EXP_PB8, + DA850_EVM_UI_EXP_PB7, + DA850_EVM_UI_EXP_PB6, + DA850_EVM_UI_EXP_PB5, + DA850_EVM_UI_EXP_PB4, + DA850_EVM_UI_EXP_PB3, + DA850_EVM_UI_EXP_PB2, + DA850_EVM_UI_EXP_PB1, +}; + +static const char const *da850_evm_ui_exp[] = { + [DA850_EVM_UI_EXP_SEL_C] = "sel_c", + [DA850_EVM_UI_EXP_SEL_B] = "sel_b", + [DA850_EVM_UI_EXP_SEL_A] = "sel_a", + [DA850_EVM_UI_EXP_PB8] = "pb8", + [DA850_EVM_UI_EXP_PB7] = "pb7", + [DA850_EVM_UI_EXP_PB6] = "pb6", + [DA850_EVM_UI_EXP_PB5] = "pb5", + [DA850_EVM_UI_EXP_PB4] = "pb4", + [DA850_EVM_UI_EXP_PB3] = "pb3", + [DA850_EVM_UI_EXP_PB2] = "pb2", + [DA850_EVM_UI_EXP_PB1] = "pb1", +}; + +#define DA850_N_UI_PB 8 + +static struct gpio_keys_button da850_evm_ui_keys[] = { + [0 ... DA850_N_UI_PB - 1] = { + .type = EV_KEY, + .active_low = 1, + .wakeup = 0, + .debounce_interval = DA850_KEYS_DEBOUNCE_MS, + .code = -1, /* assigned at runtime */ + .gpio = -1, /* assigned at runtime */ + .desc = NULL, /* assigned at runtime */ + }, +}; + +static struct gpio_keys_platform_data da850_evm_ui_keys_pdata = { + .buttons = da850_evm_ui_keys, + .nbuttons = ARRAY_SIZE(da850_evm_ui_keys), + .poll_interval = DA850_GPIO_KEYS_POLL_MS, +}; + +static struct platform_device da850_evm_ui_keys_device = { + .name = "gpio-keys-polled", + .id = 0, + .dev = { + .platform_data = &da850_evm_ui_keys_pdata + }, +}; + +static void da850_evm_ui_keys_init(unsigned gpio) +{ + int i; + struct gpio_keys_button *button; + + for (i = 0; i < DA850_N_UI_PB; i++) { + button = &da850_evm_ui_keys[i]; + button->code = KEY_F8 - i; + button->desc = (char *) + da850_evm_ui_exp[DA850_EVM_UI_EXP_PB8 + i]; + button->gpio = gpio + DA850_EVM_UI_EXP_PB8 + i; + } +} + static int da850_evm_ui_expander_setup(struct i2c_client *client, unsigned gpio, unsigned ngpio, void *c) { int sel_a, sel_b, sel_c, ret; - sel_a = gpio + 7; - sel_b = gpio + 6; - sel_c = gpio + 5; + sel_a = gpio + DA850_EVM_UI_EXP_SEL_A; + sel_b = gpio + DA850_EVM_UI_EXP_SEL_B; + sel_c = gpio + DA850_EVM_UI_EXP_SEL_C; - ret = gpio_request(sel_a, "sel_a"); + ret = gpio_request(sel_a, da850_evm_ui_exp[DA850_EVM_UI_EXP_SEL_A]); if (ret) { pr_warning("Cannot open UI expander pin %d\n", sel_a); goto exp_setup_sela_fail; } - ret = gpio_request(sel_b, "sel_b"); + ret = gpio_request(sel_b, da850_evm_ui_exp[DA850_EVM_UI_EXP_SEL_B]); if (ret) { pr_warning("Cannot open UI expander pin %d\n", sel_b); goto exp_setup_selb_fail; } - ret = gpio_request(sel_c, "sel_c"); + ret = gpio_request(sel_c, da850_evm_ui_exp[DA850_EVM_UI_EXP_SEL_C]); if (ret) { pr_warning("Cannot open UI expander pin %d\n", sel_c); goto exp_setup_selc_fail; @@ -304,7 +452,13 @@ static int da850_evm_ui_expander_setup(struct i2c_client *client, unsigned gpio, gpio_direction_output(sel_b, 1); gpio_direction_output(sel_c, 1); - ui_card_detected = 1; + da850_evm_ui_keys_init(gpio); + ret = platform_device_register(&da850_evm_ui_keys_device); + if (ret) { + pr_warning("Could not register UI GPIO expander push-buttons"); + goto exp_setup_keys_fail; + } + pr_info("DA850/OMAP-L138 EVM UI card detected\n"); da850_evm_setup_nor_nand(); @@ -313,6 +467,8 @@ static int da850_evm_ui_expander_setup(struct i2c_client *client, unsigned gpio, return 0; +exp_setup_keys_fail: + gpio_free(sel_c); exp_setup_selc_fail: gpio_free(sel_b); exp_setup_selb_fail: @@ -324,14 +480,192 @@ exp_setup_sela_fail: static int da850_evm_ui_expander_teardown(struct i2c_client *client, unsigned gpio, unsigned ngpio, void *c) { + platform_device_unregister(&da850_evm_ui_keys_device); + /* deselect all functionalities */ - gpio_set_value(gpio + 5, 1); - gpio_set_value(gpio + 6, 1); - gpio_set_value(gpio + 7, 1); + gpio_set_value_cansleep(gpio + DA850_EVM_UI_EXP_SEL_C, 1); + gpio_set_value_cansleep(gpio + DA850_EVM_UI_EXP_SEL_B, 1); + gpio_set_value_cansleep(gpio + DA850_EVM_UI_EXP_SEL_A, 1); + + gpio_free(gpio + DA850_EVM_UI_EXP_SEL_C); + gpio_free(gpio + DA850_EVM_UI_EXP_SEL_B); + gpio_free(gpio + DA850_EVM_UI_EXP_SEL_A); + + return 0; +} + +/* assign the baseboard expander's GPIOs after the UI board's */ +#define DA850_UI_EXPANDER_N_GPIOS ARRAY_SIZE(da850_evm_ui_exp) +#define DA850_BB_EXPANDER_GPIO_BASE (DAVINCI_N_GPIO + DA850_UI_EXPANDER_N_GPIOS) + +enum da850_evm_bb_exp_pins { + DA850_EVM_BB_EXP_DEEP_SLEEP_EN = 0, + DA850_EVM_BB_EXP_SW_RST, + DA850_EVM_BB_EXP_TP_23, + DA850_EVM_BB_EXP_TP_22, + DA850_EVM_BB_EXP_TP_21, + DA850_EVM_BB_EXP_USER_PB1, + DA850_EVM_BB_EXP_USER_LED2, + DA850_EVM_BB_EXP_USER_LED1, + DA850_EVM_BB_EXP_USER_SW1, + DA850_EVM_BB_EXP_USER_SW2, + DA850_EVM_BB_EXP_USER_SW3, + DA850_EVM_BB_EXP_USER_SW4, + DA850_EVM_BB_EXP_USER_SW5, + DA850_EVM_BB_EXP_USER_SW6, + DA850_EVM_BB_EXP_USER_SW7, + DA850_EVM_BB_EXP_USER_SW8 +}; + +static const char const *da850_evm_bb_exp[] = { + [DA850_EVM_BB_EXP_DEEP_SLEEP_EN] = "deep_sleep_en", + [DA850_EVM_BB_EXP_SW_RST] = "sw_rst", + [DA850_EVM_BB_EXP_TP_23] = "tp_23", + [DA850_EVM_BB_EXP_TP_22] = "tp_22", + [DA850_EVM_BB_EXP_TP_21] = "tp_21", + [DA850_EVM_BB_EXP_USER_PB1] = "user_pb1", + [DA850_EVM_BB_EXP_USER_LED2] = "user_led2", + [DA850_EVM_BB_EXP_USER_LED1] = "user_led1", + [DA850_EVM_BB_EXP_USER_SW1] = "user_sw1", + [DA850_EVM_BB_EXP_USER_SW2] = "user_sw2", + [DA850_EVM_BB_EXP_USER_SW3] = "user_sw3", + [DA850_EVM_BB_EXP_USER_SW4] = "user_sw4", + [DA850_EVM_BB_EXP_USER_SW5] = "user_sw5", + [DA850_EVM_BB_EXP_USER_SW6] = "user_sw6", + [DA850_EVM_BB_EXP_USER_SW7] = "user_sw7", + [DA850_EVM_BB_EXP_USER_SW8] = "user_sw8", +}; + +#define DA850_N_BB_USER_SW 8 + +static struct gpio_keys_button da850_evm_bb_keys[] = { + [0] = { + .type = EV_KEY, + .active_low = 1, + .wakeup = 0, + .debounce_interval = DA850_KEYS_DEBOUNCE_MS, + .code = KEY_PROG1, + .desc = NULL, /* assigned at runtime */ + .gpio = -1, /* assigned at runtime */ + }, + [1 ... DA850_N_BB_USER_SW] = { + .type = EV_SW, + .active_low = 1, + .wakeup = 0, + .debounce_interval = DA850_KEYS_DEBOUNCE_MS, + .code = -1, /* assigned at runtime */ + .desc = NULL, /* assigned at runtime */ + .gpio = -1, /* assigned at runtime */ + }, +}; + +static struct gpio_keys_platform_data da850_evm_bb_keys_pdata = { + .buttons = da850_evm_bb_keys, + .nbuttons = ARRAY_SIZE(da850_evm_bb_keys), + .poll_interval = DA850_GPIO_KEYS_POLL_MS, +}; + +static struct platform_device da850_evm_bb_keys_device = { + .name = "gpio-keys-polled", + .id = 1, + .dev = { + .platform_data = &da850_evm_bb_keys_pdata + }, +}; - gpio_free(gpio + 5); - gpio_free(gpio + 6); - gpio_free(gpio + 7); +static void da850_evm_bb_keys_init(unsigned gpio) +{ + int i; + struct gpio_keys_button *button; + + button = &da850_evm_bb_keys[0]; + button->desc = (char *) + da850_evm_bb_exp[DA850_EVM_BB_EXP_USER_PB1]; + button->gpio = gpio + DA850_EVM_BB_EXP_USER_PB1; + + for (i = 0; i < DA850_N_BB_USER_SW; i++) { + button = &da850_evm_bb_keys[i + 1]; + button->code = SW_LID + i; + button->desc = (char *) + da850_evm_bb_exp[DA850_EVM_BB_EXP_USER_SW1 + i]; + button->gpio = gpio + DA850_EVM_BB_EXP_USER_SW1 + i; + } +} + +#define DA850_N_BB_USER_LED 2 + +static struct gpio_led da850_evm_bb_leds[] = { + [0 ... DA850_N_BB_USER_LED - 1] = { + .active_low = 1, + .gpio = -1, /* assigned at runtime */ + .name = NULL, /* assigned at runtime */ + }, +}; + +static struct gpio_led_platform_data da850_evm_bb_leds_pdata = { + .leds = da850_evm_bb_leds, + .num_leds = ARRAY_SIZE(da850_evm_bb_leds), +}; + +static struct platform_device da850_evm_bb_leds_device = { + .name = "leds-gpio", + .id = -1, + .dev = { + .platform_data = &da850_evm_bb_leds_pdata + } +}; + +static void da850_evm_bb_leds_init(unsigned gpio) +{ + int i; + struct gpio_led *led; + + for (i = 0; i < DA850_N_BB_USER_LED; i++) { + led = &da850_evm_bb_leds[i]; + + led->gpio = gpio + DA850_EVM_BB_EXP_USER_LED2 + i; + led->name = + da850_evm_bb_exp[DA850_EVM_BB_EXP_USER_LED2 + i]; + } +} + +static int da850_evm_bb_expander_setup(struct i2c_client *client, + unsigned gpio, unsigned ngpio, + void *c) +{ + int ret; + + /* + * Register the switches and pushbutton on the baseboard as a gpio-keys + * device. + */ + da850_evm_bb_keys_init(gpio); + ret = platform_device_register(&da850_evm_bb_keys_device); + if (ret) { + pr_warning("Could not register baseboard GPIO expander keys"); + goto io_exp_setup_sw_fail; + } + + da850_evm_bb_leds_init(gpio); + ret = platform_device_register(&da850_evm_bb_leds_device); + if (ret) { + pr_warning("Could not register baseboard GPIO expander LEDS"); + goto io_exp_setup_leds_fail; + } + + return 0; + +io_exp_setup_leds_fail: + platform_device_unregister(&da850_evm_bb_keys_device); +io_exp_setup_sw_fail: + return ret; +} + +static int da850_evm_bb_expander_teardown(struct i2c_client *client, + unsigned gpio, unsigned ngpio, void *c) +{ + platform_device_unregister(&da850_evm_bb_leds_device); + platform_device_unregister(&da850_evm_bb_keys_device); return 0; } @@ -340,6 +674,14 @@ static struct pca953x_platform_data da850_evm_ui_expander_info = { .gpio_base = DAVINCI_N_GPIO, .setup = da850_evm_ui_expander_setup, .teardown = da850_evm_ui_expander_teardown, + .names = da850_evm_ui_exp, +}; + +static struct pca953x_platform_data da850_evm_bb_expander_info = { + .gpio_base = DA850_BB_EXPANDER_GPIO_BASE, + .setup = da850_evm_bb_expander_setup, + .teardown = da850_evm_bb_expander_teardown, + .names = da850_evm_bb_exp, }; static struct i2c_board_info __initdata da850_evm_i2c_devices[] = { @@ -350,6 +692,10 @@ static struct i2c_board_info __initdata da850_evm_i2c_devices[] = { I2C_BOARD_INFO("tca6416", 0x20), .platform_data = &da850_evm_ui_expander_info, }, + { + I2C_BOARD_INFO("tca6416", 0x21), + .platform_data = &da850_evm_bb_expander_info, + }, }; static struct davinci_i2c_platform_data da850_evm_i2c_0_pdata = { @@ -382,6 +728,13 @@ static struct snd_platform_data da850_evm_snd_data = { .rxnumevt = 1, }; +static const short da850_evm_mcasp_pins[] __initconst = { + DA850_AHCLKX, DA850_ACLKX, DA850_AFSX, + DA850_AHCLKR, DA850_ACLKR, DA850_AFSR, DA850_AMUTE, + DA850_AXR_11, DA850_AXR_12, + -1 +}; + static int da850_evm_mmc_get_ro(int index) { return gpio_get_value(DA850_MMCSD_WP_PIN); @@ -401,6 +754,13 @@ static struct davinci_mmc_config da850_mmc_config = { .version = MMC_CTLR_VERSION_2, }; +static const short da850_evm_mmcsd0_pins[] __initconst = { + DA850_MMCSD0_DAT_0, DA850_MMCSD0_DAT_1, DA850_MMCSD0_DAT_2, + DA850_MMCSD0_DAT_3, DA850_MMCSD0_CLK, DA850_MMCSD0_CMD, + DA850_GPIO4_0, DA850_GPIO4_1, + -1 +}; + static void da850_panel_power_ctrl(int val) { /* lcd backlight */ @@ -540,7 +900,7 @@ static struct regulator_init_data tps65070_regulator_data[] = { { .constraints = { .min_uV = 950000, - .max_uV = 1320000, + .max_uV = 1350000, .valid_ops_mask = (REGULATOR_CHANGE_VOLTAGE | REGULATOR_CHANGE_STATUS), .boot_on = 1, @@ -591,7 +951,7 @@ static struct tps6507x_board tps_board = { .tps6507x_ts_init_data = &tps6507x_touchscreen_data, }; -static struct i2c_board_info __initdata da850evm_tps65070_info[] = { +static struct i2c_board_info __initdata da850_evm_tps65070_info[] = { { I2C_BOARD_INFO("tps6507x", 0x48), .platform_data = &tps_board, @@ -600,8 +960,8 @@ static struct i2c_board_info __initdata da850evm_tps65070_info[] = { static int __init pmic_tps65070_init(void) { - return i2c_register_board_info(1, da850evm_tps65070_info, - ARRAY_SIZE(da850evm_tps65070_info)); + return i2c_register_board_info(1, da850_evm_tps65070_info, + ARRAY_SIZE(da850_evm_tps65070_info)); } static const short da850_evm_lcdc_pins[] = { @@ -736,6 +1096,27 @@ static struct edma_rsv_info *da850_edma_rsv[2] = { &da850_edma_cc1_rsv, }; +#ifdef CONFIG_CPU_FREQ +static __init int da850_evm_init_cpufreq(void) +{ + switch (system_rev & 0xF) { + case 3: + da850_max_speed = 456000; + break; + case 2: + da850_max_speed = 408000; + break; + case 1: + da850_max_speed = 372000; + break; + } + + return da850_register_cpufreq("pll0_sysclk3"); +} +#else +static __init int da850_evm_init_cpufreq(void) { return 0; } +#endif + static __init void da850_evm_init(void) { int ret; @@ -767,7 +1148,7 @@ static __init void da850_evm_init(void) ret); if (HAS_MMC) { - ret = davinci_cfg_reg_list(da850_mmcsd0_pins); + ret = davinci_cfg_reg_list(da850_evm_mmcsd0_pins); if (ret) pr_warning("da850_evm_init: mmcsd0 mux setup failed:" " %d\n", ret); @@ -803,7 +1184,7 @@ static __init void da850_evm_init(void) __raw_writel(0, IO_ADDRESS(DA8XX_UART1_BASE) + 0x30); __raw_writel(0, IO_ADDRESS(DA8XX_UART0_BASE) + 0x30); - ret = davinci_cfg_reg_list(da850_mcasp_pins); + ret = davinci_cfg_reg_list(da850_evm_mcasp_pins); if (ret) pr_warning("da850_evm_init: mcasp mux setup failed: %d\n", ret); @@ -836,7 +1217,7 @@ static __init void da850_evm_init(void) if (ret) pr_warning("da850_evm_init: rtc setup failed: %d\n", ret); - ret = da850_register_cpufreq("pll0_sysclk3"); + ret = da850_evm_init_cpufreq(); if (ret) pr_warning("da850_evm_init: cpufreq registration failed: %d\n", ret); @@ -850,6 +1231,12 @@ static __init void da850_evm_init(void) if (ret) pr_warning("da850_evm_init: suspend registration failed: %d\n", ret); + + ret = da8xx_register_spi(1, da850evm_spi_info, + ARRAY_SIZE(da850evm_spi_info)); + if (ret) + pr_warning("da850_evm_init: spi 1 registration failed: %d\n", + ret); } #ifdef CONFIG_SERIAL_8250_CONSOLE diff --git a/arch/arm/mach-davinci/board-dm644x-evm.c b/arch/arm/mach-davinci/board-dm644x-evm.c index 0ca90b834586..556bbd468db3 100644 --- a/arch/arm/mach-davinci/board-dm644x-evm.c +++ b/arch/arm/mach-davinci/board-dm644x-evm.c @@ -440,11 +440,6 @@ evm_u35_setup(struct i2c_client *client, int gpio, unsigned ngpio, void *c) gpio_request(gpio + 7, "nCF_SEL"); gpio_direction_output(gpio + 7, 1); - /* irlml6401 switches over 1A, in under 8 msec; - * now it can be managed by nDRV_VBUS ... - */ - davinci_setup_usb(1000, 8); - return 0; } @@ -705,6 +700,9 @@ static __init void davinci_evm_init(void) davinci_serial_init(&uart_config); dm644x_init_asp(&dm644x_evm_snd_data); + /* irlml6401 switches over 1A, in under 8 msec */ + davinci_setup_usb(1000, 8); + soc_info->emac_pdata->phy_id = DM644X_EVM_PHY_ID; /* Register the fixup for PHY on DaVinci */ phy_register_fixup_for_uid(LXT971_PHY_ID, LXT971_PHY_MASK, diff --git a/arch/arm/mach-davinci/board-mityomapl138.c b/arch/arm/mach-davinci/board-mityomapl138.c index 0bb5f0ce4fdc..2aa79c54f98e 100644 --- a/arch/arm/mach-davinci/board-mityomapl138.c +++ b/arch/arm/mach-davinci/board-mityomapl138.c @@ -17,6 +17,8 @@ #include <linux/i2c.h> #include <linux/i2c/at24.h> #include <linux/etherdevice.h> +#include <linux/spi/spi.h> +#include <linux/spi/flash.h> #include <asm/mach-types.h> #include <asm/mach/arch.h> @@ -25,6 +27,7 @@ #include <mach/da8xx.h> #include <mach/nand.h> #include <mach/mux.h> +#include <mach/spi.h> #define MITYOMAPL138_PHY_ID "0:03" @@ -44,38 +47,109 @@ struct factory_config { static struct factory_config factory_config; +struct part_no_info { + const char *part_no; /* part number string of interest */ + int max_freq; /* khz */ +}; + +static struct part_no_info mityomapl138_pn_info[] = { + { + .part_no = "L138-C", + .max_freq = 300000, + }, + { + .part_no = "L138-D", + .max_freq = 375000, + }, + { + .part_no = "L138-F", + .max_freq = 456000, + }, + { + .part_no = "1808-C", + .max_freq = 300000, + }, + { + .part_no = "1808-D", + .max_freq = 375000, + }, + { + .part_no = "1808-F", + .max_freq = 456000, + }, + { + .part_no = "1810-D", + .max_freq = 375000, + }, +}; + +#ifdef CONFIG_CPU_FREQ +static void mityomapl138_cpufreq_init(const char *partnum) +{ + int i, ret; + + for (i = 0; partnum && i < ARRAY_SIZE(mityomapl138_pn_info); i++) { + /* + * the part number has additional characters beyond what is + * stored in the table. This information is not needed for + * determining the speed grade, and would require several + * more table entries. Only check the first N characters + * for a match. + */ + if (!strncmp(partnum, mityomapl138_pn_info[i].part_no, + strlen(mityomapl138_pn_info[i].part_no))) { + da850_max_speed = mityomapl138_pn_info[i].max_freq; + break; + } + } + + ret = da850_register_cpufreq("pll0_sysclk3"); + if (ret) + pr_warning("cpufreq registration failed: %d\n", ret); +} +#else +static void mityomapl138_cpufreq_init(const char *partnum) { } +#endif + static void read_factory_config(struct memory_accessor *a, void *context) { int ret; + const char *partnum = NULL; struct davinci_soc_info *soc_info = &davinci_soc_info; ret = a->read(a, (char *)&factory_config, 0, sizeof(factory_config)); if (ret != sizeof(struct factory_config)) { pr_warning("MityOMAPL138: Read Factory Config Failed: %d\n", ret); - return; + goto bad_config; } if (factory_config.magic != FACTORY_CONFIG_MAGIC) { pr_warning("MityOMAPL138: Factory Config Magic Wrong (%X)\n", factory_config.magic); - return; + goto bad_config; } if (factory_config.version != FACTORY_CONFIG_VERSION) { pr_warning("MityOMAPL138: Factory Config Version Wrong (%X)\n", factory_config.version); - return; + goto bad_config; } pr_info("MityOMAPL138: Found MAC = %pM\n", factory_config.mac); - pr_info("MityOMAPL138: Part Number = %s\n", factory_config.partnum); if (is_valid_ether_addr(factory_config.mac)) memcpy(soc_info->emac_pdata->mac_addr, factory_config.mac, ETH_ALEN); else pr_warning("MityOMAPL138: Invalid MAC found " "in factory config block\n"); + + partnum = factory_config.partnum; + pr_info("MityOMAPL138: Part Number = %s\n", partnum); + +bad_config: + /* default maximum speed is valid for all platforms */ + mityomapl138_cpufreq_init(partnum); } static struct at24_platform_data mityomapl138_fd_chip = { @@ -223,6 +297,82 @@ static int __init pmic_tps65023_init(void) } /* + * SPI Devices: + * SPI1_CS0: 8M Flash ST-M25P64-VME6G + */ +static struct mtd_partition spi_flash_partitions[] = { + [0] = { + .name = "ubl", + .offset = 0, + .size = SZ_64K, + .mask_flags = MTD_WRITEABLE, + }, + [1] = { + .name = "u-boot", + .offset = MTDPART_OFS_APPEND, + .size = SZ_512K, + .mask_flags = MTD_WRITEABLE, + }, + [2] = { + .name = "u-boot-env", + .offset = MTDPART_OFS_APPEND, + .size = SZ_64K, + .mask_flags = MTD_WRITEABLE, + }, + [3] = { + .name = "periph-config", + .offset = MTDPART_OFS_APPEND, + .size = SZ_64K, + .mask_flags = MTD_WRITEABLE, + }, + [4] = { + .name = "reserved", + .offset = MTDPART_OFS_APPEND, + .size = SZ_256K + SZ_64K, + }, + [5] = { + .name = "kernel", + .offset = MTDPART_OFS_APPEND, + .size = SZ_2M + SZ_1M, + }, + [6] = { + .name = "fpga", + .offset = MTDPART_OFS_APPEND, + .size = SZ_2M, + }, + [7] = { + .name = "spare", + .offset = MTDPART_OFS_APPEND, + .size = MTDPART_SIZ_FULL, + }, +}; + +static struct flash_platform_data mityomapl138_spi_flash_data = { + .name = "m25p80", + .parts = spi_flash_partitions, + .nr_parts = ARRAY_SIZE(spi_flash_partitions), + .type = "m24p64", +}; + +static struct davinci_spi_config spi_eprom_config = { + .io_type = SPI_IO_TYPE_DMA, + .c2tdelay = 8, + .t2cdelay = 8, +}; + +static struct spi_board_info mityomapl138_spi_flash_info[] = { + { + .modalias = "m25p80", + .platform_data = &mityomapl138_spi_flash_data, + .controller_data = &spi_eprom_config, + .mode = SPI_MODE_0, + .max_speed_hz = 30000000, + .bus_num = 1, + .chip_select = 0, + }, +}; + +/* * MityDSP-L138 includes a 256 MByte large-page NAND flash * (128K blocks). */ @@ -377,16 +527,17 @@ static void __init mityomapl138_init(void) mityomapl138_setup_nand(); + ret = da8xx_register_spi(1, mityomapl138_spi_flash_info, + ARRAY_SIZE(mityomapl138_spi_flash_info)); + if (ret) + pr_warning("spi 1 registration failed: %d\n", ret); + mityomapl138_config_emac(); ret = da8xx_register_rtc(); if (ret) pr_warning("rtc setup failed: %d\n", ret); - ret = da850_register_cpufreq("pll0_sysclk3"); - if (ret) - pr_warning("cpufreq registration failed: %d\n", ret); - ret = da8xx_register_cpuidle(); if (ret) pr_warning("cpuidle registration failed: %d\n", ret); diff --git a/arch/arm/mach-davinci/board-omapl138-hawk.c b/arch/arm/mach-davinci/board-omapl138-hawk.c index 0b8dbdb79fe0..67c38d0ecd10 100644 --- a/arch/arm/mach-davinci/board-omapl138-hawk.c +++ b/arch/arm/mach-davinci/board-omapl138-hawk.c @@ -19,6 +19,279 @@ #include <mach/cp_intc.h> #include <mach/da8xx.h> +#include <mach/mux.h> + +#define HAWKBOARD_PHY_ID "0:07" +#define DA850_HAWK_MMCSD_CD_PIN GPIO_TO_PIN(3, 12) +#define DA850_HAWK_MMCSD_WP_PIN GPIO_TO_PIN(3, 13) + +#define DA850_USB1_VBUS_PIN GPIO_TO_PIN(2, 4) +#define DA850_USB1_OC_PIN GPIO_TO_PIN(6, 13) + +static short omapl138_hawk_mii_pins[] __initdata = { + DA850_MII_TXEN, DA850_MII_TXCLK, DA850_MII_COL, DA850_MII_TXD_3, + DA850_MII_TXD_2, DA850_MII_TXD_1, DA850_MII_TXD_0, DA850_MII_RXER, + DA850_MII_CRS, DA850_MII_RXCLK, DA850_MII_RXDV, DA850_MII_RXD_3, + DA850_MII_RXD_2, DA850_MII_RXD_1, DA850_MII_RXD_0, DA850_MDIO_CLK, + DA850_MDIO_D, + -1 +}; + +static __init void omapl138_hawk_config_emac(void) +{ + void __iomem *cfgchip3 = DA8XX_SYSCFG0_VIRT(DA8XX_CFGCHIP3_REG); + int ret; + u32 val; + struct davinci_soc_info *soc_info = &davinci_soc_info; + + val = __raw_readl(cfgchip3); + val &= ~BIT(8); + ret = davinci_cfg_reg_list(omapl138_hawk_mii_pins); + if (ret) { + pr_warning("%s: cpgmac/mii mux setup failed: %d\n", + __func__, ret); + return; + } + + /* configure the CFGCHIP3 register for MII */ + __raw_writel(val, cfgchip3); + pr_info("EMAC: MII PHY configured\n"); + + soc_info->emac_pdata->phy_id = HAWKBOARD_PHY_ID; + + ret = da8xx_register_emac(); + if (ret) + pr_warning("%s: emac registration failed: %d\n", + __func__, ret); +} + +/* + * The following EDMA channels/slots are not being used by drivers (for + * example: Timer, GPIO, UART events etc) on da850/omap-l138 EVM/Hawkboard, + * hence they are being reserved for codecs on the DSP side. + */ +static const s16 da850_dma0_rsv_chans[][2] = { + /* (offset, number) */ + { 8, 6}, + {24, 4}, + {30, 2}, + {-1, -1} +}; + +static const s16 da850_dma0_rsv_slots[][2] = { + /* (offset, number) */ + { 8, 6}, + {24, 4}, + {30, 50}, + {-1, -1} +}; + +static const s16 da850_dma1_rsv_chans[][2] = { + /* (offset, number) */ + { 0, 28}, + {30, 2}, + {-1, -1} +}; + +static const s16 da850_dma1_rsv_slots[][2] = { + /* (offset, number) */ + { 0, 28}, + {30, 90}, + {-1, -1} +}; + +static struct edma_rsv_info da850_edma_cc0_rsv = { + .rsv_chans = da850_dma0_rsv_chans, + .rsv_slots = da850_dma0_rsv_slots, +}; + +static struct edma_rsv_info da850_edma_cc1_rsv = { + .rsv_chans = da850_dma1_rsv_chans, + .rsv_slots = da850_dma1_rsv_slots, +}; + +static struct edma_rsv_info *da850_edma_rsv[2] = { + &da850_edma_cc0_rsv, + &da850_edma_cc1_rsv, +}; + +static const short hawk_mmcsd0_pins[] = { + DA850_MMCSD0_DAT_0, DA850_MMCSD0_DAT_1, DA850_MMCSD0_DAT_2, + DA850_MMCSD0_DAT_3, DA850_MMCSD0_CLK, DA850_MMCSD0_CMD, + DA850_GPIO3_12, DA850_GPIO3_13, + -1 +}; + +static int da850_hawk_mmc_get_ro(int index) +{ + return gpio_get_value(DA850_HAWK_MMCSD_WP_PIN); +} + +static int da850_hawk_mmc_get_cd(int index) +{ + return !gpio_get_value(DA850_HAWK_MMCSD_CD_PIN); +} + +static struct davinci_mmc_config da850_mmc_config = { + .get_ro = da850_hawk_mmc_get_ro, + .get_cd = da850_hawk_mmc_get_cd, + .wires = 4, + .max_freq = 50000000, + .caps = MMC_CAP_MMC_HIGHSPEED | MMC_CAP_SD_HIGHSPEED, + .version = MMC_CTLR_VERSION_2, +}; + +static __init void omapl138_hawk_mmc_init(void) +{ + int ret; + + ret = davinci_cfg_reg_list(hawk_mmcsd0_pins); + if (ret) { + pr_warning("%s: MMC/SD0 mux setup failed: %d\n", + __func__, ret); + return; + } + + ret = gpio_request_one(DA850_HAWK_MMCSD_CD_PIN, + GPIOF_DIR_IN, "MMC CD"); + if (ret < 0) { + pr_warning("%s: can not open GPIO %d\n", + __func__, DA850_HAWK_MMCSD_CD_PIN); + return; + } + + ret = gpio_request_one(DA850_HAWK_MMCSD_WP_PIN, + GPIOF_DIR_IN, "MMC WP"); + if (ret < 0) { + pr_warning("%s: can not open GPIO %d\n", + __func__, DA850_HAWK_MMCSD_WP_PIN); + goto mmc_setup_wp_fail; + } + + ret = da8xx_register_mmcsd0(&da850_mmc_config); + if (ret) { + pr_warning("%s: MMC/SD0 registration failed: %d\n", + __func__, ret); + goto mmc_setup_mmcsd_fail; + } + + return; + +mmc_setup_mmcsd_fail: + gpio_free(DA850_HAWK_MMCSD_WP_PIN); +mmc_setup_wp_fail: + gpio_free(DA850_HAWK_MMCSD_CD_PIN); +} + +static irqreturn_t omapl138_hawk_usb_ocic_irq(int irq, void *dev_id); +static da8xx_ocic_handler_t hawk_usb_ocic_handler; + +static const short da850_hawk_usb11_pins[] = { + DA850_GPIO2_4, DA850_GPIO6_13, + -1 +}; + +static int hawk_usb_set_power(unsigned port, int on) +{ + gpio_set_value(DA850_USB1_VBUS_PIN, on); + return 0; +} + +static int hawk_usb_get_power(unsigned port) +{ + return gpio_get_value(DA850_USB1_VBUS_PIN); +} + +static int hawk_usb_get_oci(unsigned port) +{ + return !gpio_get_value(DA850_USB1_OC_PIN); +} + +static int hawk_usb_ocic_notify(da8xx_ocic_handler_t handler) +{ + int irq = gpio_to_irq(DA850_USB1_OC_PIN); + int error = 0; + + if (handler != NULL) { + hawk_usb_ocic_handler = handler; + + error = request_irq(irq, omapl138_hawk_usb_ocic_irq, + IRQF_DISABLED | IRQF_TRIGGER_RISING | + IRQF_TRIGGER_FALLING, + "OHCI over-current indicator", NULL); + if (error) + pr_err("%s: could not request IRQ to watch " + "over-current indicator changes\n", __func__); + } else { + free_irq(irq, NULL); + } + return error; +} + +static struct da8xx_ohci_root_hub omapl138_hawk_usb11_pdata = { + .set_power = hawk_usb_set_power, + .get_power = hawk_usb_get_power, + .get_oci = hawk_usb_get_oci, + .ocic_notify = hawk_usb_ocic_notify, + /* TPS2087 switch @ 5V */ + .potpgt = (3 + 1) / 2, /* 3 ms max */ +}; + +static irqreturn_t omapl138_hawk_usb_ocic_irq(int irq, void *dev_id) +{ + hawk_usb_ocic_handler(&omapl138_hawk_usb11_pdata, 1); + return IRQ_HANDLED; +} + +static __init void omapl138_hawk_usb_init(void) +{ + int ret; + u32 cfgchip2; + + ret = davinci_cfg_reg_list(da850_hawk_usb11_pins); + if (ret) { + pr_warning("%s: USB 1.1 PinMux setup failed: %d\n", + __func__, ret); + return; + } + + /* Setup the Ref. clock frequency for the HAWK at 24 MHz. */ + + cfgchip2 = __raw_readl(DA8XX_SYSCFG0_VIRT(DA8XX_CFGCHIP2_REG)); + cfgchip2 &= ~CFGCHIP2_REFFREQ; + cfgchip2 |= CFGCHIP2_REFFREQ_24MHZ; + __raw_writel(cfgchip2, DA8XX_SYSCFG0_VIRT(DA8XX_CFGCHIP2_REG)); + + ret = gpio_request_one(DA850_USB1_VBUS_PIN, + GPIOF_DIR_OUT, "USB1 VBUS"); + if (ret < 0) { + pr_err("%s: failed to request GPIO for USB 1.1 port " + "power control: %d\n", __func__, ret); + return; + } + + ret = gpio_request_one(DA850_USB1_OC_PIN, + GPIOF_DIR_IN, "USB1 OC"); + if (ret < 0) { + pr_err("%s: failed to request GPIO for USB 1.1 port " + "over-current indicator: %d\n", __func__, ret); + goto usb11_setup_oc_fail; + } + + ret = da8xx_register_usb11(&omapl138_hawk_usb11_pdata); + if (ret) { + pr_warning("%s: USB 1.1 registration failed: %d\n", + __func__, ret); + goto usb11_setup_fail; + } + + return; + +usb11_setup_fail: + gpio_free(DA850_USB1_OC_PIN); +usb11_setup_oc_fail: + gpio_free(DA850_USB1_VBUS_PIN); +} static struct davinci_uart_config omapl138_hawk_uart_config __initdata = { .enabled_uarts = 0x7, @@ -30,6 +303,17 @@ static __init void omapl138_hawk_init(void) davinci_serial_init(&omapl138_hawk_uart_config); + omapl138_hawk_config_emac(); + + ret = da850_register_edma(da850_edma_rsv); + if (ret) + pr_warning("%s: EDMA registration failed: %d\n", + __func__, ret); + + omapl138_hawk_mmc_init(); + + omapl138_hawk_usb_init(); + ret = da8xx_register_watchdog(); if (ret) pr_warning("omapl138_hawk_init: " diff --git a/arch/arm/mach-davinci/board-tnetv107x-evm.c b/arch/arm/mach-davinci/board-tnetv107x-evm.c index a6db85460227..1a656e882262 100644 --- a/arch/arm/mach-davinci/board-tnetv107x-evm.c +++ b/arch/arm/mach-davinci/board-tnetv107x-evm.c @@ -25,6 +25,7 @@ #include <linux/mtd/partitions.h> #include <linux/input.h> #include <linux/input/matrix_keypad.h> +#include <linux/spi/spi.h> #include <asm/mach/arch.h> #include <asm/mach-types.h> @@ -37,6 +38,7 @@ #define EVM_MMC_WP_GPIO 21 #define EVM_MMC_CD_GPIO 24 +#define EVM_SPI_CS_GPIO 54 static int initialize_gpio(int gpio, char *desc) { @@ -99,6 +101,12 @@ static const short uart1_pins[] __initdata = { -1 }; +static const short ssp_pins[] __initdata = { + TNETV107X_SSP0_0, TNETV107X_SSP0_1, TNETV107X_SSP0_2, + TNETV107X_SSP1_0, TNETV107X_SSP1_1, TNETV107X_SSP1_2, + TNETV107X_SSP1_3, -1 +}; + static struct mtd_partition nand_partitions[] = { /* bootloader (U-Boot, etc) in first 12 sectors */ { @@ -196,19 +204,68 @@ static struct matrix_keypad_platform_data keypad_config = { .no_autorepeat = 0, }; +static void spi_select_device(int cs) +{ + static int gpio; + + if (!gpio) { + int ret; + ret = gpio_request(EVM_SPI_CS_GPIO, "spi chipsel"); + if (ret < 0) { + pr_err("cannot open spi chipsel gpio\n"); + gpio = -ENOSYS; + return; + } else { + gpio = EVM_SPI_CS_GPIO; + gpio_direction_output(gpio, 0); + } + } + + if (gpio < 0) + return; + + return gpio_set_value(gpio, cs ? 1 : 0); +} + +static struct ti_ssp_spi_data spi_master_data = { + .num_cs = 2, + .select = spi_select_device, + .iosel = SSP_PIN_SEL(0, SSP_CLOCK) | SSP_PIN_SEL(1, SSP_DATA) | + SSP_PIN_SEL(2, SSP_CHIPSEL) | SSP_PIN_SEL(3, SSP_IN) | + SSP_INPUT_SEL(3), +}; + +static struct ti_ssp_data ssp_config = { + .out_clock = 250 * 1000, + .dev_data = { + [1] = { + .dev_name = "ti-ssp-spi", + .pdata = &spi_master_data, + .pdata_size = sizeof(spi_master_data), + }, + }, +}; + static struct tnetv107x_device_info evm_device_info __initconst = { .serial_config = &serial_config, .mmc_config[1] = &mmc_config, /* controller 1 */ .nand_config[0] = &nand_config, /* chip select 0 */ .keypad_config = &keypad_config, + .ssp_config = &ssp_config, +}; + +static struct spi_board_info spi_info[] __initconst = { }; static __init void tnetv107x_evm_board_init(void) { davinci_cfg_reg_list(sdio1_pins); davinci_cfg_reg_list(uart1_pins); + davinci_cfg_reg_list(ssp_pins); tnetv107x_devices_init(&evm_device_info); + + spi_register_board_info(spi_info, ARRAY_SIZE(spi_info)); } #ifdef CONFIG_SERIAL_8250_CONSOLE diff --git a/arch/arm/mach-davinci/clock.c b/arch/arm/mach-davinci/clock.c index 01ba080433db..e4e3af179f02 100644 --- a/arch/arm/mach-davinci/clock.c +++ b/arch/arm/mach-davinci/clock.c @@ -336,7 +336,7 @@ int davinci_set_sysclk_rate(struct clk *clk, unsigned long rate) ratio--; } - if (ratio > PLLDIV_RATIO_MASK) + if (ratio > pll->div_ratio_mask) return -EINVAL; do { @@ -344,7 +344,7 @@ int davinci_set_sysclk_rate(struct clk *clk, unsigned long rate) } while (v & PLLSTAT_GOSTAT); v = __raw_readl(pll->base + clk->div_reg); - v &= ~PLLDIV_RATIO_MASK; + v &= ~pll->div_ratio_mask; v |= ratio | PLLDIV_EN; __raw_writel(v, pll->base + clk->div_reg); diff --git a/arch/arm/mach-davinci/clock.h b/arch/arm/mach-davinci/clock.h index 11099980b58b..0dd22031ec62 100644 --- a/arch/arm/mach-davinci/clock.h +++ b/arch/arm/mach-davinci/clock.h @@ -68,7 +68,7 @@ #ifndef __ASSEMBLER__ #include <linux/list.h> -#include <asm/clkdev.h> +#include <linux/clkdev.h> #define PLLSTAT_GOSTAT BIT(0) #define PLLCMD_GOSET BIT(0) diff --git a/arch/arm/mach-davinci/cp_intc.c b/arch/arm/mach-davinci/cp_intc.c index bb4c40ecb803..9abc80a86a22 100644 --- a/arch/arm/mach-davinci/cp_intc.c +++ b/arch/arm/mach-davinci/cp_intc.c @@ -26,30 +26,30 @@ static inline void cp_intc_write(unsigned long value, unsigned offset) __raw_writel(value, davinci_intc_base + offset); } -static void cp_intc_ack_irq(unsigned int irq) +static void cp_intc_ack_irq(struct irq_data *d) { - cp_intc_write(irq, CP_INTC_SYS_STAT_IDX_CLR); + cp_intc_write(d->irq, CP_INTC_SYS_STAT_IDX_CLR); } /* Disable interrupt */ -static void cp_intc_mask_irq(unsigned int irq) +static void cp_intc_mask_irq(struct irq_data *d) { /* XXX don't know why we need to disable nIRQ here... */ cp_intc_write(1, CP_INTC_HOST_ENABLE_IDX_CLR); - cp_intc_write(irq, CP_INTC_SYS_ENABLE_IDX_CLR); + cp_intc_write(d->irq, CP_INTC_SYS_ENABLE_IDX_CLR); cp_intc_write(1, CP_INTC_HOST_ENABLE_IDX_SET); } /* Enable interrupt */ -static void cp_intc_unmask_irq(unsigned int irq) +static void cp_intc_unmask_irq(struct irq_data *d) { - cp_intc_write(irq, CP_INTC_SYS_ENABLE_IDX_SET); + cp_intc_write(d->irq, CP_INTC_SYS_ENABLE_IDX_SET); } -static int cp_intc_set_irq_type(unsigned int irq, unsigned int flow_type) +static int cp_intc_set_irq_type(struct irq_data *d, unsigned int flow_type) { - unsigned reg = BIT_WORD(irq); - unsigned mask = BIT_MASK(irq); + unsigned reg = BIT_WORD(d->irq); + unsigned mask = BIT_MASK(d->irq); unsigned polarity = cp_intc_read(CP_INTC_SYS_POLARITY(reg)); unsigned type = cp_intc_read(CP_INTC_SYS_TYPE(reg)); @@ -85,18 +85,18 @@ static int cp_intc_set_irq_type(unsigned int irq, unsigned int flow_type) * generic drivers which call {enable|disable}_irq_wake for * wake up interrupt sources (eg RTC on DA850). */ -static int cp_intc_set_wake(unsigned int irq, unsigned int on) +static int cp_intc_set_wake(struct irq_data *d, unsigned int on) { return 0; } static struct irq_chip cp_intc_irq_chip = { .name = "cp_intc", - .ack = cp_intc_ack_irq, - .mask = cp_intc_mask_irq, - .unmask = cp_intc_unmask_irq, - .set_type = cp_intc_set_irq_type, - .set_wake = cp_intc_set_wake, + .irq_ack = cp_intc_ack_irq, + .irq_mask = cp_intc_mask_irq, + .irq_unmask = cp_intc_unmask_irq, + .irq_set_type = cp_intc_set_irq_type, + .irq_set_wake = cp_intc_set_wake, }; void __init cp_intc_init(void) diff --git a/arch/arm/mach-davinci/cpufreq.c b/arch/arm/mach-davinci/cpufreq.c index 343de73161fa..4a68c2b1ec11 100644 --- a/arch/arm/mach-davinci/cpufreq.c +++ b/arch/arm/mach-davinci/cpufreq.c @@ -132,7 +132,7 @@ out: return ret; } -static int __init davinci_cpu_init(struct cpufreq_policy *policy) +static int davinci_cpu_init(struct cpufreq_policy *policy) { int result = 0; struct davinci_cpufreq_config *pdata = cpufreq.dev->platform_data; diff --git a/arch/arm/mach-davinci/da830.c b/arch/arm/mach-davinci/da830.c index ec23ab473620..2ed2f822fc40 100644 --- a/arch/arm/mach-davinci/da830.c +++ b/arch/arm/mach-davinci/da830.c @@ -148,7 +148,7 @@ static struct clk scr2_ss_clk = { static struct clk dmax_clk = { .name = "dmax", .parent = &pll0_sysclk2, - .lpsc = DA8XX_LPSC0_DMAX, + .lpsc = DA8XX_LPSC0_PRUSS, .flags = ALWAYS_ENABLED, }; @@ -397,8 +397,8 @@ static struct clk_lookup da830_clks[] = { CLK(NULL, "uart0", &uart0_clk), CLK(NULL, "uart1", &uart1_clk), CLK(NULL, "uart2", &uart2_clk), - CLK("dm_spi.0", NULL, &spi0_clk), - CLK("dm_spi.1", NULL, &spi1_clk), + CLK("spi_davinci.0", NULL, &spi0_clk), + CLK("spi_davinci.1", NULL, &spi1_clk), CLK(NULL, "ecap0", &ecap0_clk), CLK(NULL, "ecap1", &ecap1_clk), CLK(NULL, "ecap2", &ecap2_clk), diff --git a/arch/arm/mach-davinci/da850.c b/arch/arm/mach-davinci/da850.c index 63916b902760..68fe4c289d77 100644 --- a/arch/arm/mach-davinci/da850.c +++ b/arch/arm/mach-davinci/da850.c @@ -345,6 +345,34 @@ static struct clk aemif_clk = { .flags = ALWAYS_ENABLED, }; +static struct clk usb11_clk = { + .name = "usb11", + .parent = &pll0_sysclk4, + .lpsc = DA8XX_LPSC1_USB11, + .gpsc = 1, +}; + +static struct clk usb20_clk = { + .name = "usb20", + .parent = &pll0_sysclk2, + .lpsc = DA8XX_LPSC1_USB20, + .gpsc = 1, +}; + +static struct clk spi0_clk = { + .name = "spi0", + .parent = &pll0_sysclk2, + .lpsc = DA8XX_LPSC0_SPI0, +}; + +static struct clk spi1_clk = { + .name = "spi1", + .parent = &pll0_sysclk2, + .lpsc = DA8XX_LPSC1_SPI1, + .gpsc = 1, + .flags = DA850_CLK_ASYNC3, +}; + static struct clk_lookup da850_clks[] = { CLK(NULL, "ref", &ref_clk), CLK(NULL, "pll0", &pll0_clk), @@ -387,6 +415,10 @@ static struct clk_lookup da850_clks[] = { CLK("davinci_mmc.0", NULL, &mmcsd0_clk), CLK("davinci_mmc.1", NULL, &mmcsd1_clk), CLK(NULL, "aemif", &aemif_clk), + CLK(NULL, "usb11", &usb11_clk), + CLK(NULL, "usb20", &usb20_clk), + CLK("spi_davinci.0", NULL, &spi0_clk), + CLK("spi_davinci.1", NULL, &spi1_clk), CLK(NULL, NULL, NULL), }; @@ -543,30 +575,19 @@ static const struct mux_config da850_pins[] = { MUX_CFG(DA850, EMA_WAIT_1, 6, 24, 15, 1, false) MUX_CFG(DA850, NEMA_CS_2, 7, 0, 15, 1, false) /* GPIO function */ + MUX_CFG(DA850, GPIO2_4, 6, 12, 15, 8, false) MUX_CFG(DA850, GPIO2_6, 6, 4, 15, 8, false) MUX_CFG(DA850, GPIO2_8, 5, 28, 15, 8, false) MUX_CFG(DA850, GPIO2_15, 5, 0, 15, 8, false) + MUX_CFG(DA850, GPIO3_12, 7, 12, 15, 8, false) + MUX_CFG(DA850, GPIO3_13, 7, 8, 15, 8, false) MUX_CFG(DA850, GPIO4_0, 10, 28, 15, 8, false) MUX_CFG(DA850, GPIO4_1, 10, 24, 15, 8, false) + MUX_CFG(DA850, GPIO6_13, 13, 8, 15, 8, false) MUX_CFG(DA850, RTC_ALARM, 0, 28, 15, 2, false) #endif }; -const short da850_uart0_pins[] __initdata = { - DA850_NUART0_CTS, DA850_NUART0_RTS, DA850_UART0_RXD, DA850_UART0_TXD, - -1 -}; - -const short da850_uart1_pins[] __initdata = { - DA850_UART1_RXD, DA850_UART1_TXD, - -1 -}; - -const short da850_uart2_pins[] __initdata = { - DA850_UART2_RXD, DA850_UART2_TXD, - -1 -}; - const short da850_i2c0_pins[] __initdata = { DA850_I2C0_SDA, DA850_I2C0_SCL, -1 @@ -577,24 +598,6 @@ const short da850_i2c1_pins[] __initdata = { -1 }; -const short da850_cpgmac_pins[] __initdata = { - DA850_MII_TXEN, DA850_MII_TXCLK, DA850_MII_COL, DA850_MII_TXD_3, - DA850_MII_TXD_2, DA850_MII_TXD_1, DA850_MII_TXD_0, DA850_MII_RXER, - DA850_MII_CRS, DA850_MII_RXCLK, DA850_MII_RXDV, DA850_MII_RXD_3, - DA850_MII_RXD_2, DA850_MII_RXD_1, DA850_MII_RXD_0, DA850_MDIO_CLK, - DA850_MDIO_D, DA850_RMII_TXD_0, DA850_RMII_TXD_1, DA850_RMII_TXEN, - DA850_RMII_CRS_DV, DA850_RMII_RXD_0, DA850_RMII_RXD_1, DA850_RMII_RXER, - DA850_RMII_MHZ_50_CLK, - -1 -}; - -const short da850_mcasp_pins[] __initdata = { - DA850_AHCLKX, DA850_ACLKX, DA850_AFSX, - DA850_AHCLKR, DA850_ACLKR, DA850_AFSR, DA850_AMUTE, - DA850_AXR_11, DA850_AXR_12, - -1 -}; - const short da850_lcdcntl_pins[] __initdata = { DA850_LCD_D_0, DA850_LCD_D_1, DA850_LCD_D_2, DA850_LCD_D_3, DA850_LCD_D_4, DA850_LCD_D_5, DA850_LCD_D_6, DA850_LCD_D_7, @@ -604,29 +607,6 @@ const short da850_lcdcntl_pins[] __initdata = { -1 }; -const short da850_mmcsd0_pins[] __initdata = { - DA850_MMCSD0_DAT_0, DA850_MMCSD0_DAT_1, DA850_MMCSD0_DAT_2, - DA850_MMCSD0_DAT_3, DA850_MMCSD0_CLK, DA850_MMCSD0_CMD, - DA850_GPIO4_0, DA850_GPIO4_1, - -1 -}; - -const short da850_emif25_pins[] __initdata = { - DA850_EMA_BA_1, DA850_EMA_CLK, DA850_EMA_WAIT_1, DA850_NEMA_CS_2, - DA850_NEMA_CS_3, DA850_NEMA_CS_4, DA850_NEMA_WE, DA850_NEMA_OE, - DA850_EMA_D_0, DA850_EMA_D_1, DA850_EMA_D_2, DA850_EMA_D_3, - DA850_EMA_D_4, DA850_EMA_D_5, DA850_EMA_D_6, DA850_EMA_D_7, - DA850_EMA_D_8, DA850_EMA_D_9, DA850_EMA_D_10, DA850_EMA_D_11, - DA850_EMA_D_12, DA850_EMA_D_13, DA850_EMA_D_14, DA850_EMA_D_15, - DA850_EMA_A_0, DA850_EMA_A_1, DA850_EMA_A_2, DA850_EMA_A_3, - DA850_EMA_A_4, DA850_EMA_A_5, DA850_EMA_A_6, DA850_EMA_A_7, - DA850_EMA_A_8, DA850_EMA_A_9, DA850_EMA_A_10, DA850_EMA_A_11, - DA850_EMA_A_12, DA850_EMA_A_13, DA850_EMA_A_14, DA850_EMA_A_15, - DA850_EMA_A_16, DA850_EMA_A_17, DA850_EMA_A_18, DA850_EMA_A_19, - DA850_EMA_A_20, DA850_EMA_A_21, DA850_EMA_A_22, DA850_EMA_A_23, - -1 -}; - /* FIQ are pri 0-1; otherwise 2-7, with 7 lowest priority */ static u8 da850_default_priorities[DA850_N_CP_INTC_IRQ] = { [IRQ_DA8XX_COMMTX] = 7, @@ -764,6 +744,13 @@ static struct davinci_id da850_ids[] = { .cpu_id = DAVINCI_CPU_ID_DA850, .name = "da850/omap-l138", }, + { + .variant = 0x1, + .part_no = 0xb7d1, + .manufacturer = 0x017, /* 0x02f >> 1 */ + .cpu_id = DAVINCI_CPU_ID_DA850, + .name = "da850/omap-l138/am18x", + }, }; static struct davinci_timer_instance da850_timer_instance[4] = { @@ -830,8 +817,7 @@ static void da850_set_async3_src(int pllnum) * According to the TRM, minimum PLLM results in maximum power savings. * The OPP definitions below should keep the PLLM as low as possible. * - * The output of the PLLM must be between 400 to 600 MHz. - * This rules out prediv of anything but divide-by-one for 24Mhz OSC input. + * The output of the PLLM must be between 300 to 600 MHz. */ struct da850_opp { unsigned int freq; /* in KHz */ @@ -842,6 +828,33 @@ struct da850_opp { unsigned int cvdd_max; /* in uV */ }; +static const struct da850_opp da850_opp_456 = { + .freq = 456000, + .prediv = 1, + .mult = 19, + .postdiv = 1, + .cvdd_min = 1300000, + .cvdd_max = 1350000, +}; + +static const struct da850_opp da850_opp_408 = { + .freq = 408000, + .prediv = 1, + .mult = 17, + .postdiv = 1, + .cvdd_min = 1300000, + .cvdd_max = 1350000, +}; + +static const struct da850_opp da850_opp_372 = { + .freq = 372000, + .prediv = 2, + .mult = 31, + .postdiv = 1, + .cvdd_min = 1200000, + .cvdd_max = 1320000, +}; + static const struct da850_opp da850_opp_300 = { .freq = 300000, .prediv = 1, @@ -876,6 +889,9 @@ static const struct da850_opp da850_opp_96 = { } static struct cpufreq_frequency_table da850_freq_table[] = { + OPP(456), + OPP(408), + OPP(372), OPP(300), OPP(200), OPP(96), @@ -886,6 +902,19 @@ static struct cpufreq_frequency_table da850_freq_table[] = { }; #ifdef CONFIG_REGULATOR +static int da850_set_voltage(unsigned int index); +static int da850_regulator_init(void); +#endif + +static struct davinci_cpufreq_config cpufreq_info = { + .freq_table = da850_freq_table, +#ifdef CONFIG_REGULATOR + .init = da850_regulator_init, + .set_voltage = da850_set_voltage, +#endif +}; + +#ifdef CONFIG_REGULATOR static struct regulator *cvdd; static int da850_set_voltage(unsigned int index) @@ -895,7 +924,7 @@ static int da850_set_voltage(unsigned int index) if (!cvdd) return -ENODEV; - opp = (struct da850_opp *) da850_freq_table[index].index; + opp = (struct da850_opp *) cpufreq_info.freq_table[index].index; return regulator_set_voltage(cvdd, opp->cvdd_min, opp->cvdd_max); } @@ -912,14 +941,6 @@ static int da850_regulator_init(void) } #endif -static struct davinci_cpufreq_config cpufreq_info = { - .freq_table = &da850_freq_table[0], -#ifdef CONFIG_REGULATOR - .init = da850_regulator_init, - .set_voltage = da850_set_voltage, -#endif -}; - static struct platform_device da850_cpufreq_device = { .name = "cpufreq-davinci", .dev = { @@ -928,12 +949,22 @@ static struct platform_device da850_cpufreq_device = { .id = -1, }; +unsigned int da850_max_speed = 300000; + int __init da850_register_cpufreq(char *async_clk) { + int i; + /* cpufreq driver can help keep an "async" clock constant */ if (async_clk) clk_add_alias("async", da850_cpufreq_device.name, async_clk, NULL); + for (i = 0; i < ARRAY_SIZE(da850_freq_table); i++) { + if (da850_freq_table[i].frequency <= da850_max_speed) { + cpufreq_info.freq_table = &da850_freq_table[i]; + break; + } + } return platform_device_register(&da850_cpufreq_device); } @@ -942,17 +973,18 @@ static int da850_round_armrate(struct clk *clk, unsigned long rate) { int i, ret = 0, diff; unsigned int best = (unsigned int) -1; + struct cpufreq_frequency_table *table = cpufreq_info.freq_table; rate /= 1000; /* convert to kHz */ - for (i = 0; da850_freq_table[i].frequency != CPUFREQ_TABLE_END; i++) { - diff = da850_freq_table[i].frequency - rate; + for (i = 0; table[i].frequency != CPUFREQ_TABLE_END; i++) { + diff = table[i].frequency - rate; if (diff < 0) diff = -diff; if (diff < best) { best = diff; - ret = da850_freq_table[i].frequency; + ret = table[i].frequency; } } @@ -973,7 +1005,7 @@ static int da850_set_pll0rate(struct clk *clk, unsigned long index) struct pll_data *pll = clk->pll_data; int ret; - opp = (struct da850_opp *) da850_freq_table[index].index; + opp = (struct da850_opp *) cpufreq_info.freq_table[index].index; prediv = opp->prediv; mult = opp->mult; postdiv = opp->postdiv; diff --git a/arch/arm/mach-davinci/devices-da8xx.c b/arch/arm/mach-davinci/devices-da8xx.c index 9eec63070e0c..625d4b66718b 100644 --- a/arch/arm/mach-davinci/devices-da8xx.c +++ b/arch/arm/mach-davinci/devices-da8xx.c @@ -38,12 +38,23 @@ #define DA8XX_EMAC_MDIO_BASE 0x01e24000 #define DA8XX_GPIO_BASE 0x01e26000 #define DA8XX_I2C1_BASE 0x01e28000 +#define DA8XX_SPI0_BASE 0x01c41000 +#define DA8XX_SPI1_BASE 0x01f0e000 #define DA8XX_EMAC_CTRL_REG_OFFSET 0x3000 #define DA8XX_EMAC_MOD_REG_OFFSET 0x2000 #define DA8XX_EMAC_RAM_OFFSET 0x0000 #define DA8XX_EMAC_CTRL_RAM_SIZE SZ_8K +#define DA8XX_DMA_SPI0_RX EDMA_CTLR_CHAN(0, 14) +#define DA8XX_DMA_SPI0_TX EDMA_CTLR_CHAN(0, 15) +#define DA8XX_DMA_MMCSD0_RX EDMA_CTLR_CHAN(0, 16) +#define DA8XX_DMA_MMCSD0_TX EDMA_CTLR_CHAN(0, 17) +#define DA8XX_DMA_SPI1_RX EDMA_CTLR_CHAN(0, 18) +#define DA8XX_DMA_SPI1_TX EDMA_CTLR_CHAN(0, 19) +#define DA850_DMA_MMCSD1_RX EDMA_CTLR_CHAN(1, 28) +#define DA850_DMA_MMCSD1_TX EDMA_CTLR_CHAN(1, 29) + void __iomem *da8xx_syscfg0_base; void __iomem *da8xx_syscfg1_base; @@ -480,8 +491,15 @@ static struct platform_device da850_mcasp_device = { .resource = da850_mcasp_resources, }; +struct platform_device davinci_pcm_device = { + .name = "davinci-pcm-audio", + .id = -1, +}; + void __init da8xx_register_mcasp(int id, struct snd_platform_data *pdata) { + platform_device_register(&davinci_pcm_device); + /* DA830/OMAP-L137 has 3 instances of McASP */ if (cpu_is_davinci_da830() && id == 1) { da830_mcasp1_device.dev.platform_data = pdata; @@ -566,13 +584,13 @@ static struct resource da8xx_mmcsd0_resources[] = { .flags = IORESOURCE_IRQ, }, { /* DMA RX */ - .start = EDMA_CTLR_CHAN(0, 16), - .end = EDMA_CTLR_CHAN(0, 16), + .start = DA8XX_DMA_MMCSD0_RX, + .end = DA8XX_DMA_MMCSD0_RX, .flags = IORESOURCE_DMA, }, { /* DMA TX */ - .start = EDMA_CTLR_CHAN(0, 17), - .end = EDMA_CTLR_CHAN(0, 17), + .start = DA8XX_DMA_MMCSD0_TX, + .end = DA8XX_DMA_MMCSD0_TX, .flags = IORESOURCE_DMA, }, }; @@ -603,13 +621,13 @@ static struct resource da850_mmcsd1_resources[] = { .flags = IORESOURCE_IRQ, }, { /* DMA RX */ - .start = EDMA_CTLR_CHAN(1, 28), - .end = EDMA_CTLR_CHAN(1, 28), + .start = DA850_DMA_MMCSD1_RX, + .end = DA850_DMA_MMCSD1_RX, .flags = IORESOURCE_DMA, }, { /* DMA TX */ - .start = EDMA_CTLR_CHAN(1, 29), - .end = EDMA_CTLR_CHAN(1, 29), + .start = DA850_DMA_MMCSD1_TX, + .end = DA850_DMA_MMCSD1_TX, .flags = IORESOURCE_DMA, }, }; @@ -718,3 +736,101 @@ int __init da8xx_register_cpuidle(void) return platform_device_register(&da8xx_cpuidle_device); } + +static struct resource da8xx_spi0_resources[] = { + [0] = { + .start = DA8XX_SPI0_BASE, + .end = DA8XX_SPI0_BASE + SZ_4K - 1, + .flags = IORESOURCE_MEM, + }, + [1] = { + .start = IRQ_DA8XX_SPINT0, + .end = IRQ_DA8XX_SPINT0, + .flags = IORESOURCE_IRQ, + }, + [2] = { + .start = DA8XX_DMA_SPI0_RX, + .end = DA8XX_DMA_SPI0_RX, + .flags = IORESOURCE_DMA, + }, + [3] = { + .start = DA8XX_DMA_SPI0_TX, + .end = DA8XX_DMA_SPI0_TX, + .flags = IORESOURCE_DMA, + }, +}; + +static struct resource da8xx_spi1_resources[] = { + [0] = { + .start = DA8XX_SPI1_BASE, + .end = DA8XX_SPI1_BASE + SZ_4K - 1, + .flags = IORESOURCE_MEM, + }, + [1] = { + .start = IRQ_DA8XX_SPINT1, + .end = IRQ_DA8XX_SPINT1, + .flags = IORESOURCE_IRQ, + }, + [2] = { + .start = DA8XX_DMA_SPI1_RX, + .end = DA8XX_DMA_SPI1_RX, + .flags = IORESOURCE_DMA, + }, + [3] = { + .start = DA8XX_DMA_SPI1_TX, + .end = DA8XX_DMA_SPI1_TX, + .flags = IORESOURCE_DMA, + }, +}; + +struct davinci_spi_platform_data da8xx_spi_pdata[] = { + [0] = { + .version = SPI_VERSION_2, + .intr_line = 1, + .dma_event_q = EVENTQ_0, + }, + [1] = { + .version = SPI_VERSION_2, + .intr_line = 1, + .dma_event_q = EVENTQ_0, + }, +}; + +static struct platform_device da8xx_spi_device[] = { + [0] = { + .name = "spi_davinci", + .id = 0, + .num_resources = ARRAY_SIZE(da8xx_spi0_resources), + .resource = da8xx_spi0_resources, + .dev = { + .platform_data = &da8xx_spi_pdata[0], + }, + }, + [1] = { + .name = "spi_davinci", + .id = 1, + .num_resources = ARRAY_SIZE(da8xx_spi1_resources), + .resource = da8xx_spi1_resources, + .dev = { + .platform_data = &da8xx_spi_pdata[1], + }, + }, +}; + +int __init da8xx_register_spi(int instance, struct spi_board_info *info, + unsigned len) +{ + int ret; + + if (instance < 0 || instance > 1) + return -EINVAL; + + ret = spi_register_board_info(info, len); + if (ret) + pr_warning("%s: failed to register board info for spi %d :" + " %d\n", __func__, instance, ret); + + da8xx_spi_pdata[instance].num_chipselect = len; + + return platform_device_register(&da8xx_spi_device[instance]); +} diff --git a/arch/arm/mach-davinci/devices-tnetv107x.c b/arch/arm/mach-davinci/devices-tnetv107x.c index c9a86d8130d1..6162cae7f868 100644 --- a/arch/arm/mach-davinci/devices-tnetv107x.c +++ b/arch/arm/mach-davinci/devices-tnetv107x.c @@ -35,6 +35,7 @@ #define TNETV107X_SDIO0_BASE 0x08088700 #define TNETV107X_SDIO1_BASE 0x08088800 #define TNETV107X_KEYPAD_BASE 0x08088a00 +#define TNETV107X_SSP_BASE 0x08088c00 #define TNETV107X_ASYNC_EMIF_CNTRL_BASE 0x08200000 #define TNETV107X_ASYNC_EMIF_DATA_CE0_BASE 0x30000000 #define TNETV107X_ASYNC_EMIF_DATA_CE1_BASE 0x40000000 @@ -342,9 +343,41 @@ static struct platform_device tsc_device = { .resource = tsc_resources, }; +static struct resource ssp_resources[] = { + { + .start = TNETV107X_SSP_BASE, + .end = TNETV107X_SSP_BASE + 0x1ff, + .flags = IORESOURCE_MEM, + }, + { + .start = IRQ_TNETV107X_SSP, + .flags = IORESOURCE_IRQ, + }, +}; + +static struct platform_device ssp_device = { + .name = "ti-ssp", + .id = -1, + .num_resources = ARRAY_SIZE(ssp_resources), + .resource = ssp_resources, +}; + void __init tnetv107x_devices_init(struct tnetv107x_device_info *info) { - int i; + int i, error; + struct clk *tsc_clk; + + /* + * The reset defaults for tnetv107x tsc clock divider is set too high. + * This forces the clock down to a range that allows the ADC to + * complete sample conversion in time. + */ + tsc_clk = clk_get(NULL, "sys_tsc_clk"); + if (tsc_clk) { + error = clk_set_rate(tsc_clk, 5000000); + WARN_ON(error < 0); + clk_put(tsc_clk); + } platform_device_register(&edma_device); platform_device_register(&tnetv107x_wdt_device); @@ -367,4 +400,9 @@ void __init tnetv107x_devices_init(struct tnetv107x_device_info *info) keypad_device.dev.platform_data = info->keypad_config; platform_device_register(&keypad_device); } + + if (info->ssp_config) { + ssp_device.dev.platform_data = info->ssp_config; + platform_device_register(&ssp_device); + } } diff --git a/arch/arm/mach-davinci/dm355.c b/arch/arm/mach-davinci/dm355.c index 2652af124acd..76364d1345df 100644 --- a/arch/arm/mach-davinci/dm355.c +++ b/arch/arm/mach-davinci/dm355.c @@ -403,21 +403,13 @@ static struct resource dm355_spi0_resources[] = { .start = 16, .flags = IORESOURCE_DMA, }, - { - .start = EVENTQ_1, - .flags = IORESOURCE_DMA, - }, }; static struct davinci_spi_platform_data dm355_spi0_pdata = { .version = SPI_VERSION_1, .num_chipselect = 2, - .clk_internal = 1, - .cs_hold = 1, - .intr_level = 0, - .poll_mode = 1, /* 0 -> interrupt mode 1-> polling mode */ - .c2tdelay = 0, - .t2cdelay = 0, + .cshold_bug = true, + .dma_event_q = EVENTQ_1, }; static struct platform_device dm355_spi0_device = { .name = "spi_davinci", diff --git a/arch/arm/mach-davinci/dm365.c b/arch/arm/mach-davinci/dm365.c index c466d710d3c1..4604e72d7d99 100644 --- a/arch/arm/mach-davinci/dm365.c +++ b/arch/arm/mach-davinci/dm365.c @@ -625,12 +625,7 @@ static u64 dm365_spi0_dma_mask = DMA_BIT_MASK(32); static struct davinci_spi_platform_data dm365_spi0_pdata = { .version = SPI_VERSION_1, .num_chipselect = 2, - .clk_internal = 1, - .cs_hold = 1, - .intr_level = 0, - .poll_mode = 1, /* 0 -> interrupt mode 1-> polling mode */ - .c2tdelay = 0, - .t2cdelay = 0, + .dma_event_q = EVENTQ_3, }; static struct resource dm365_spi0_resources[] = { @@ -651,10 +646,6 @@ static struct resource dm365_spi0_resources[] = { .start = 16, .flags = IORESOURCE_DMA, }, - { - .start = EVENTQ_3, - .flags = IORESOURCE_DMA, - }, }; static struct platform_device dm365_spi0_device = { diff --git a/arch/arm/mach-davinci/gpio-tnetv107x.c b/arch/arm/mach-davinci/gpio-tnetv107x.c index d10298620e2c..3fa3e2867e19 100644 --- a/arch/arm/mach-davinci/gpio-tnetv107x.c +++ b/arch/arm/mach-davinci/gpio-tnetv107x.c @@ -58,7 +58,7 @@ static int tnetv107x_gpio_request(struct gpio_chip *chip, unsigned offset) spin_lock_irqsave(&ctlr->lock, flags); - gpio_reg_set_bit(®s->enable, gpio); + gpio_reg_set_bit(regs->enable, gpio); spin_unlock_irqrestore(&ctlr->lock, flags); @@ -74,7 +74,7 @@ static void tnetv107x_gpio_free(struct gpio_chip *chip, unsigned offset) spin_lock_irqsave(&ctlr->lock, flags); - gpio_reg_clear_bit(®s->enable, gpio); + gpio_reg_clear_bit(regs->enable, gpio); spin_unlock_irqrestore(&ctlr->lock, flags); } @@ -88,7 +88,7 @@ static int tnetv107x_gpio_dir_in(struct gpio_chip *chip, unsigned offset) spin_lock_irqsave(&ctlr->lock, flags); - gpio_reg_set_bit(®s->direction, gpio); + gpio_reg_set_bit(regs->direction, gpio); spin_unlock_irqrestore(&ctlr->lock, flags); @@ -106,11 +106,11 @@ static int tnetv107x_gpio_dir_out(struct gpio_chip *chip, spin_lock_irqsave(&ctlr->lock, flags); if (value) - gpio_reg_set_bit(®s->data_out, gpio); + gpio_reg_set_bit(regs->data_out, gpio); else - gpio_reg_clear_bit(®s->data_out, gpio); + gpio_reg_clear_bit(regs->data_out, gpio); - gpio_reg_clear_bit(®s->direction, gpio); + gpio_reg_clear_bit(regs->direction, gpio); spin_unlock_irqrestore(&ctlr->lock, flags); @@ -124,7 +124,7 @@ static int tnetv107x_gpio_get(struct gpio_chip *chip, unsigned offset) unsigned gpio = chip->base + offset; int ret; - ret = gpio_reg_get_bit(®s->data_in, gpio); + ret = gpio_reg_get_bit(regs->data_in, gpio); return ret ? 1 : 0; } @@ -140,9 +140,9 @@ static void tnetv107x_gpio_set(struct gpio_chip *chip, spin_lock_irqsave(&ctlr->lock, flags); if (value) - gpio_reg_set_bit(®s->data_out, gpio); + gpio_reg_set_bit(regs->data_out, gpio); else - gpio_reg_clear_bit(®s->data_out, gpio); + gpio_reg_clear_bit(regs->data_out, gpio); spin_unlock_irqrestore(&ctlr->lock, flags); } diff --git a/arch/arm/mach-davinci/gpio.c b/arch/arm/mach-davinci/gpio.c index bf0ff587e46a..20d66e5e4663 100644 --- a/arch/arm/mach-davinci/gpio.c +++ b/arch/arm/mach-davinci/gpio.c @@ -205,20 +205,20 @@ pure_initcall(davinci_gpio_setup); * serve as EDMA event triggers. */ -static void gpio_irq_disable(unsigned irq) +static void gpio_irq_disable(struct irq_data *d) { - struct davinci_gpio_regs __iomem *g = irq2regs(irq); - u32 mask = (u32) get_irq_data(irq); + struct davinci_gpio_regs __iomem *g = irq2regs(d->irq); + u32 mask = (u32) irq_data_get_irq_data(d); __raw_writel(mask, &g->clr_falling); __raw_writel(mask, &g->clr_rising); } -static void gpio_irq_enable(unsigned irq) +static void gpio_irq_enable(struct irq_data *d) { - struct davinci_gpio_regs __iomem *g = irq2regs(irq); - u32 mask = (u32) get_irq_data(irq); - unsigned status = irq_desc[irq].status; + struct davinci_gpio_regs __iomem *g = irq2regs(d->irq); + u32 mask = (u32) irq_data_get_irq_data(d); + unsigned status = irq_desc[d->irq].status; status &= IRQ_TYPE_EDGE_FALLING | IRQ_TYPE_EDGE_RISING; if (!status) @@ -230,19 +230,19 @@ static void gpio_irq_enable(unsigned irq) __raw_writel(mask, &g->set_rising); } -static int gpio_irq_type(unsigned irq, unsigned trigger) +static int gpio_irq_type(struct irq_data *d, unsigned trigger) { - struct davinci_gpio_regs __iomem *g = irq2regs(irq); - u32 mask = (u32) get_irq_data(irq); + struct davinci_gpio_regs __iomem *g = irq2regs(d->irq); + u32 mask = (u32) irq_data_get_irq_data(d); if (trigger & ~(IRQ_TYPE_EDGE_FALLING | IRQ_TYPE_EDGE_RISING)) return -EINVAL; - irq_desc[irq].status &= ~IRQ_TYPE_SENSE_MASK; - irq_desc[irq].status |= trigger; + irq_desc[d->irq].status &= ~IRQ_TYPE_SENSE_MASK; + irq_desc[d->irq].status |= trigger; /* don't enable the IRQ if it's currently disabled */ - if (irq_desc[irq].depth == 0) { + if (irq_desc[d->irq].depth == 0) { __raw_writel(mask, (trigger & IRQ_TYPE_EDGE_FALLING) ? &g->set_falling : &g->clr_falling); __raw_writel(mask, (trigger & IRQ_TYPE_EDGE_RISING) @@ -253,9 +253,9 @@ static int gpio_irq_type(unsigned irq, unsigned trigger) static struct irq_chip gpio_irqchip = { .name = "GPIO", - .enable = gpio_irq_enable, - .disable = gpio_irq_disable, - .set_type = gpio_irq_type, + .irq_enable = gpio_irq_enable, + .irq_disable = gpio_irq_disable, + .irq_set_type = gpio_irq_type, }; static void @@ -269,8 +269,8 @@ gpio_irq_handler(unsigned irq, struct irq_desc *desc) mask <<= 16; /* temporarily mask (level sensitive) parent IRQ */ - desc->chip->mask(irq); - desc->chip->ack(irq); + desc->irq_data.chip->irq_mask(&desc->irq_data); + desc->irq_data.chip->irq_ack(&desc->irq_data); while (1) { u32 status; int n; @@ -293,7 +293,7 @@ gpio_irq_handler(unsigned irq, struct irq_desc *desc) status >>= res; } } - desc->chip->unmask(irq); + desc->irq_data.chip->irq_unmask(&desc->irq_data); /* now it may re-trigger */ } @@ -320,10 +320,10 @@ static int gpio_to_irq_unbanked(struct gpio_chip *chip, unsigned offset) return -ENODEV; } -static int gpio_irq_type_unbanked(unsigned irq, unsigned trigger) +static int gpio_irq_type_unbanked(struct irq_data *d, unsigned trigger) { - struct davinci_gpio_regs __iomem *g = irq2regs(irq); - u32 mask = (u32) get_irq_data(irq); + struct davinci_gpio_regs __iomem *g = irq2regs(d->irq); + u32 mask = (u32) irq_data_get_irq_data(d); if (trigger & ~(IRQ_TYPE_EDGE_FALLING | IRQ_TYPE_EDGE_RISING)) return -EINVAL; @@ -397,7 +397,7 @@ static int __init davinci_gpio_irq_setup(void) irq = bank_irq; gpio_irqchip_unbanked = *get_irq_desc_chip(irq_to_desc(irq)); gpio_irqchip_unbanked.name = "GPIO-AINTC"; - gpio_irqchip_unbanked.set_type = gpio_irq_type_unbanked; + gpio_irqchip_unbanked.irq_set_type = gpio_irq_type_unbanked; /* default trigger: both edges */ g = gpio2regs(0); diff --git a/arch/arm/mach-davinci/include/mach/clkdev.h b/arch/arm/mach-davinci/include/mach/clkdev.h index 730c49d1ebd8..14a504887189 100644 --- a/arch/arm/mach-davinci/include/mach/clkdev.h +++ b/arch/arm/mach-davinci/include/mach/clkdev.h @@ -1,6 +1,8 @@ #ifndef __MACH_CLKDEV_H #define __MACH_CLKDEV_H +struct clk; + static inline int __clk_get(struct clk *clk) { return 1; diff --git a/arch/arm/mach-davinci/include/mach/da8xx.h b/arch/arm/mach-davinci/include/mach/da8xx.h index 4247b3f53b33..e4fc1af8500e 100644 --- a/arch/arm/mach-davinci/include/mach/da8xx.h +++ b/arch/arm/mach-davinci/include/mach/da8xx.h @@ -15,6 +15,7 @@ #include <linux/platform_device.h> #include <linux/davinci_emac.h> +#include <linux/spi/spi.h> #include <mach/serial.h> #include <mach/edma.h> @@ -23,11 +24,19 @@ #include <mach/mmc.h> #include <mach/usb.h> #include <mach/pm.h> +#include <mach/spi.h> extern void __iomem *da8xx_syscfg0_base; extern void __iomem *da8xx_syscfg1_base; /* + * If the DA850/OMAP-L138/AM18x SoC on board is of a higher speed grade + * (than the regular 300Mhz variant), the board code should set this up + * with the supported speed before calling da850_register_cpufreq(). + */ +extern unsigned int da850_max_speed; + +/* * The cp_intc interrupt controller for the da8xx isn't in the same * chunk of physical memory space as the other registers (like it is * on the davincis) so it needs to be mapped separately. It will be @@ -70,6 +79,7 @@ void __init da850_init(void); int da830_register_edma(struct edma_rsv_info *rsv); int da850_register_edma(struct edma_rsv_info *rsv[2]); int da8xx_register_i2c(int instance, struct davinci_i2c_platform_data *pdata); +int da8xx_register_spi(int instance, struct spi_board_info *info, unsigned len); int da8xx_register_watchdog(void); int da8xx_register_usb20(unsigned mA, unsigned potpgt); int da8xx_register_usb11(struct da8xx_ohci_root_hub *pdata); @@ -88,6 +98,7 @@ extern struct platform_device da8xx_serial_device; extern struct emac_platform_data da8xx_emac_pdata; extern struct da8xx_lcdc_platform_data sharp_lcd035q3dg01_pdata; extern struct da8xx_lcdc_platform_data sharp_lk043t1dg01_pdata; +extern struct davinci_spi_platform_data da8xx_spi_pdata[]; extern struct platform_device da8xx_wdt_device; @@ -116,15 +127,8 @@ extern const short da830_ecap2_pins[]; extern const short da830_eqep0_pins[]; extern const short da830_eqep1_pins[]; -extern const short da850_uart0_pins[]; -extern const short da850_uart1_pins[]; -extern const short da850_uart2_pins[]; extern const short da850_i2c0_pins[]; extern const short da850_i2c1_pins[]; -extern const short da850_cpgmac_pins[]; -extern const short da850_mcasp_pins[]; extern const short da850_lcdcntl_pins[]; -extern const short da850_mmcsd0_pins[]; -extern const short da850_emif25_pins[]; #endif /* __ASM_ARCH_DAVINCI_DA8XX_H */ diff --git a/arch/arm/mach-davinci/include/mach/edma.h b/arch/arm/mach-davinci/include/mach/edma.h index dc10ef6cf572..20c77f29bf0f 100644 --- a/arch/arm/mach-davinci/include/mach/edma.h +++ b/arch/arm/mach-davinci/include/mach/edma.h @@ -151,42 +151,6 @@ struct edmacc_param { #define DA830_DMACH2EVENT_MAP1 0x00000000u #define DA830_EDMA_ARM_OWN 0x30FFCCFFu -/* DA830 specific EDMA3 Events Information */ -enum DA830_edma_ch { - DA830_DMACH_MCASP0_RX, - DA830_DMACH_MCASP0_TX, - DA830_DMACH_MCASP1_RX, - DA830_DMACH_MCASP1_TX, - DA830_DMACH_MCASP2_RX, - DA830_DMACH_MCASP2_TX, - DA830_DMACH_GPIO_BNK0INT, - DA830_DMACH_GPIO_BNK1INT, - DA830_DMACH_UART0_RX, - DA830_DMACH_UART0_TX, - DA830_DMACH_TMR64P0_EVTOUT12, - DA830_DMACH_TMR64P0_EVTOUT34, - DA830_DMACH_UART1_RX, - DA830_DMACH_UART1_TX, - DA830_DMACH_SPI0_RX, - DA830_DMACH_SPI0_TX, - DA830_DMACH_MMCSD_RX, - DA830_DMACH_MMCSD_TX, - DA830_DMACH_SPI1_RX, - DA830_DMACH_SPI1_TX, - DA830_DMACH_DMAX_EVTOUT6, - DA830_DMACH_DMAX_EVTOUT7, - DA830_DMACH_GPIO_BNK2INT, - DA830_DMACH_GPIO_BNK3INT, - DA830_DMACH_I2C0_RX, - DA830_DMACH_I2C0_TX, - DA830_DMACH_I2C1_RX, - DA830_DMACH_I2C1_TX, - DA830_DMACH_GPIO_BNK4INT, - DA830_DMACH_GPIO_BNK5INT, - DA830_DMACH_UART2_RX, - DA830_DMACH_UART2_TX -}; - /*ch_status paramater of callback function possible values*/ #define DMA_COMPLETE 1 #define DMA_CC_ERROR 2 diff --git a/arch/arm/mach-davinci/include/mach/io.h b/arch/arm/mach-davinci/include/mach/io.h index 62b0a90309ad..d1b954955c12 100644 --- a/arch/arm/mach-davinci/include/mach/io.h +++ b/arch/arm/mach-davinci/include/mach/io.h @@ -22,8 +22,8 @@ #define __mem_isa(a) (a) #ifndef __ASSEMBLER__ -#define __arch_ioremap(p, s, t) davinci_ioremap(p, s, t) -#define __arch_iounmap(v) davinci_iounmap(v) +#define __arch_ioremap davinci_ioremap +#define __arch_iounmap davinci_iounmap void __iomem *davinci_ioremap(unsigned long phys, size_t size, unsigned int type); diff --git a/arch/arm/mach-davinci/include/mach/memory.h b/arch/arm/mach-davinci/include/mach/memory.h index 22eb97c1c30b..78822723f382 100644 --- a/arch/arm/mach-davinci/include/mach/memory.h +++ b/arch/arm/mach-davinci/include/mach/memory.h @@ -26,9 +26,9 @@ #if defined(CONFIG_ARCH_DAVINCI_DA8XX) && defined(CONFIG_ARCH_DAVINCI_DMx) #error Cannot enable DaVinci and DA8XX platforms concurrently #elif defined(CONFIG_ARCH_DAVINCI_DA8XX) -#define PHYS_OFFSET DA8XX_DDR_BASE +#define PLAT_PHYS_OFFSET DA8XX_DDR_BASE #else -#define PHYS_OFFSET DAVINCI_DDR_BASE +#define PLAT_PHYS_OFFSET DAVINCI_DDR_BASE #endif #define DDR2_SDRCR_OFFSET 0xc diff --git a/arch/arm/mach-davinci/include/mach/mux.h b/arch/arm/mach-davinci/include/mach/mux.h index de11aac76a80..5d4e0fed828a 100644 --- a/arch/arm/mach-davinci/include/mach/mux.h +++ b/arch/arm/mach-davinci/include/mach/mux.h @@ -908,11 +908,15 @@ enum davinci_da850_index { DA850_NEMA_CS_2, /* GPIO function */ + DA850_GPIO2_4, DA850_GPIO2_6, DA850_GPIO2_8, DA850_GPIO2_15, + DA850_GPIO3_12, + DA850_GPIO3_13, DA850_GPIO4_0, DA850_GPIO4_1, + DA850_GPIO6_13, DA850_RTC_ALARM, }; diff --git a/arch/arm/mach-davinci/include/mach/psc.h b/arch/arm/mach-davinci/include/mach/psc.h index 62b0858f68ca..a47e6f29206e 100644 --- a/arch/arm/mach-davinci/include/mach/psc.h +++ b/arch/arm/mach-davinci/include/mach/psc.h @@ -150,7 +150,7 @@ #define DA8XX_LPSC0_SCR0_SS 10 #define DA8XX_LPSC0_SCR1_SS 11 #define DA8XX_LPSC0_SCR2_SS 12 -#define DA8XX_LPSC0_DMAX 13 +#define DA8XX_LPSC0_PRUSS 13 #define DA8XX_LPSC0_ARM 14 #define DA8XX_LPSC0_GEM 15 diff --git a/arch/arm/mach-davinci/include/mach/spi.h b/arch/arm/mach-davinci/include/mach/spi.h index 910efbf099c0..7af305b37868 100644 --- a/arch/arm/mach-davinci/include/mach/spi.h +++ b/arch/arm/mach-davinci/include/mach/spi.h @@ -19,26 +19,71 @@ #ifndef __ARCH_ARM_DAVINCI_SPI_H #define __ARCH_ARM_DAVINCI_SPI_H +#include <mach/edma.h> + +#define SPI_INTERN_CS 0xFF + enum { SPI_VERSION_1, /* For DM355/DM365/DM6467 */ SPI_VERSION_2, /* For DA8xx */ }; +/** + * davinci_spi_platform_data - Platform data for SPI master device on DaVinci + * + * @version: version of the SPI IP. Different DaVinci devices have slightly + * varying versions of the same IP. + * @num_chipselect: number of chipselects supported by this SPI master + * @intr_line: interrupt line used to connect the SPI IP to the ARM interrupt + * controller withn the SoC. Possible values are 0 and 1. + * @chip_sel: list of GPIOs which can act as chip-selects for the SPI. + * SPI_INTERN_CS denotes internal SPI chip-select. Not necessary + * to populate if all chip-selects are internal. + * @cshold_bug: set this to true if the SPI controller on your chip requires + * a write to CSHOLD bit in between transfers (like in DM355). + * @dma_event_q: DMA event queue to use if SPI_IO_TYPE_DMA is used for any + * device on the bus. + */ struct davinci_spi_platform_data { - u8 version; - u8 num_chipselect; + u8 version; + u8 num_chipselect; + u8 intr_line; + u8 *chip_sel; + bool cshold_bug; + enum dma_event_q dma_event_q; +}; + +/** + * davinci_spi_config - Per-chip-select configuration for SPI slave devices + * + * @wdelay: amount of delay between transmissions. Measured in number of + * SPI module clocks. + * @odd_parity: polarity of parity flag at the end of transmit data stream. + * 0 - odd parity, 1 - even parity. + * @parity_enable: enable transmission of parity at end of each transmit + * data stream. + * @io_type: type of IO transfer. Choose between polled, interrupt and DMA. + * @timer_disable: disable chip-select timers (setup and hold) + * @c2tdelay: chip-select setup time. Measured in number of SPI module clocks. + * @t2cdelay: chip-select hold time. Measured in number of SPI module clocks. + * @t2edelay: transmit data finished to SPI ENAn pin inactive time. Measured + * in number of SPI clocks. + * @c2edelay: chip-select active to SPI ENAn signal active time. Measured in + * number of SPI clocks. + */ +struct davinci_spi_config { u8 wdelay; u8 odd_parity; u8 parity_enable; - u8 wait_enable; +#define SPI_IO_TYPE_INTR 0 +#define SPI_IO_TYPE_POLL 1 +#define SPI_IO_TYPE_DMA 2 + u8 io_type; u8 timer_disable; - u8 clk_internal; - u8 cs_hold; - u8 intr_level; - u8 poll_mode; - u8 use_dma; u8 c2tdelay; u8 t2cdelay; + u8 t2edelay; + u8 c2edelay; }; #endif /* __ARCH_ARM_DAVINCI_SPI_H */ diff --git a/arch/arm/mach-davinci/include/mach/tnetv107x.h b/arch/arm/mach-davinci/include/mach/tnetv107x.h index 5a681d880dcb..89c1fdc63c0b 100644 --- a/arch/arm/mach-davinci/include/mach/tnetv107x.h +++ b/arch/arm/mach-davinci/include/mach/tnetv107x.h @@ -34,6 +34,7 @@ #include <linux/serial_8250.h> #include <linux/input/matrix_keypad.h> +#include <linux/mfd/ti_ssp.h> #include <mach/mmc.h> #include <mach/nand.h> @@ -44,6 +45,7 @@ struct tnetv107x_device_info { struct davinci_mmc_config *mmc_config[2]; /* 2 controllers */ struct davinci_nand_pdata *nand_config[4]; /* 4 chipsels */ struct matrix_keypad_platform_data *keypad_config; + struct ti_ssp_data *ssp_config; }; extern struct platform_device tnetv107x_wdt_device; diff --git a/arch/arm/mach-davinci/irq.c b/arch/arm/mach-davinci/irq.c index 784ddf3c5ad4..5e05c9b64e1f 100644 --- a/arch/arm/mach-davinci/irq.c +++ b/arch/arm/mach-davinci/irq.c @@ -53,14 +53,14 @@ static inline void davinci_irq_writel(unsigned long value, int offset) } /* Disable interrupt */ -static void davinci_mask_irq(unsigned int irq) +static void davinci_mask_irq(struct irq_data *d) { unsigned int mask; u32 l; - mask = 1 << IRQ_BIT(irq); + mask = 1 << IRQ_BIT(d->irq); - if (irq > 31) { + if (d->irq > 31) { l = davinci_irq_readl(IRQ_ENT_REG1_OFFSET); l &= ~mask; davinci_irq_writel(l, IRQ_ENT_REG1_OFFSET); @@ -72,14 +72,14 @@ static void davinci_mask_irq(unsigned int irq) } /* Enable interrupt */ -static void davinci_unmask_irq(unsigned int irq) +static void davinci_unmask_irq(struct irq_data *d) { unsigned int mask; u32 l; - mask = 1 << IRQ_BIT(irq); + mask = 1 << IRQ_BIT(d->irq); - if (irq > 31) { + if (d->irq > 31) { l = davinci_irq_readl(IRQ_ENT_REG1_OFFSET); l |= mask; davinci_irq_writel(l, IRQ_ENT_REG1_OFFSET); @@ -91,23 +91,23 @@ static void davinci_unmask_irq(unsigned int irq) } /* EOI interrupt */ -static void davinci_ack_irq(unsigned int irq) +static void davinci_ack_irq(struct irq_data *d) { unsigned int mask; - mask = 1 << IRQ_BIT(irq); + mask = 1 << IRQ_BIT(d->irq); - if (irq > 31) + if (d->irq > 31) davinci_irq_writel(mask, IRQ_REG1_OFFSET); else davinci_irq_writel(mask, IRQ_REG0_OFFSET); } static struct irq_chip davinci_irq_chip_0 = { - .name = "AINTC", - .ack = davinci_ack_irq, - .mask = davinci_mask_irq, - .unmask = davinci_unmask_irq, + .name = "AINTC", + .irq_ack = davinci_ack_irq, + .irq_mask = davinci_mask_irq, + .irq_unmask = davinci_unmask_irq, }; /* ARM Interrupt Controller Initialization */ diff --git a/arch/arm/mach-davinci/pm.c b/arch/arm/mach-davinci/pm.c index fab953b43dea..1bd73a04be20 100644 --- a/arch/arm/mach-davinci/pm.c +++ b/arch/arm/mach-davinci/pm.c @@ -110,7 +110,7 @@ static int davinci_pm_enter(suspend_state_t state) return ret; } -static struct platform_suspend_ops davinci_pm_ops = { +static const struct platform_suspend_ops davinci_pm_ops = { .enter = davinci_pm_enter, .valid = suspend_valid_only_mem, }; diff --git a/arch/arm/mach-davinci/psc.c b/arch/arm/mach-davinci/psc.c index 1b15dbd0a77b..a41580400701 100644 --- a/arch/arm/mach-davinci/psc.c +++ b/arch/arm/mach-davinci/psc.c @@ -83,21 +83,16 @@ void davinci_psc_config(unsigned int domain, unsigned int ctlr, pdctl1 = __raw_readl(psc_base + PDCTL1); pdctl1 |= 0x100; __raw_writel(pdctl1, psc_base + PDCTL1); - - do { - ptstat = __raw_readl(psc_base + - PTSTAT); - } while (!(((ptstat >> domain) & 1) == 0)); } else { ptcmd = 1 << domain; __raw_writel(ptcmd, psc_base + PTCMD); - - do { - ptstat = __raw_readl(psc_base + PTSTAT); - } while (!(((ptstat >> domain) & 1) == 0)); } do { + ptstat = __raw_readl(psc_base + PTSTAT); + } while (!(((ptstat >> domain) & 1) == 0)); + + do { mdstat = __raw_readl(psc_base + MDSTAT + 4 * id); } while (!((mdstat & MDSTAT_STATE_MASK) == next_state)); diff --git a/arch/arm/mach-davinci/time.c b/arch/arm/mach-davinci/time.c index 0f21c36e65dd..e1969ce904dc 100644 --- a/arch/arm/mach-davinci/time.c +++ b/arch/arm/mach-davinci/time.c @@ -272,15 +272,35 @@ static cycle_t read_cycles(struct clocksource *cs) return (cycles_t)timer32_read(t); } +/* + * Kernel assumes that sched_clock can be called early but may not have + * things ready yet. + */ +static cycle_t read_dummy(struct clocksource *cs) +{ + return 0; +} + + static struct clocksource clocksource_davinci = { .rating = 300, - .read = read_cycles, + .read = read_dummy, .mask = CLOCKSOURCE_MASK(32), - .shift = 24, .flags = CLOCK_SOURCE_IS_CONTINUOUS, }; /* + * Overwrite weak default sched_clock with something more precise + */ +unsigned long long notrace sched_clock(void) +{ + const cycle_t cyc = clocksource_davinci.read(&clocksource_davinci); + + return clocksource_cyc2ns(cyc, clocksource_davinci.mult, + clocksource_davinci.shift); +} + +/* * clockevent */ static int davinci_set_next_event(unsigned long cycles, @@ -377,11 +397,10 @@ static void __init davinci_timer_init(void) davinci_clock_tick_rate = clk_get_rate(timer_clk); /* setup clocksource */ + clocksource_davinci.read = read_cycles; clocksource_davinci.name = id_to_name[clocksource_id]; - clocksource_davinci.mult = - clocksource_khz2mult(davinci_clock_tick_rate/1000, - clocksource_davinci.shift); - if (clocksource_register(&clocksource_davinci)) + if (clocksource_register_hz(&clocksource_davinci, + davinci_clock_tick_rate)) printk(err, clocksource_davinci.name); /* setup clockevent */ diff --git a/arch/arm/mach-davinci/tnetv107x.c b/arch/arm/mach-davinci/tnetv107x.c index daeae06430b9..1b28fdd892a6 100644 --- a/arch/arm/mach-davinci/tnetv107x.c +++ b/arch/arm/mach-davinci/tnetv107x.c @@ -131,12 +131,13 @@ define_pll_clk(tdm, 1, 0x0ff, 0x200); define_pll_clk(eth, 2, 0x0ff, 0x400); /* Level 2 - divided outputs from the PLLs */ -#define define_pll_div_clk(pll, cname, div) \ - static struct clk pll##_##cname##_clk = { \ - .name = #pll "_" #cname "_clk",\ - .parent = &pll_##pll##_clk, \ - .flags = CLK_PLL, \ - .div_reg = PLLDIV##div, \ +#define define_pll_div_clk(pll, cname, div) \ + static struct clk pll##_##cname##_clk = { \ + .name = #pll "_" #cname "_clk", \ + .parent = &pll_##pll##_clk, \ + .flags = CLK_PLL, \ + .div_reg = PLLDIV##div, \ + .set_rate = davinci_set_sysclk_rate, \ } define_pll_div_clk(sys, arm1176, 1); @@ -192,6 +193,7 @@ lpsc_clk_enabled(system, sys_half_clk, SYSTEM); lpsc_clk_enabled(ddr2_vrst, sys_ddr_clk, DDR2_EMIF1_VRST); lpsc_clk_enabled(ddr2_vctl_rst, sys_ddr_clk, DDR2_EMIF2_VCTL_RST); lpsc_clk_enabled(wdt_arm, sys_half_clk, WDT_ARM); +lpsc_clk_enabled(timer1, sys_half_clk, TIMER1); lpsc_clk(mbx_lite, sys_arm1176_clk, MBX_LITE); lpsc_clk(ethss, eth_125mhz_clk, ETHSS); @@ -205,16 +207,15 @@ lpsc_clk(mdio, sys_half_clk, MDIO); lpsc_clk(sdio0, sys_half_clk, SDIO0); lpsc_clk(sdio1, sys_half_clk, SDIO1); lpsc_clk(timer0, sys_half_clk, TIMER0); -lpsc_clk(timer1, sys_half_clk, TIMER1); lpsc_clk(wdt_dsp, sys_half_clk, WDT_DSP); lpsc_clk(ssp, sys_half_clk, SSP); lpsc_clk(tdm0, tdm_0_clk, TDM0); lpsc_clk(tdm1, tdm_1_clk, TDM1); lpsc_clk(vlynq, sys_vlynq_ref_clk, VLYNQ); lpsc_clk(mcdma, sys_half_clk, MCDMA); -lpsc_clk(usb0, sys_half_clk, USB0); -lpsc_clk(usb1, sys_half_clk, USB1); lpsc_clk(usbss, sys_half_clk, USBSS); +lpsc_clk(usb0, clk_usbss, USB0); +lpsc_clk(usb1, clk_usbss, USB1); lpsc_clk(ethss_rgmii, eth_250mhz_clk, ETHSS_RGMII); lpsc_clk(imcop, sys_dsp_clk, IMCOP); lpsc_clk(spare, sys_half_clk, SPARE); @@ -277,11 +278,13 @@ static struct clk_lookup clks[] = { CLK(NULL, "timer1", &clk_timer1), CLK("tnetv107x_wdt.0", NULL, &clk_wdt_arm), CLK(NULL, "clk_wdt_dsp", &clk_wdt_dsp), - CLK("ti-ssp.0", NULL, &clk_ssp), + CLK("ti-ssp", NULL, &clk_ssp), CLK(NULL, "clk_tdm0", &clk_tdm0), CLK(NULL, "clk_vlynq", &clk_vlynq), CLK(NULL, "clk_mcdma", &clk_mcdma), + CLK(NULL, "clk_usbss", &clk_usbss), CLK(NULL, "clk_usb0", &clk_usb0), + CLK(NULL, "clk_usb1", &clk_usb1), CLK(NULL, "clk_tdm1", &clk_tdm1), CLK(NULL, "clk_debugss", &clk_debugss), CLK(NULL, "clk_ethss_rgmii", &clk_ethss_rgmii), @@ -289,8 +292,6 @@ static struct clk_lookup clks[] = { CLK(NULL, "clk_imcop", &clk_imcop), CLK(NULL, "clk_spare", &clk_spare), CLK("davinci_mmc.1", NULL, &clk_sdio1), - CLK(NULL, "clk_usb1", &clk_usb1), - CLK(NULL, "clk_usbss", &clk_usbss), CLK(NULL, "clk_ddr2_vrst", &clk_ddr2_vrst), CLK(NULL, "clk_ddr2_vctl_rst", &clk_ddr2_vctl_rst), CLK(NULL, NULL, NULL), diff --git a/arch/arm/mach-davinci/usb.c b/arch/arm/mach-davinci/usb.c index 31f0cbea0caa..23d2b6d9fa63 100644 --- a/arch/arm/mach-davinci/usb.c +++ b/arch/arm/mach-davinci/usb.c @@ -64,17 +64,19 @@ static struct resource usb_resources[] = { { .start = IRQ_USBINT, .flags = IORESOURCE_IRQ, + .name = "mc" }, { /* placeholder for the dedicated CPPI IRQ */ .flags = IORESOURCE_IRQ, + .name = "dma" }, }; static u64 usb_dmamask = DMA_BIT_MASK(32); static struct platform_device usb_dev = { - .name = "musb_hdrc", + .name = "musb-davinci", .id = -1, .dev = { .platform_data = &usb_data, @@ -110,6 +112,7 @@ static struct resource da8xx_usb20_resources[] = { { .start = IRQ_DA8XX_USB_INT, .flags = IORESOURCE_IRQ, + .name = "mc", }, }; @@ -121,6 +124,7 @@ int __init da8xx_register_usb20(unsigned mA, unsigned potpgt) usb_dev.resource = da8xx_usb20_resources; usb_dev.num_resources = ARRAY_SIZE(da8xx_usb20_resources); + usb_dev.name = "musb-da8xx"; return platform_device_register(&usb_dev); } |