diff options
Diffstat (limited to 'arch/arm/mach-tegra/power.h')
| -rw-r--r-- | arch/arm/mach-tegra/power.h | 26 |
1 files changed, 0 insertions, 26 deletions
diff --git a/arch/arm/mach-tegra/power.h b/arch/arm/mach-tegra/power.h index 53e9e9568fd2..6903b961ec67 100644 --- a/arch/arm/mach-tegra/power.h +++ b/arch/arm/mach-tegra/power.h @@ -109,18 +109,6 @@ extern NvRmDeviceHandle s_hRmGlobal; //------------------------------------------------------------------------------ //Correct name \ Broken name from nvboot_pmc_scratch_map.h -#define APBDEV_PMC_SCRATCH2_0_CLK_RST_CONTROLLER_OSC_CTRL_0_XOBP_RANGE\ - APBDEV_PMC_SCRATCH2_0_CLK_RST_OSC_CTRL_XOBP_RANGE -#define APBDEV_PMC_SCRATCH2_0_CLK_RST_CONTROLLER_PLLM_BASE_0_PLLM_DIVM_RANGE\ - APBDEV_PMC_SCRATCH2_0_CLK_RST_PLLM_BASE_PLLM_DIVM_RANGE -#define APBDEV_PMC_SCRATCH2_0_CLK_RST_CONTROLLER_PLLM_BASE_0_PLLM_DIVN_RANGE\ - APBDEV_PMC_SCRATCH2_0_CLK_RST_PLLM_BASE_PLLM_DIVN_RANGE -#define APBDEV_PMC_SCRATCH2_0_CLK_RST_CONTROLLER_PLLM_BASE_0_PLLM_DIVP_RANGE\ - APBDEV_PMC_SCRATCH2_0_CLK_RST_PLLM_BASE_PLLM_DIVP_RANGE -#define APBDEV_PMC_SCRATCH2_0_CLK_RST_CONTROLLER_PLLM_MISC_0_PLLM_CPCON_RANGE\ - APBDEV_PMC_SCRATCH2_0_CLK_RST_PLLM_MISC_CPCON_RANGE -#define APBDEV_PMC_SCRATCH2_0_CLK_RST_CONTROLLER_PLLM_MISC_0_PLLM_LFCON_RANGE\ - APBDEV_PMC_SCRATCH2_0_CLK_RST_PLLM_MISC_LFCON_RANGE #define APBDEV_PMC_SCRATCH3_0_CLK_RST_CONTROLLER_PLLX_BASE_0_PLLX_DIVP_RANGE\ APBDEV_PMC_SCRATCH3_0_CLK_RST_PLLX_BASE_PLLX_DIVP_RANGE #define APBDEV_PMC_SCRATCH3_0_CLK_RST_CONTROLLER_PLLX_BASE_0_PLLX_DIVN_RANGE\ @@ -173,9 +161,7 @@ extern NvRmDeviceHandle s_hRmGlobal; @param s Scratch register name (APBDEV_PMC_s) */ #define SCRATCH_REGS() \ - SCRATCH_REG(SCRATCH2) \ SCRATCH_REG(SCRATCH3) \ - SCRATCH_REG(SCRATCH4) \ SCRATCH_REG(SCRATCH5) \ SCRATCH_REG(SCRATCH6) \ SCRATCH_REG(SCRATCH7) \ @@ -195,7 +181,6 @@ extern NvRmDeviceHandle s_hRmGlobal; SCRATCH_REG(SCRATCH21) \ SCRATCH_REG(SCRATCH22) \ SCRATCH_REG(SCRATCH23) \ - SCRATCH_REG(SCRATCH24) \ SCRATCH_REG(SCRATCH25) \ SCRATCH_REG(SCRATCH35) \ SCRATCH_REG(SCRATCH36) \ @@ -216,20 +201,12 @@ extern NvRmDeviceHandle s_hRmGlobal; REG(SCRATCH25, AHB, ARBITRATION_XBAR_CTRL, HOLD_DIS) \ REG(SCRATCH25, AHB, ARBITRATION_XBAR_CTRL, MEM_INIT_DONE) \ /* CLK_RST Group */ \ - REG(SCRATCH2, CLK_RST_CONTROLLER, OSC_CTRL, XOBP) \ - REG(SCRATCH2, CLK_RST_CONTROLLER, PLLM_BASE, PLLM_DIVM) \ - REG(SCRATCH2, CLK_RST_CONTROLLER, PLLM_BASE, PLLM_DIVN) \ - REG(SCRATCH2, CLK_RST_CONTROLLER, PLLM_BASE, PLLM_DIVP) \ - REG(SCRATCH2, CLK_RST_CONTROLLER, PLLM_MISC, PLLM_CPCON) \ - REG(SCRATCH2, CLK_RST_CONTROLLER, PLLM_MISC, PLLM_LFCON) \ - /**/ \ REG(SCRATCH3, CLK_RST_CONTROLLER, PLLX_BASE, PLLX_DIVP) \ REG(SCRATCH3, CLK_RST_CONTROLLER, PLLX_BASE, PLLX_DIVN) \ REG(SCRATCH3, CLK_RST_CONTROLLER, PLLX_BASE, PLLX_DIVM) \ REG(SCRATCH3, CLK_RST_CONTROLLER, PLLX_MISC, PLLX_CPCON) \ REG(SCRATCH3, CLK_RST_CONTROLLER, PLLX_MISC, PLLX_LFCON) \ /* EMC Group */ \ - REG(SCRATCH4, EMC, FBIO_SPARE, CFG_FBIO_SPARE_WB0) \ /**/ \ REG(SCRATCH5, EMC, R2W, R2W) \ REG(SCRATCH5, EMC, RAS, RAS) \ @@ -393,9 +370,6 @@ extern NvRmDeviceHandle s_hRmGlobal; /**/ \ REG(SCRATCH22, MC, LOWLATENCY_CONFIG, LL_DRAM_INTERLEAVE) \ /* APB_MISC Group */ \ - REG(SCRATCH2, APB_MISC, GP_XM2CFGAPADCTRL, CFG2TMC_XM2CFGA_PREEMP_EN) \ - REG(SCRATCH2, APB_MISC, GP_XM2CFGDPADCTRL, CFG2TMC_XM2CFGD_SCHMT_EN) \ - /**/ \ REG(SCRATCH3, APB_MISC, GP_XM2CFGCPADCTRL2, CFG2TMC_XM2CFGC_VREF_DQ) \ REG(SCRATCH3, APB_MISC, GP_XM2CFGCPADCTRL, CFG2TMC_XM2CFGC_SCHMT_EN) \ REG(SCRATCH3, APB_MISC, GP_XM2CLKCFGPADCTRL, CFG2TMC_XM2CLKCFG_PREEMP_EN) \ |