diff options
Diffstat (limited to 'arch/arm/mach-tegra/tegra2_clocks.c')
| -rw-r--r-- | arch/arm/mach-tegra/tegra2_clocks.c | 10 |
1 files changed, 6 insertions, 4 deletions
diff --git a/arch/arm/mach-tegra/tegra2_clocks.c b/arch/arm/mach-tegra/tegra2_clocks.c index 08359fcc0d31..58d2dcddbfaa 100644 --- a/arch/arm/mach-tegra/tegra2_clocks.c +++ b/arch/arm/mach-tegra/tegra2_clocks.c @@ -65,8 +65,9 @@ #define PERIPH_CLK_SOURCE_NUM \ ((PERIPH_CLK_SOURCE_OSC - PERIPH_CLK_SOURCE_I2S1) / 4) -#define PERIPH_CLK_SOURCE_MASK (3<<30) -#define PERIPH_CLK_SOURCE_SHIFT 30 +//special handling for pwm clock source, uses 3 bits 30:28 instead of 2 bits 31:30 +#define PERIPH_CLK_SOURCE_MASK ((c->reg) != 0x110 ? (3<<PERIPH_CLK_SOURCE_SHIFT) : (7<<PERIPH_CLK_SOURCE_SHIFT)) +#define PERIPH_CLK_SOURCE_SHIFT ((c->reg) != 0x110 ? 30 : 28) #define PERIPH_CLK_SOURCE_ENABLE (1<<28) #define PERIPH_CLK_SOURCE_DIVU71_MASK 0xFF #define PERIPH_CLK_SOURCE_DIVU16_MASK 0xFFFF @@ -2103,9 +2104,9 @@ static const struct audio_sources { { .name = "spdif_in", .value = 0 }, { .name = "i2s1", .value = 1 }, { .name = "i2s2", .value = 2 }, + { .name = "ac97", .value = 3 }, { .name = "pll_a_out0", .value = 4 }, #if 0 /* FIXME: not implemented */ - { .name = "ac97", .value = 3 }, { .name = "ext_audio_clk2", .value = 5 }, { .name = "ext_audio_clk1", .value = 6 }, { .name = "ext_vimclk", .value = 7 }, @@ -2428,6 +2429,7 @@ struct clk tegra_list_periph_clks[] = { PERIPH_CLK("rtc", "rtc-tegra", NULL, 4, 0, 0x31E, 32768, mux_clk_32k, PERIPH_NO_RESET | PERIPH_ON_APB), PERIPH_CLK("kbc", "tegra-kbc", NULL, 36, 0, 0x31E, 32768, mux_clk_32k, PERIPH_NO_RESET | PERIPH_ON_APB), PERIPH_CLK("timer", "timer", NULL, 5, 0, 0x31E, 26000000, mux_clk_m, 0), + PERIPH_CLK("ac97", "tegra20-ac97", NULL, 3, 0, 0x31E, 26000000, mux_pllaout0_audio2x_pllp_clkm, MUX | DIV_U71 | PERIPH_ON_APB), PERIPH_CLK("i2s1", "tegra20-i2s.0", NULL, 11, 0x100, 0x31E, 26000000, mux_pllaout0_audio2x_pllp_clkm, MUX | DIV_U71 | PERIPH_ON_APB), PERIPH_CLK("i2s2", "tegra20-i2s.1", NULL, 18, 0x104, 0x31E, 26000000, mux_pllaout0_audio2x_pllp_clkm, MUX | DIV_U71 | PERIPH_ON_APB), PERIPH_CLK("fuse", "fuse-tegra", "fuse", 39, 0, 0x31E, 26000000, mux_clk_m, PERIPH_ON_APB), @@ -2755,7 +2757,7 @@ struct tegra_cpufreq_table_data *tegra_cpufreq_table_get(void) unsigned long tegra_emc_to_cpu_ratio(unsigned long cpu_rate) { /* Vote on memory bus frequency based on cpu frequency */ - if (cpu_rate > 1000000000) + if (cpu_rate > 1000000) return 760000000; else if (cpu_rate >= 816000) return 600000000; /* cpu 816 MHz, emc max */ |