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Diffstat (limited to 'arch/arm64/boot/dts/freescale/fsl-imx8mm-verdin.dtsi')
-rwxr-xr-xarch/arm64/boot/dts/freescale/fsl-imx8mm-verdin.dtsi24
1 files changed, 23 insertions, 1 deletions
diff --git a/arch/arm64/boot/dts/freescale/fsl-imx8mm-verdin.dtsi b/arch/arm64/boot/dts/freescale/fsl-imx8mm-verdin.dtsi
index 1175dfb56cf5..e83985449d7f 100755
--- a/arch/arm64/boot/dts/freescale/fsl-imx8mm-verdin.dtsi
+++ b/arch/arm64/boot/dts/freescale/fsl-imx8mm-verdin.dtsi
@@ -22,6 +22,7 @@
compatible = "regulator-fixed";
enable-active-high;
gpio = <&gpio2 20 GPIO_ACTIVE_HIGH>;
+ off-on-delay = <500000>;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_reg_eth>;
regulator-boot-on;
@@ -192,8 +193,9 @@
phy-handle = <&ethphy0>;
phy-mode = "rgmii";
phy-supply = <&reg_ethphy>;
- pinctrl-names = "default";
+ pinctrl-names = "default", "sleep";
pinctrl-0 = <&pinctrl_fec1>;
+ pinctrl-1 = <&pinctrl_fec1_sleep>;
status = "okay";
mdio {
@@ -754,6 +756,26 @@
>;
};
+ pinctrl_fec1_sleep: fec1-sleepgrp {
+ fsl,pins = <
+ MX8MM_IOMUXC_ENET_MDC_ENET1_MDC 0x3
+ MX8MM_IOMUXC_ENET_MDIO_ENET1_MDIO 0x3
+ MX8MM_IOMUXC_ENET_TD3_GPIO1_IO18 0x1f
+ MX8MM_IOMUXC_ENET_TD2_GPIO1_IO19 0x1f
+ MX8MM_IOMUXC_ENET_TD1_GPIO1_IO20 0x1f
+ MX8MM_IOMUXC_ENET_TD0_GPIO1_IO21 0x1f
+ MX8MM_IOMUXC_ENET_RD3_ENET1_RGMII_RD3 0x91
+ MX8MM_IOMUXC_ENET_RD2_ENET1_RGMII_RD2 0x91
+ MX8MM_IOMUXC_ENET_RD1_ENET1_RGMII_RD1 0x91
+ MX8MM_IOMUXC_ENET_RD0_ENET1_RGMII_RD0 0x91
+ MX8MM_IOMUXC_ENET_TXC_GPIO1_IO23 0x1f
+ MX8MM_IOMUXC_ENET_RXC_ENET1_RGMII_RXC 0x91
+ MX8MM_IOMUXC_ENET_RX_CTL_ENET1_RGMII_RX_CTL 0x91
+ MX8MM_IOMUXC_ENET_TX_CTL_GPIO1_IO22 0x1f
+ MX8MM_IOMUXC_GPIO1_IO10_GPIO1_IO10 0x184
+ >;
+ };
+
pinctrl_flexspi0: flexspi0grp {
fsl,pins = <
MX8MM_IOMUXC_NAND_ALE_QSPI_A_SCLK 0x1c2 /* SODIMM 52 */