1 files changed, 98 insertions, 0 deletions
diff --git a/arch/arm64/boot/dts/freescale/fsl-imx8mq-evk-root.dts b/arch/arm64/boot/dts/freescale/fsl-imx8mq-evk-root.dts
new file mode 100644
index 000000000000..cff47f6497a0
--- /dev/null
+++ b/arch/arm64/boot/dts/freescale/fsl-imx8mq-evk-root.dts
@@ -0,0 +1,98 @@
+/*
+ * Copyright 2018 NXP
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License
+ * as published by the Free Software Foundation; either version 2
+ * of the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ */
+
+#include "fsl-imx8mq-evk.dts"
+
+/ {
+	interrupt-parent = <&gic>;
+};
+
+/delete-node/ &gpc;
+
+&CPU_SLEEP {
+	/* We are not using GPC for now, need set 0 to avoid hang */
+	arm,psci-suspend-param = <0x0>;
+};
+
+&iomuxc {
+	imx8mq-evk {
+		/*
+		 * Used for the 2nd Linux.
+		 * TODO: M4 may use these pins.
+		 */
+		pinctrl_uart2: uart2grp {
+			fsl,pins = <
+				MX8MQ_IOMUXC_UART2_RXD_UART2_DCE_RX	0x49
+				MX8MQ_IOMUXC_UART2_TXD_UART2_DCE_TX	0x49
+			>;
+		};
+	};
+};
+
+&{/busfreq} {
+	/* Disable busfreq, to avoid 1st Linux busfreq crash other inmates */
+	status = "disabled";
+};
+
+&resmem {
+	jh_reserved: jh@0xffc00000 {
+		no-map;
+		reg = <0 0xffc00000 0x0 0x400000>;
+	};
+
+	inmate_reserved: inmate@0xc0000000 {
+		no-map;
+		reg = <0 0xc0000000 0x0 0x3fc00000>;
+	};
+
+	loader_reserved: loader@0xbff00000 {
+		no-map;
+		reg = <0 0xbff00000 0x0 0x00100000>;
+	};
+
+	ivshmem_reserved: ivshmem@0xbfe00000 {
+		no-map;
+		reg = <0 0xbfe00000 0x0 0x00100000>;
+	};
+
+	ivshmem2_reserved: ivshmem2@0xbfd00000 {
+		no-map;
+		reg = <0 0xbfd00000 0x0 0x00100000>;
+	};
+
+	pci_reserved: pci@0xbfc00000 {
+		no-map;
+		reg = <0 0xbfb00000 0x0 0x00200000>;
+	};
+};
+
+&uart1 {
+	/* uart2 is used by the 2nd OS, so configure pin and clk */
+	pinctrl-0 = <&pinctrl_uart1>, <&pinctrl_uart2>;
+	assigned-clocks = <&clk IMX8MQ_CLK_UART1_SRC>,
+			<&clk IMX8MQ_CLK_UART2_SRC>;
+	assigned-clock-parents = <&clk IMX8MQ_CLK_25M>,
+			<&clk IMX8MQ_CLK_25M>;
+};
+
+&usdhc1 {
+	status = "disabled";
+};
+
+&usdhc2 {
+	/* sdhc1 is used by 2nd linux, configure the pin */
+	pinctrl-0 = <&pinctrl_usdhc1>, <&pinctrl_usdhc2>, <&pinctrl_usdhc2_gpio>;
+	pinctrl-1 = <&pinctrl_usdhc1>, <&pinctrl_usdhc2_100mhz>, <&pinctrl_usdhc2_gpio>;
+	pinctrl-2 = <&pinctrl_usdhc1>, <&pinctrl_usdhc2_200mhz>, <&pinctrl_usdhc2_gpio>;
+};