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Diffstat (limited to 'arch/arm64/boot/dts/freescale/fsl-imx8qm-apalis-v1.1.dtsi')
-rw-r--r--arch/arm64/boot/dts/freescale/fsl-imx8qm-apalis-v1.1.dtsi51
1 files changed, 33 insertions, 18 deletions
diff --git a/arch/arm64/boot/dts/freescale/fsl-imx8qm-apalis-v1.1.dtsi b/arch/arm64/boot/dts/freescale/fsl-imx8qm-apalis-v1.1.dtsi
index 491abfc92d1e..1a229255b13d 100644
--- a/arch/arm64/boot/dts/freescale/fsl-imx8qm-apalis-v1.1.dtsi
+++ b/arch/arm64/boot/dts/freescale/fsl-imx8qm-apalis-v1.1.dtsi
@@ -411,12 +411,13 @@
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_cam1_gpios>, <&pinctrl_dap1_gpios>,
<&pinctrl_esai0_gpios>, <&pinctrl_fec2_gpios>,
- <&pinctrl_gpio34>, <&pinctrl_gpio_usbh_oc_n>,
- <&pinctrl_lpuart1ctrl>, <&pinctrl_lvds0_i2c0_gpio>,
- <&pinctrl_lvds1_i2c0_gpios>, <&pinctrl_mipi_dsi_0_1_en>,
- <&pinctrl_mipi_dsi1_gpios>, <&pinctrl_mlb_gpios>,
- <&pinctrl_qspi1a_gpios>, <&pinctrl_sata1_act>,
- <&pinctrl_sim0_gpios>, <&pinctrl_usdhc1_gpios>;
+ <&pinctrl_gpio3>, <&pinctrl_gpio4>,
+ <&pinctrl_gpio_usbh_oc_n>, <&pinctrl_lpuart1ctrl>,
+ <&pinctrl_lvds0_i2c0_gpio>, <&pinctrl_lvds1_i2c0_gpios>,
+ <&pinctrl_mipi_dsi_0_1_en>, <&pinctrl_mipi_dsi1_gpios>,
+ <&pinctrl_mlb_gpios>, <&pinctrl_qspi1a_gpios>,
+ <&pinctrl_sata1_act>, <&pinctrl_sim0_gpios>,
+ <&pinctrl_usdhc1_gpios>;
apalis-imx8qm {
/* Apalis AN1_ADC */
@@ -527,43 +528,57 @@
>;
};
- /* Apalis GPIO1+2 */
- pinctrl_gpio12: gpio12grp {
+ /* Apalis GPIO1 */
+ pinctrl_gpio1: gpio1grp {
fsl,pins = <
- /* Apalis GPIO1 */
SC_P_M40_GPIO0_00_LSIO_GPIO0_IO08 0x06000021
- /* Apalis GPIO2 */
+ >;
+ };
+
+ /* Apalis GPIO2 */
+ pinctrl_gpio2: gpio2grp {
+ fsl,pins = <
SC_P_M40_GPIO0_01_LSIO_GPIO0_IO09 0x06000021
>;
};
- /* Apalis GPIO3+4 */
- pinctrl_gpio34: gpio34grp {
+ /* Apalis GPIO3 */
+ pinctrl_gpio3: gpio3grp {
fsl,pins = <
- /* Apalis GPIO3 */
SC_P_M41_GPIO0_00_LSIO_GPIO0_IO12 0x06000021
- /* Apalis GPIO4 */
+ >;
+ };
+
+ /* Apalis GPIO4 */
+ pinctrl_gpio4: gpio4grp {
+ fsl,pins = <
SC_P_M41_GPIO0_01_LSIO_GPIO0_IO13 0x06000021
>;
};
- /* Apalis GPIO5+6 */
- pinctrl_touch: touchgrp {
+ /* Apalis GPIO5 */
+ pinctrl_gpio5: gpio5grp {
fsl,pins = <
SC_P_FLEXCAN2_RX_LSIO_GPIO4_IO01 0x06000021
+ >;
+ };
+
+ /* Apalis GPIO6 */
+ pinctrl_gpio6: gpio6grp {
+ fsl,pins = <
SC_P_FLEXCAN2_TX_LSIO_GPIO4_IO02 0x06000021
>;
};
/* Apalis GPIO7 */
- pinctrl_gpio7: gpio7 {
+ pinctrl_gpio7: gpio7grp {
fsl,pins = <
SC_P_MLB_SIG_LSIO_GPIO3_IO26 0x00000021
>;
};
/* Apalis GPIO8 */
- pinctrl_gpio8: gpio8 {
+ pinctrl_gpio8: gpio8grp {
fsl,pins = <
SC_P_MLB_DATA_LSIO_GPIO3_IO28 0x00000021
>;