diff options
Diffstat (limited to 'arch/arm64/boot/dts/freescale/imx8mp-verdin.dtsi')
| -rwxr-xr-x | arch/arm64/boot/dts/freescale/imx8mp-verdin.dtsi | 176 |
1 files changed, 113 insertions, 63 deletions
diff --git a/arch/arm64/boot/dts/freescale/imx8mp-verdin.dtsi b/arch/arm64/boot/dts/freescale/imx8mp-verdin.dtsi index 43a805236e63..5c249cabda56 100755 --- a/arch/arm64/boot/dts/freescale/imx8mp-verdin.dtsi +++ b/arch/arm64/boot/dts/freescale/imx8mp-verdin.dtsi @@ -17,6 +17,20 @@ rtc1 = &snvs_rtc; }; + backlight: backlight { + compatible = "pwm-backlight"; + brightness-levels = <0 45 63 88 119 158 203 255>; + default-brightness-level = <4>; + /* Verdin MEZ_DSI_1_BKL_EN (SODIMM 21) */ + enable-gpios = <&gpio4 28 GPIO_ACTIVE_HIGH>; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_mez_dsi_1_bkl_en>; + power-supply = <®_3p3v>; + /* Verdin MEZ_PWM_3_DSI (SODIMM 19) */ + pwms = <&pwm3 0 6666667 PWM_POLARITY_INVERTED>; + status = "disabled"; + }; + gpio-keys { compatible = "gpio-keys"; pinctrl-names = "default"; @@ -60,6 +74,7 @@ off-on-delay = <500000>; pinctrl-names = "default"; pinctrl-0 = <&pinctrl_reg_eth>; + regulator-always-on; regulator-boot-on; regulator-max-microvolt = <3300000>; regulator-min-microvolt = <3300000>; @@ -126,9 +141,8 @@ "Headphone Jack", "HPOUTR", "IN2L", "Line In Jack", "IN2R", "Line In Jack", - "Microphone Jack", "MICBIAS", - "IN1L", "Microphone Jack", - "IN1R", "Microphone Jack"; + "Headphone Jack", "MICBIAS", + "IN1L", "Headphone Jack"; simple-audio-card,widgets = "Microphone", "Microphone Jack", "Headphone", "Headphone Jack", @@ -136,6 +150,7 @@ dailink_master: simple-audio-card,codec { sound-dai = <&wm8904_1a>; + clocks = <&audiomix_clk IMX8MP_CLK_AUDIOMIX_SAI1_MCLK1>; }; simple-audio-card,cpu { @@ -165,10 +180,9 @@ &eqos { phy-handle = <ðphy0>; phy-mode = "rgmii-id"; - phy-supply = <®_ethphy>; - pinctrl-names = "default", "sleep"; +// phy-supply = <®_ethphy>; + pinctrl-names = "default"; pinctrl-0 = <&pinctrl_eqos>; - pinctrl-1 = <&pinctrl_eqos_sleep>; mdio { compatible = "snps,dwmac-mdio"; @@ -177,10 +191,10 @@ ethphy0: ethernet-phy@7 { compatible = "ethernet-phy-ieee802.3-c22"; - interrupt-parent = <&gpio1>; - interrupts = <10 IRQ_TYPE_LEVEL_LOW>; - reg = <7>; +// interrupt-parent = <&gpio1>; +// interrupts = <10 IRQ_TYPE_LEVEL_LOW>; micrel,led-mode = <0>; + reg = <7>; }; }; }; @@ -189,7 +203,6 @@ fsl,magic-packet; phy-handle = <ðphy1>; phy-mode = "rgmii-id"; - phy-supply = <®_ethphy>; pinctrl-names = "default", "sleep"; pinctrl-0 = <&pinctrl_fec>; pinctrl-1 = <&pinctrl_fec_sleep>; @@ -198,12 +211,12 @@ #address-cells = <1>; #size-cells = <0>; - ethphy1: ethernet-phy@3 { + ethphy1: ethernet-phy@7 { compatible = "ethernet-phy-ieee802.3-c22"; - interrupt-parent = <&gpio4>; - interrupts = <18 IRQ_TYPE_LEVEL_LOW>; +// interrupt-parent = <&gpio4>; +// interrupts = <18 IRQ_TYPE_LEVEL_LOW>; micrel,led-mode = <0>; - reg = <3>; + reg = <7>; }; }; }; @@ -454,6 +467,14 @@ }; }; +/* Verdin I2C_2_DSI */ +&i2c2 { + clock-frequency = <10000>; + pinctrl-names = "default", "gpio"; + pinctrl-0 = <&pinctrl_i2c2>; + pinctrl-1 = <&pinctrl_i2c2_gpio>; +}; + /* Verdin I2C_4_CSI */ &i2c3 { clock-frequency = <400000>; @@ -477,7 +498,7 @@ wm8904_1a: codec@1a { compatible = "wlf,wm8904"; #sound-dai-cells = <0>; - clocks = <&clk IMX8MP_CLK_SAI2>; + clocks = <&audiomix_clk IMX8MP_CLK_AUDIOMIX_SAI1_MCLK1>; clock-names = "mclk"; reg = <0x1a>; status = "disabled"; @@ -497,6 +518,16 @@ vcc-supply = <®_3p3v>; }; + lvds_ti_sn65dsi83: bridge@2c { + compatible = "ti,sn65dsi83"; + /* Verdin MEZ_GPIO_1 (SODIMM 206) */ + enable-gpios = <&gpio1 0 GPIO_ACTIVE_HIGH>; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_mez_gpio1>; + reg = <0x2c>; + status = "disabled"; + }; + /* Current measurement into module VCC */ hwmon: hwmon@40 { compatible = "ti,ina219"; @@ -505,6 +536,33 @@ status = "disabled"; }; + hdmi_lontium_lt8912: hdmi@48 { + compatible = "lontium,lt8912"; + ddc-i2c-bus = <&i2c2>; + /* Verdin MEZ_DSI_1_INT HPD (SODIMM 17) shared with MEZ_GPIO_1 (SODIMM 206) */ + hpd-gpios = <&gpio4 25 GPIO_ACTIVE_HIGH>; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_mez_dsi_1_int_hpd>, <&pinctrl_mez_gpio1>, + <&pinctrl_mez_gpio2>; + reg = <0x48>; + /* Verdin MEZ_GPIO_2 (SODIMM 208) */ + reset-gpios = <&gpio1 1 GPIO_ACTIVE_LOW>; + status = "disabled"; + }; + + atmel_maxtouch: touch@4a { + compatible = "atmel,maxtouch"; + /* Verdin MEZ_DSI_1_INT# (SODIMM 17) */ + interrupt-parent = <&gpio4>; + interrupts = <25 IRQ_TYPE_EDGE_FALLING>; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_mez_dsi_1_int_n>, <&pinctrl_mez_gpio2>; + reg = <0x4a>; + /* Verdin MEZ_GPIO_2 (SODIMM 208) */ + reset-gpios = <&gpio1 1 GPIO_ACTIVE_HIGH>; + status = "disabled"; + }; + /* EEPROM on display adapter (MIPI DSI Display Adapter) */ eeprom_display_adapter: eeprom@50 { compatible = "st,24c02"; @@ -528,6 +586,7 @@ /* Verdin PCIE_1 */ &pcie { + bus-range = <0x00 0xff>; clocks = <&clk IMX8MP_CLK_HSIO_AXI_DIV>, <&clk IMX8MP_CLK_PCIE_AUX>, <&clk IMX8MP_CLK_PCIE_PHY>, @@ -545,6 +604,10 @@ reset-gpio = <&gpio4 19 GPIO_ACTIVE_LOW>; }; +&pcie_phy { + ext_osc = <0>; +}; + /* Verdin PWM_1 */ &pwm1 { pinctrl-names = "default"; @@ -559,6 +622,13 @@ #pwm-cells = <3>; }; +/* Verdin PWM_3_DSI */ +&pwm3 { + #pwm-cells = <3>; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_pwm_3>; +}; + /* VERDIN I2S_1 */ &sai1 { #sound-dai-cells = <0>; @@ -579,7 +649,7 @@ #sound-dai-cells = <0>; assigned-clocks = <&clk IMX8MP_CLK_SAI3>; assigned-clock-parents = <&clk IMX8MP_AUDIO_PLL1_OUT>; - assigned-clock-rates = <12288000>; + assigned-clock-rates = <24576000>; clocks = <&audiomix_clk IMX8MP_CLK_AUDIOMIX_SAI3_IPG>, <&clk IMX8MP_CLK_DUMMY>, <&audiomix_clk IMX8MP_CLK_AUDIOMIX_SAI3_MCLK1>, <&clk IMX8MP_CLK_DUMMY>, <&clk IMX8MP_CLK_DUMMY>; @@ -741,43 +811,23 @@ >; }; - pinctrl_eqos_sleep: eqossleepgrp { - fsl,pins = < - MX8MP_IOMUXC_ENET_MDC__ENET_QOS_MDC 0x3 - MX8MP_IOMUXC_ENET_MDIO__ENET_QOS_MDIO 0x3 - MX8MP_IOMUXC_ENET_RD0__ENET_QOS_RGMII_RD0 0x91 - MX8MP_IOMUXC_ENET_RD1__ENET_QOS_RGMII_RD1 0x91 - MX8MP_IOMUXC_ENET_RD2__ENET_QOS_RGMII_RD2 0x91 - MX8MP_IOMUXC_ENET_RD3__ENET_QOS_RGMII_RD3 0x91 - MX8MP_IOMUXC_ENET_RXC__CCM_ENET_QOS_CLOCK_GENERATE_RX_CLK 0x91 - MX8MP_IOMUXC_ENET_RX_CTL__ENET_QOS_RGMII_RX_CTL 0x91 - MX8MP_IOMUXC_ENET_TD0__GPIO1_IO21 0x1f - MX8MP_IOMUXC_ENET_TD1__GPIO1_IO20 0x1f - MX8MP_IOMUXC_ENET_TD2__GPIO1_IO19 0x1f - MX8MP_IOMUXC_ENET_TD3__GPIO1_IO18 0x1f - MX8MP_IOMUXC_ENET_TX_CTL__GPIO1_IO22 0x1f - MX8MP_IOMUXC_ENET_TXC__GPIO1_IO23 0x1f - MX8MP_IOMUXC_GPIO1_IO10__GPIO1_IO10 0x184 - >; - }; - /* Connection Carrier Board PHY ETH_2 */ pinctrl_fec: fecgrp { fsl,pins = < - MX8MP_IOMUXC_SAI1_RXD2__ENET1_MDC 0x3 - MX8MP_IOMUXC_SAI1_RXD3__ENET1_MDIO 0x3 - MX8MP_IOMUXC_SAI1_RXD4__ENET1_RGMII_RD0 0x91 - MX8MP_IOMUXC_SAI1_RXD5__ENET1_RGMII_RD1 0x91 - MX8MP_IOMUXC_SAI1_RXD6__ENET1_RGMII_RD2 0x91 - MX8MP_IOMUXC_SAI1_RXD7__ENET1_RGMII_RD3 0x91 - MX8MP_IOMUXC_SAI1_TXC__ENET1_RGMII_RXC 0x91 - MX8MP_IOMUXC_SAI1_TXFS__ENET1_RGMII_RX_CTL 0x91 - MX8MP_IOMUXC_SAI1_TXD0__ENET1_RGMII_TD0 0x1f - MX8MP_IOMUXC_SAI1_TXD1__ENET1_RGMII_TD1 0x1f - MX8MP_IOMUXC_SAI1_TXD2__ENET1_RGMII_TD2 0x1f - MX8MP_IOMUXC_SAI1_TXD3__ENET1_RGMII_TD3 0x1f - MX8MP_IOMUXC_SAI1_TXD4__ENET1_RGMII_TX_CTL 0x1f - MX8MP_IOMUXC_SAI1_TXD5__ENET1_RGMII_TXC 0x1f + MX8MP_IOMUXC_SAI1_RXD2__ENET1_MDC 0x3 /* SODIMM 193 */ + MX8MP_IOMUXC_SAI1_RXD3__ENET1_MDIO 0x3 /* SODIMM 191 */ + MX8MP_IOMUXC_SAI1_RXD4__ENET1_RGMII_RD0 0x91 /* SODIMM 201 */ + MX8MP_IOMUXC_SAI1_RXD5__ENET1_RGMII_RD1 0x91 /* SODIMM 203 */ + MX8MP_IOMUXC_SAI1_RXD6__ENET1_RGMII_RD2 0x91 /* SODIMM 205 */ + MX8MP_IOMUXC_SAI1_RXD7__ENET1_RGMII_RD3 0x91 /* SODIMM 207 */ + MX8MP_IOMUXC_SAI1_TXC__ENET1_RGMII_RXC 0x91 /* SODIMM 197 */ + MX8MP_IOMUXC_SAI1_TXFS__ENET1_RGMII_RX_CTL 0x91 /* SODIMM 199 */ + MX8MP_IOMUXC_SAI1_TXD0__ENET1_RGMII_TD0 0x1f /* SODIMM 221 */ + MX8MP_IOMUXC_SAI1_TXD1__ENET1_RGMII_TD1 0x1f /* SODIMM 219 */ + MX8MP_IOMUXC_SAI1_TXD2__ENET1_RGMII_TD2 0x1f /* SODIMM 217 */ + MX8MP_IOMUXC_SAI1_TXD3__ENET1_RGMII_TD3 0x1f /* SODIMM 215 */ + MX8MP_IOMUXC_SAI1_TXD4__ENET1_RGMII_TX_CTL 0x1f /* SODIMM 211 */ + MX8MP_IOMUXC_SAI1_TXD5__ENET1_RGMII_TXC 0x1f /* SODIMM 213 */ MX8MP_IOMUXC_SAI1_TXD6__GPIO4_IO18 0x1c4 /* SODIMM 189 */ >; }; @@ -1047,20 +1097,20 @@ pinctrl_sai1: sai1grp { fsl,pins = < - MX8MP_IOMUXC_SAI5_RXD1__AUDIOMIX_SAI1_TX_SYNC 0xd6 /* SODIMM 32 */ - MX8MP_IOMUXC_SAI5_MCLK__AUDIOMIX_SAI1_TX_BCLK 0xd6 /* SODIMM 30 */ - MX8MP_IOMUXC_SAI1_MCLK__AUDIOMIX_SAI1_MCLK 0xd6 /* SODIMM 38 */ - MX8MP_IOMUXC_SAI1_RXD0__AUDIOMIX_SAI1_RX_DATA00 0xd6 /* SODIMM 36 */ - MX8MP_IOMUXC_SAI5_RXFS__AUDIOMIX_SAI1_TX_DATA00 0xd6 /* SODIMM 34 */ + MX8MP_IOMUXC_SAI5_RXD1__AUDIOMIX_SAI1_TX_SYNC 0x1d6 /* SODIMM 32 */ + MX8MP_IOMUXC_SAI5_MCLK__AUDIOMIX_SAI1_TX_BCLK 0x1d6 /* SODIMM 30 */ + MX8MP_IOMUXC_SAI1_MCLK__AUDIOMIX_SAI1_MCLK 0x96 /* SODIMM 38 */ + MX8MP_IOMUXC_SAI1_RXD0__AUDIOMIX_SAI1_RX_DATA00 0x1d6 /* SODIMM 36 */ + MX8MP_IOMUXC_SAI5_RXFS__AUDIOMIX_SAI1_TX_DATA00 0x96 /* SODIMM 34 */ >; }; pinctrl_sai3: sai3grp { fsl,pins = < - MX8MP_IOMUXC_SAI3_RXD__AUDIOMIX_SAI3_RX_DATA00 0xd6 /* SODIMM 48 */ - MX8MP_IOMUXC_SAI3_TXFS__AUDIOMIX_SAI3_TX_SYNC 0xd6 /* SODIMM 44 */ - MX8MP_IOMUXC_SAI3_TXC__AUDIOMIX_SAI3_TX_BCLK 0xd6 /* SODIMM 42 */ - MX8MP_IOMUXC_SAI3_TXD__AUDIOMIX_SAI3_TX_DATA00 0xd6 /* SODIMM 46 */ + MX8MP_IOMUXC_SAI3_RXD__AUDIOMIX_SAI3_RX_DATA00 0x1d6 /* SODIMM 48 */ + MX8MP_IOMUXC_SAI3_TXFS__AUDIOMIX_SAI3_TX_SYNC 0x1d6 /* SODIMM 44 */ + MX8MP_IOMUXC_SAI3_TXC__AUDIOMIX_SAI3_TX_BCLK 0x1d6 /* SODIMM 42 */ + MX8MP_IOMUXC_SAI3_TXD__AUDIOMIX_SAI3_TX_DATA00 0x96 /* SODIMM 46 */ >; }; @@ -1249,10 +1299,10 @@ pinctrl_wifi_i2s: bti2sgrp { fsl,pins = < - MX8MP_IOMUXC_SAI5_RXD2__AUDIOMIX_SAI5_TX_BCLK 0xd6 /* WIFI_TX_BCLK */ - MX8MP_IOMUXC_SAI5_RXD0__AUDIOMIX_SAI5_RX_DATA00 0xd6 /* WIFI_TX_DATA0 */ - MX8MP_IOMUXC_SAI2_RXFS__AUDIOMIX_SAI5_TX_SYNC 0xd6 /* WIFI_TX_SYNC */ - MX8MP_IOMUXC_SAI5_RXD3__AUDIOMIX_SAI5_TX_DATA00 0xd6 /* WIFI_RX_DATA0 */ + MX8MP_IOMUXC_SAI5_RXD2__GPIO3_IO23 0x1d6 /* WIFI_TX_BCLK */ + MX8MP_IOMUXC_SAI5_RXD0__GPIO3_IO21 0x1d6 /* WIFI_TX_DATA0 */ + MX8MP_IOMUXC_SAI2_RXFS__GPIO4_IO21 0x1d6 /* WIFI_TX_SYNC */ + MX8MP_IOMUXC_SAI5_RXD3__GPIO3_IO24 0x96 /* WIFI_RX_DATA0 */ >; }; |