diff options
Diffstat (limited to 'arch/arm')
| -rw-r--r-- | arch/arm/mach-mx51/devices.c | 3 | ||||
| -rw-r--r-- | arch/arm/mach-mx51/dummy_gpio.c | 12 | ||||
| -rw-r--r-- | arch/arm/mach-mx51/mx51_ccwmx51js.c | 167 | ||||
| -rw-r--r-- | arch/arm/mach-mx51/mx51_ccwmx51js_gpio.c | 203 | ||||
| -rw-r--r-- | arch/arm/plat-mxc/dvfs_core.c | 3 |
5 files changed, 303 insertions, 85 deletions
diff --git a/arch/arm/mach-mx51/devices.c b/arch/arm/mach-mx51/devices.c index 3496580d807f..9f015d43640f 100644 --- a/arch/arm/mach-mx51/devices.c +++ b/arch/arm/mach-mx51/devices.c @@ -596,6 +596,7 @@ extern void mx51_babbage_gpio_spi_chipselect_active(int cspi_mode, int status, int chipselect); extern void mx51_babbage_gpio_spi_chipselect_inactive(int cspi_mode, int status, int chipselect); + /*! Platform Data for MXC CSPI1 */ static struct mxc_spi_master mxcspi1_data = { .maxchipselect = 4, @@ -693,7 +694,7 @@ void __init mxc_init_spi(void) /* SPBA configuration for CSPI2 - MCU is set */ spba_take_ownership(SPBA_CSPI1, SPBA_MASTER_A); #ifdef CONFIG_SPI_MXC_SELECT1 - if (machine_is_mx51_babbage()) { + if (machine_is_ccwmx51() || machine_is_mx51_babbage()) { mxcspi1_data.chipselect_active = mx51_babbage_gpio_spi_chipselect_active; mxcspi1_data.chipselect_inactive = diff --git a/arch/arm/mach-mx51/dummy_gpio.c b/arch/arm/mach-mx51/dummy_gpio.c index bf21862908ac..57bddb92cafe 100644 --- a/arch/arm/mach-mx51/dummy_gpio.c +++ b/arch/arm/mach-mx51/dummy_gpio.c @@ -23,12 +23,6 @@ EXPORT_SYMBOL(gpio_gps_inactive); void config_uartdma_event(int port) {} EXPORT_SYMBOL(config_uartdma_event); -void gpio_spi_active(int cspi_mod) {} -EXPORT_SYMBOL(gpio_spi_active); - -void gpio_spi_inactive(int cspi_mod) {} -EXPORT_SYMBOL(gpio_spi_inactive); - void gpio_owire_active(void) {} EXPORT_SYMBOL(gpio_owire_active); @@ -73,12 +67,6 @@ EXPORT_SYMBOL(gpio_ata_active); void gpio_ata_inactive(void) {} EXPORT_SYMBOL(gpio_ata_inactive); -void gpio_nand_active(void) {} -EXPORT_SYMBOL(gpio_nand_active); - -void gpio_nand_inactive(void) {} -EXPORT_SYMBOL(gpio_nand_inactive); - void gpio_keypad_active(void) {} EXPORT_SYMBOL(gpio_keypad_active); diff --git a/arch/arm/mach-mx51/mx51_ccwmx51js.c b/arch/arm/mach-mx51/mx51_ccwmx51js.c index 2d603bb3655e..f538fa0e4bfc 100644 --- a/arch/arm/mach-mx51/mx51_ccwmx51js.c +++ b/arch/arm/mach-mx51/mx51_ccwmx51js.c @@ -1,6 +1,7 @@ /* * Copyright 2009 Freescale Semiconductor, Inc. All Rights Reserved. * Copyright 2009 Digi International, Inc. All Rights Reserved. + * Copyright 2010 Timesys Corporation. All Rights Reserved. */ /* @@ -111,53 +112,6 @@ static void mxc_nop_release(struct device *dev) /* Nothing */ } -/* MTD NAND flash */ -#if defined(CONFIG_MTD_NAND_MXC) \ - || defined(CONFIG_MTD_NAND_MXC_MODULE) \ - || defined(CONFIG_MTD_NAND_MXC_V2) \ - || defined(CONFIG_MTD_NAND_MXC_V2_MODULE) \ - || defined(CONFIG_MTD_NAND_MXC_V3) \ - || defined(CONFIG_MTD_NAND_MXC_V3_MODULE) - -extern void gpio_nand_active(void); -extern void gpio_nand_inactive(void); - -static int nand_init(void) -{ - /* Configure the pins */ - gpio_nand_active(); - return 0; -} - -static void nand_exit(void) -{ - /* Free the pins */ - gpio_nand_inactive(); -} - -static struct flash_platform_data mxc_nand_data = { - .width = 1, - .init = nand_init, - .exit = nand_exit, -}; - -static struct platform_device mxc_nandv2_mtd_device = { - .name = "mxc_nandv2_flash", - .id = 0, - .dev = { - .release = mxc_nop_release, - .platform_data = &mxc_nand_data, - }, -}; - -static void ccwmx51_init_nand_mtd(void) -{ - (void)platform_device_register(&mxc_nandv2_mtd_device); -} -#else -static inline void ccwmx51_init_nand_mtd(void) { } -#endif - #if defined(CONFIG_SMSC9118) static struct resource smsc911x_device_resources[] = { [0] = { @@ -226,7 +180,7 @@ static void ccwmx51_init_ext_eth_mac(void) (void)platform_device_register(&smsc911x_device); } #else -static void ccwmx51_init_ext_eth_mac(void) { } +//static void ccwmx51_init_ext_eth_mac(void) { } #endif @@ -364,11 +318,33 @@ static inline void ccwmx51_init_mmc(void) {} #if defined(CONFIG_FB_MXC_SYNC_PANEL) || \ defined(CONFIG_FB_MXC_SYNC_PANEL_MODULE) +static struct fb_videomode wvga_video_mode = +{ + .name = "Digi LCD", + .xres = 800, + .yres = 480, + .refresh = 60, + .pixclock = 30062, + .left_margin = 64, + .right_margin = 64, + .lower_margin = 10, + .upper_margin = 30, + .hsync_len = 128, + .vsync_len = 5, + .vmode = FB_VMODE_NONINTERLACED, + .flag = FB_MODE_IS_DETAILED, +// Digi says that inverting the clock is necessary +// to avoid problems with video. +// .sync = FB_SYNC_CLK_LAT_FALL, + +}; + + static struct mxc_fb_platform_data fb_data_vga = { .interface_pix_fmt = IPU_PIX_FMT_RGB24, - .mode_str = "1024x768M-16@60", /* Default */ }; + static struct platform_device mxc_fb_device[] = { { .name = "mxc_sdc_fb", @@ -376,7 +352,7 @@ static struct platform_device mxc_fb_device[] = { .dev = { .release = mxc_nop_release, .coherent_dma_mask = 0xFFFFFFFF, - .platform_data = &fb_data_vga, + .platform_data = &fb_data_vga }, }, { .name = "mxc_sdc_fb", @@ -384,7 +360,6 @@ static struct platform_device mxc_fb_device[] = { .dev = { .release = mxc_nop_release, .coherent_dma_mask = 0xFFFFFFFF, - .platform_data = NULL, }, }, { .name = "mxc_sdc_fb", @@ -396,41 +371,64 @@ static struct platform_device mxc_fb_device[] = { }, }; +extern void gpio_lcd_active(void); + + +// We let the user specify e.g. 800x600x24, but pay attention +// only to the 800x600 part, and use 24-bit color regardless. +static int video_matches(char *user, char *template) +{ + return !strncasecmp(user, template, strlen(template)); +} + static int __init ccwmx51_init_fb(void) { char *options = NULL, *p; if (fb_get_options("displayfb", &options)) - pr_warning("no display information available in commnad line\n"); + pr_warning("no display information available in command line\n"); if (!options) return -ENODEV; if (!strncasecmp(options, "VGA", 3)) { pr_info("VGA interface is primary\n"); + + fb_data_vga.mode = 0; // Do not use LCD timings. + fb_data_vga.mode_str = "1024x768M-16@60"; /* Default */ /* Get the desired configuration provided by the bootloader */ if (options[3] != '@') { - pr_info("Video resolution for VGA interface not provided, using default\n"); - /* TODO set default video here */ + pr_info("Video resolution for VGA interface not provided, using '%s'\n", + fb_data_vga.mode_str); } else { options = &options[4]; if (((p = strsep (&options, "@")) != NULL) && *p) { - if (!strcmp(p, "640x480x16")) { - strcpy(fb_data_vga.mode_str, "640x480M-16@60"); - } else if (!strcmp(p, "800x600x16")) { - strcpy(fb_data_vga.mode_str, "800x600M-16@60"); - } else if (!strcmp(p, "1024x768x16")) { - strcpy(fb_data_vga.mode_str, "1024x768M-16@60"); - } else if (!strcmp(p, "1280x1024x16")) { - strcpy(fb_data_vga.mode_str, "1280x1024M-16@60"); - } else if (!strcmp(p, "1280x1024x16")) { - strcpy(fb_data_vga.mode_str, "1280x1024M-16@60"); + if (video_matches(p, "640x480") ){ + fb_data_vga.mode_str = "640x480M-16@60"; + } else if (video_matches(p, "800x600")) { + fb_data_vga.mode_str = "800x600M-16@60"; + } else if (video_matches(p, "1024x768")) { + fb_data_vga.mode_str = "1024x768M-16@60"; + } else if (video_matches(p, "1280x1024")) { + fb_data_vga.mode_str = "1280x1024M-16@60"; + } else if (video_matches(p, "1280x1024")) { + fb_data_vga.mode_str = "1280x1024M-16@60"; + } else if (video_matches(p, "1280x768")) { + fb_data_vga.mode_str = "1280x768M-16@60"; } else - pr_warning("Unsuported video resolution: %s, using default\n", p); + pr_warning("Unsupported video resolution: %s, using default '%s'\n", + p, fb_data_vga.mode_str); } } - (void)platform_device_register(&mxc_fb_device[0]); /* VGA */ + platform_device_register(&mxc_fb_device[0]); /* VGA */ + + } else if (!strncasecmp(options, "LCD", 3)){ + gpio_lcd_active(); + fb_data_vga.mode = &wvga_video_mode; // Use timings for Digi LCD. + fb_data_vga.mode_str = "800x480-16@60", // 16-bit color more compatible with Factory apps + pr_info("Using LDC wvga video timings and mode %s\n", fb_data_vga.mode_str); + platform_device_register(&mxc_fb_device[0]); /* LCD */ } return 0; @@ -503,19 +501,47 @@ static void mxc_power_off(void) static struct i2c_board_info ccwmx51_i2c_devices[] __initdata = { #if defined(CONFIG_INPUT_MMA7455L) + // accelerometer, unsupported at present. { I2C_BOARD_INFO("mma7455l", 0x1d), .irq = IOMUX_TO_IRQ(MX51_PIN_GPIO1_7), }, #endif + + + + }; -int __init ccwmx51_init_mma7455l(void) + +int __init ccwmx51_i2c_setup(void) { return i2c_register_board_info(1, ccwmx51_i2c_devices , ARRAY_SIZE(ccwmx51_i2c_devices) ); } +static struct mxc_audio_platform_data wm8753_data = { + .ssi_num = 1, + .src_port = 2, + .ext_port = 3, + .sysclk = 11289600, // So we can do 44.1 kHz +}; + +static struct platform_device mxc_wm8753_device = { + .name = "imx-ccwmx51js-wm8753", + .dev = { + .release = mxc_nop_release, + .platform_data = &wm8753_data, + }, +}; + + +static void mxc_init_wm8753(void) +{ + platform_device_register(&mxc_wm8753_device); +} + + /*! * Board specific initialization. */ @@ -528,10 +554,11 @@ static void __init mxc_board_init(void) mxc_init_devices(); ccwmx51_init_mmc(); - ccwmx51_init_nand_mtd(); -// ccwmx51_init_ext_eth_mac(); - ccwmx51_init_mma7455l(); + + ccwmx51_i2c_setup(); ccwmx51_init_mc13892(); + mxc_init_wm8753(); + pm_power_off = mxc_power_off; } diff --git a/arch/arm/mach-mx51/mx51_ccwmx51js_gpio.c b/arch/arm/mach-mx51/mx51_ccwmx51js_gpio.c index 3458935cd8cf..0745c89c0625 100644 --- a/arch/arm/mach-mx51/mx51_ccwmx51js_gpio.c +++ b/arch/arm/mach-mx51/mx51_ccwmx51js_gpio.c @@ -207,6 +207,12 @@ static struct mxc_iomux_pin_cfg __initdata ccwmx51_iomux_usbh1_pins[] = { #if defined(CONFIG_FB_MXC_SYNC_PANEL) || defined(CONFIG_FB_MXC_SYNC_PANEL_MODULE) static struct mxc_iomux_pin_cfg __initdata ccwmx51_iomux_video1_pins[] = { + // This pin is necessary to enable the Digi LCD panel on the P1 + // connector. + { + MX51_PIN_DI1_PIN11, IOMUX_CONFIG_ALT4, + (PAD_CTL_HYS_NONE | PAD_CTL_DRV_LOW | PAD_CTL_SRE_FAST), + }, { /* DISP1 DAT0 */ MX51_PIN_DISP1_DAT0, IOMUX_CONFIG_ALT0, (PAD_CTL_HYS_NONE | PAD_CTL_DRV_LOW | PAD_CTL_SRE_FAST), @@ -359,6 +365,32 @@ static struct mxc_iomux_pin_cfg __initdata ccwmx51_iomux_mma7455l_pins[] = { #endif //defined(CONFIG_I2C_MXC) || defined(CONFIG_I2C_MXC_MODULE) static struct mxc_iomux_pin_cfg __initdata ccwmx51_iomux_devices_pins[] = { + { + MX51_PIN_AUD3_BB_TXD, IOMUX_CONFIG_ALT0, + (PAD_CTL_SRE_FAST | PAD_CTL_DRV_HIGH | PAD_CTL_ODE_OPENDRAIN_NONE | + PAD_CTL_100K_PU | PAD_CTL_HYS_NONE | PAD_CTL_DDR_INPUT_CMOS | + PAD_CTL_DRV_VOT_LOW), + }, + { + MX51_PIN_AUD3_BB_RXD, IOMUX_CONFIG_ALT0, + (PAD_CTL_SRE_FAST | PAD_CTL_DRV_HIGH | PAD_CTL_ODE_OPENDRAIN_NONE | + PAD_CTL_100K_PU | PAD_CTL_HYS_NONE | PAD_CTL_DDR_INPUT_CMOS | + PAD_CTL_DRV_VOT_LOW), + }, + { + MX51_PIN_AUD3_BB_CK, IOMUX_CONFIG_ALT0, + (PAD_CTL_SRE_FAST | PAD_CTL_DRV_HIGH | PAD_CTL_ODE_OPENDRAIN_NONE | + PAD_CTL_100K_PU | PAD_CTL_HYS_NONE | PAD_CTL_DDR_INPUT_CMOS | + PAD_CTL_DRV_VOT_LOW), + }, + { + MX51_PIN_AUD3_BB_FS, IOMUX_CONFIG_ALT0, + (PAD_CTL_SRE_FAST | PAD_CTL_DRV_HIGH | PAD_CTL_ODE_OPENDRAIN_NONE | + PAD_CTL_100K_PU | PAD_CTL_HYS_NONE | PAD_CTL_DDR_INPUT_CMOS | + PAD_CTL_DRV_VOT_LOW), + }, + + { /* PMIC interrupt line */ MX51_PIN_GPIO1_5, IOMUX_CONFIG_GPIO | IOMUX_CONFIG_SION, (PAD_CTL_SRE_SLOW | PAD_CTL_DRV_MEDIUM | PAD_CTL_100K_PU | @@ -422,13 +454,15 @@ void __init ccwmx51_io_init(void) #if defined(CONFIG_FB_MXC_SYNC_PANEL) || defined(CONFIG_FB_MXC_SYNC_PANEL_MODULE) for (i = 0; i < ARRAY_SIZE(ccwmx51_iomux_video1_pins); i++) { mxc_request_iomux(ccwmx51_iomux_video1_pins[i].pin, - ccwmx51_iomux_video1_pins[i].mux_mode); + ccwmx51_iomux_video1_pins[i].mux_mode); if (ccwmx51_iomux_video1_pins[i].pad_cfg) mxc_iomux_set_pad(ccwmx51_iomux_video1_pins[i].pin, ccwmx51_iomux_video1_pins[i].pad_cfg); + if (ccwmx51_iomux_video1_pins[i].in_select) mxc_iomux_set_input(ccwmx51_iomux_video1_pins[i].in_select, ccwmx51_iomux_video1_pins[i].in_mode); + } #endif @@ -470,6 +504,15 @@ void __init ccwmx51_io_init(void) } +void gpio_lcd_active(void) +{ + gpio_direction_output(IOMUX_TO_GPIO(MX51_PIN_DI1_PIN11), 0); +} + + +EXPORT_SYMBOL(gpio_lcd_active); + + #if defined(CONFIG_SERIAL_MXC) || defined(CONFIG_SERIAL_MXC_MODULE) #define SERIAL_PORT_PAD (PAD_CTL_HYS_ENABLE | PAD_CTL_PKE_ENABLE | \ PAD_CTL_PUE_PULL | PAD_CTL_DRV_HIGH | \ @@ -526,3 +569,161 @@ void gpio_uart_active(int port, int no_irda) {} void gpio_uart_inactive(int port, int no_irda) {} EXPORT_SYMBOL(gpio_uart_active); EXPORT_SYMBOL(gpio_uart_inactive); + + + +/*! + * Setup GPIO for a CSPI device to be active + * + * @param cspi_mod an CSPI device + */ + +void gpio_spi_active(int cspi_mod) +{ + switch (cspi_mod) { + case 0: + /* SPI1 */ + mxc_request_iomux(MX51_PIN_CSPI1_MOSI, IOMUX_CONFIG_ALT0); + mxc_request_iomux(MX51_PIN_CSPI1_MISO, IOMUX_CONFIG_ALT0); + mxc_request_iomux(MX51_PIN_CSPI1_SCLK, IOMUX_CONFIG_ALT0); + mxc_request_iomux(MX51_PIN_CSPI1_SS0, IOMUX_CONFIG_ALT0); + + mxc_iomux_set_pad(MX51_PIN_CSPI1_MOSI, + PAD_CTL_HYS_ENABLE | + PAD_CTL_PKE_ENABLE | + PAD_CTL_DRV_HIGH | + PAD_CTL_SRE_FAST + ); + + mxc_iomux_set_pad(MX51_PIN_CSPI1_MISO, + PAD_CTL_HYS_ENABLE | + PAD_CTL_PKE_ENABLE | + PAD_CTL_DRV_HIGH | + PAD_CTL_SRE_FAST + ); + + mxc_iomux_set_pad(MX51_PIN_CSPI1_SCLK, + PAD_CTL_HYS_ENABLE | + PAD_CTL_PKE_ENABLE | + PAD_CTL_DRV_HIGH | + PAD_CTL_SRE_FAST + ); + + + mxc_iomux_set_pad(MX51_PIN_CSPI1_SS0, + PAD_CTL_SRE_FAST + ); + + break; + case 1: + /* SPI2 */ + break; + default: + break; + } +} + + +EXPORT_SYMBOL(gpio_spi_active); + +/*! + * Setup GPIO for a CSPI device to be inactive + * + * @param cspi_mod a CSPI device + */ +void gpio_spi_inactive(int cspi_mod) +{ +} + +EXPORT_SYMBOL(gpio_spi_inactive); + + +/* + * + * Investigating ecSPI issue. + * + */ + +// copied from babbage code. +/* workaround for ecspi chipselect pin may not keep correct level when idle */ +void mx51_babbage_gpio_spi_chipselect_active(int cspi_mode, int status, + int chipselect) +{ + u32 gpio; + int r = 0; + + switch (cspi_mode) { + case 1: + switch (chipselect) { + case 0x1: + r = mxc_request_iomux(MX51_PIN_CSPI1_SS0, + IOMUX_CONFIG_ALT0); + if (r){ + printk("mxc_request_iomux could not get ss0\n"); + } + mxc_iomux_set_pad(MX51_PIN_CSPI1_SS0, + PAD_CTL_HYS_ENABLE | + PAD_CTL_PKE_ENABLE | + PAD_CTL_DRV_HIGH | PAD_CTL_SRE_FAST); + + break; + case 0x2: + gpio = IOMUX_TO_GPIO(MX51_PIN_CSPI1_SS0); + r = mxc_request_iomux(MX51_PIN_CSPI1_SS0, + IOMUX_CONFIG_GPIO); + if (r){ + printk("mxc_request_iomux could not get ss0 in case 2\n"); + } + r = gpio_request(gpio, "cspi1_ss0"); + if (r){ + printk("gpio_request(cspi1_ss0) failed\n"); + } + r = gpio_direction_output(gpio, 0); + if (r){ + printk("gpio_set_direction_output(cspi1_ss0) failed\n"); + } + gpio_set_value(gpio, 1 & (~status)); + break; + default: + break; + } + break; + case 2: + break; + case 3: + break; + default: + break; + } +} +EXPORT_SYMBOL(mx51_babbage_gpio_spi_chipselect_active); + +void mx51_babbage_gpio_spi_chipselect_inactive(int cspi_mode, int status, + int chipselect) +{ + switch (cspi_mode) { + case 1: + switch (chipselect) { + case 0x1: + mxc_free_iomux(MX51_PIN_CSPI1_SS0, IOMUX_CONFIG_ALT0); + mxc_request_iomux(MX51_PIN_CSPI1_SS0, + IOMUX_CONFIG_GPIO); + mxc_free_iomux(MX51_PIN_CSPI1_SS0, IOMUX_CONFIG_GPIO); + break; + case 0x2: + mxc_free_iomux(MX51_PIN_CSPI1_SS0, IOMUX_CONFIG_GPIO); + break; + default: + break; + } + break; + case 2: + break; + case 3: + break; + default: + break; + } +} +EXPORT_SYMBOL(mx51_babbage_gpio_spi_chipselect_inactive); + diff --git a/arch/arm/plat-mxc/dvfs_core.c b/arch/arm/plat-mxc/dvfs_core.c index 169c9feab697..1c09885fde30 100644 --- a/arch/arm/plat-mxc/dvfs_core.c +++ b/arch/arm/plat-mxc/dvfs_core.c @@ -829,8 +829,9 @@ static int __devinit mxc_dvfs_core_probe(struct platform_device *pdev) old_wp = 0; curr_wp = 0; dvfs_core_resume = 0; +#if defined(CONFIG_CPU_FREQ) cpufreq_trig_needed = 0; - +#endif return err; err1: |