diff options
Diffstat (limited to 'arch/mips')
45 files changed, 92 insertions, 87 deletions
diff --git a/arch/mips/Kconfig b/arch/mips/Kconfig index 35e038a974c6..08c2ece4ae40 100644 --- a/arch/mips/Kconfig +++ b/arch/mips/Kconfig @@ -1618,6 +1618,11 @@ config GENERIC_IRQ_PROBE bool default y +config IRQ_PER_CPU + depends on SMP + bool + default y + # # - Highmem only makes sense for the 32-bit kernel. # - The current highmem code will only work properly on physically indexed diff --git a/arch/mips/au1000/common/irq.c b/arch/mips/au1000/common/irq.c index afe05ec12c27..da74ac21954b 100644 --- a/arch/mips/au1000/common/irq.c +++ b/arch/mips/au1000/common/irq.c @@ -333,31 +333,31 @@ static void setup_local_irq(unsigned int irq_nr, int type, int int_req) au_writel(1<<(irq_nr-32), IC1_CFG2CLR); au_writel(1<<(irq_nr-32), IC1_CFG1CLR); au_writel(1<<(irq_nr-32), IC1_CFG0SET); - irq_desc[irq_nr].handler = &rise_edge_irq_type; + irq_desc[irq_nr].chip = &rise_edge_irq_type; break; case INTC_INT_FALL_EDGE: /* 0:1:0 */ au_writel(1<<(irq_nr-32), IC1_CFG2CLR); au_writel(1<<(irq_nr-32), IC1_CFG1SET); au_writel(1<<(irq_nr-32), IC1_CFG0CLR); - irq_desc[irq_nr].handler = &fall_edge_irq_type; + irq_desc[irq_nr].chip = &fall_edge_irq_type; break; case INTC_INT_RISE_AND_FALL_EDGE: /* 0:1:1 */ au_writel(1<<(irq_nr-32), IC1_CFG2CLR); au_writel(1<<(irq_nr-32), IC1_CFG1SET); au_writel(1<<(irq_nr-32), IC1_CFG0SET); - irq_desc[irq_nr].handler = &either_edge_irq_type; + irq_desc[irq_nr].chip = &either_edge_irq_type; break; case INTC_INT_HIGH_LEVEL: /* 1:0:1 */ au_writel(1<<(irq_nr-32), IC1_CFG2SET); au_writel(1<<(irq_nr-32), IC1_CFG1CLR); au_writel(1<<(irq_nr-32), IC1_CFG0SET); - irq_desc[irq_nr].handler = &level_irq_type; + irq_desc[irq_nr].chip = &level_irq_type; break; case INTC_INT_LOW_LEVEL: /* 1:1:0 */ au_writel(1<<(irq_nr-32), IC1_CFG2SET); au_writel(1<<(irq_nr-32), IC1_CFG1SET); au_writel(1<<(irq_nr-32), IC1_CFG0CLR); - irq_desc[irq_nr].handler = &level_irq_type; + irq_desc[irq_nr].chip = &level_irq_type; break; case INTC_INT_DISABLED: /* 0:0:0 */ au_writel(1<<(irq_nr-32), IC1_CFG0CLR); @@ -385,31 +385,31 @@ static void setup_local_irq(unsigned int irq_nr, int type, int int_req) au_writel(1<<irq_nr, IC0_CFG2CLR); au_writel(1<<irq_nr, IC0_CFG1CLR); au_writel(1<<irq_nr, IC0_CFG0SET); - irq_desc[irq_nr].handler = &rise_edge_irq_type; + irq_desc[irq_nr].chip = &rise_edge_irq_type; break; case INTC_INT_FALL_EDGE: /* 0:1:0 */ au_writel(1<<irq_nr, IC0_CFG2CLR); au_writel(1<<irq_nr, IC0_CFG1SET); au_writel(1<<irq_nr, IC0_CFG0CLR); - irq_desc[irq_nr].handler = &fall_edge_irq_type; + irq_desc[irq_nr].chip = &fall_edge_irq_type; break; case INTC_INT_RISE_AND_FALL_EDGE: /* 0:1:1 */ au_writel(1<<irq_nr, IC0_CFG2CLR); au_writel(1<<irq_nr, IC0_CFG1SET); au_writel(1<<irq_nr, IC0_CFG0SET); - irq_desc[irq_nr].handler = &either_edge_irq_type; + irq_desc[irq_nr].chip = &either_edge_irq_type; break; case INTC_INT_HIGH_LEVEL: /* 1:0:1 */ au_writel(1<<irq_nr, IC0_CFG2SET); au_writel(1<<irq_nr, IC0_CFG1CLR); au_writel(1<<irq_nr, IC0_CFG0SET); - irq_desc[irq_nr].handler = &level_irq_type; + irq_desc[irq_nr].chip = &level_irq_type; break; case INTC_INT_LOW_LEVEL: /* 1:1:0 */ au_writel(1<<irq_nr, IC0_CFG2SET); au_writel(1<<irq_nr, IC0_CFG1SET); au_writel(1<<irq_nr, IC0_CFG0CLR); - irq_desc[irq_nr].handler = &level_irq_type; + irq_desc[irq_nr].chip = &level_irq_type; break; case INTC_INT_DISABLED: /* 0:0:0 */ au_writel(1<<irq_nr, IC0_CFG0CLR); diff --git a/arch/mips/au1000/pb1200/irqmap.c b/arch/mips/au1000/pb1200/irqmap.c index bacc0c6bfe67..5dd164fc1889 100644 --- a/arch/mips/au1000/pb1200/irqmap.c +++ b/arch/mips/au1000/pb1200/irqmap.c @@ -172,7 +172,7 @@ void _board_init_irq(void) for (irq_nr = PB1200_INT_BEGIN; irq_nr <= PB1200_INT_END; irq_nr++) { - irq_desc[irq_nr].handler = &external_irq_type; + irq_desc[irq_nr].chip = &external_irq_type; pb1200_disable_irq(irq_nr); } diff --git a/arch/mips/ddb5xxx/ddb5477/irq_5477.c b/arch/mips/ddb5xxx/ddb5477/irq_5477.c index 5fcd5f070cdc..63c3d6534b3a 100644 --- a/arch/mips/ddb5xxx/ddb5477/irq_5477.c +++ b/arch/mips/ddb5xxx/ddb5477/irq_5477.c @@ -107,7 +107,7 @@ void __init vrc5477_irq_init(u32 irq_base) irq_desc[i].status = IRQ_DISABLED; irq_desc[i].action = NULL; irq_desc[i].depth = 1; - irq_desc[i].handler = &vrc5477_irq_controller; + irq_desc[i].chip = &vrc5477_irq_controller; } vrc5477_irq_base = irq_base; diff --git a/arch/mips/dec/ioasic-irq.c b/arch/mips/dec/ioasic-irq.c index d5bca5d233b6..da2dbb42f913 100644 --- a/arch/mips/dec/ioasic-irq.c +++ b/arch/mips/dec/ioasic-irq.c @@ -144,13 +144,13 @@ void __init init_ioasic_irqs(int base) irq_desc[i].status = IRQ_DISABLED; irq_desc[i].action = 0; irq_desc[i].depth = 1; - irq_desc[i].handler = &ioasic_irq_type; + irq_desc[i].chip = &ioasic_irq_type; } for (; i < base + IO_IRQ_LINES; i++) { irq_desc[i].status = IRQ_DISABLED; irq_desc[i].action = 0; irq_desc[i].depth = 1; - irq_desc[i].handler = &ioasic_dma_irq_type; + irq_desc[i].chip = &ioasic_dma_irq_type; } ioasic_irq_base = base; diff --git a/arch/mips/dec/kn02-irq.c b/arch/mips/dec/kn02-irq.c index 898bed502a34..d44c00d9e80f 100644 --- a/arch/mips/dec/kn02-irq.c +++ b/arch/mips/dec/kn02-irq.c @@ -123,7 +123,7 @@ void __init init_kn02_irqs(int base) irq_desc[i].status = IRQ_DISABLED; irq_desc[i].action = 0; irq_desc[i].depth = 1; - irq_desc[i].handler = &kn02_irq_type; + irq_desc[i].chip = &kn02_irq_type; } kn02_irq_base = base; diff --git a/arch/mips/gt64120/ev64120/irq.c b/arch/mips/gt64120/ev64120/irq.c index 46c468b26b30..f489a8067a93 100644 --- a/arch/mips/gt64120/ev64120/irq.c +++ b/arch/mips/gt64120/ev64120/irq.c @@ -138,7 +138,7 @@ void __init arch_init_irq(void) /* Let's initialize our IRQ descriptors */ for (i = 0; i < NR_IRQS; i++) { irq_desc[i].status = 0; - irq_desc[i].handler = &no_irq_type; + irq_desc[i].chip = &no_irq_type; irq_desc[i].action = NULL; irq_desc[i].depth = 0; spin_lock_init(&irq_desc[i].lock); diff --git a/arch/mips/ite-boards/generic/irq.c b/arch/mips/ite-boards/generic/irq.c index 77be7216bdd0..a6749c56fe38 100644 --- a/arch/mips/ite-boards/generic/irq.c +++ b/arch/mips/ite-boards/generic/irq.c @@ -208,10 +208,10 @@ void __init arch_init_irq(void) #endif for (i = 0; i <= IT8172_LAST_IRQ; i++) { - irq_desc[i].handler = &it8172_irq_type; + irq_desc[i].chip = &it8172_irq_type; spin_lock_init(&irq_desc[i].lock); } - irq_desc[MIPS_CPU_TIMER_IRQ].handler = &cp0_irq_type; + irq_desc[MIPS_CPU_TIMER_IRQ].chip = &cp0_irq_type; set_c0_status(ALLINTS_NOTIMER); } diff --git a/arch/mips/jazz/irq.c b/arch/mips/jazz/irq.c index becc9accd495..478be9858a1e 100644 --- a/arch/mips/jazz/irq.c +++ b/arch/mips/jazz/irq.c @@ -73,7 +73,7 @@ void __init init_r4030_ints(void) irq_desc[i].status = IRQ_DISABLED; irq_desc[i].action = 0; irq_desc[i].depth = 1; - irq_desc[i].handler = &r4030_irq_type; + irq_desc[i].chip = &r4030_irq_type; } r4030_write_reg16(JAZZ_IO_IRQ_ENABLE, 0); diff --git a/arch/mips/jmr3927/rbhma3100/irq.c b/arch/mips/jmr3927/rbhma3100/irq.c index 11304d1354f4..380046ea1db5 100644 --- a/arch/mips/jmr3927/rbhma3100/irq.c +++ b/arch/mips/jmr3927/rbhma3100/irq.c @@ -435,7 +435,7 @@ void jmr3927_irq_init(u32 irq_base) irq_desc[i].status = IRQ_DISABLED; irq_desc[i].action = NULL; irq_desc[i].depth = 1; - irq_desc[i].handler = &jmr3927_irq_controller; + irq_desc[i].chip = &jmr3927_irq_controller; } jmr3927_irq_base = irq_base; diff --git a/arch/mips/kernel/i8259.c b/arch/mips/kernel/i8259.c index 0cb8ed5662f3..91ffb1233cad 100644 --- a/arch/mips/kernel/i8259.c +++ b/arch/mips/kernel/i8259.c @@ -120,7 +120,7 @@ int i8259A_irq_pending(unsigned int irq) void make_8259A_irq(unsigned int irq) { disable_irq_nosync(irq); - irq_desc[irq].handler = &i8259A_irq_type; + irq_desc[irq].chip = &i8259A_irq_type; enable_irq(irq); } @@ -327,7 +327,7 @@ void __init init_i8259_irqs (void) irq_desc[i].status = IRQ_DISABLED; irq_desc[i].action = NULL; irq_desc[i].depth = 1; - irq_desc[i].handler = &i8259A_irq_type; + irq_desc[i].chip = &i8259A_irq_type; } setup_irq(2, &irq2); diff --git a/arch/mips/kernel/irq-msc01.c b/arch/mips/kernel/irq-msc01.c index 97ebdc754b9e..f8cd1ac64d88 100644 --- a/arch/mips/kernel/irq-msc01.c +++ b/arch/mips/kernel/irq-msc01.c @@ -174,14 +174,14 @@ void __init init_msc_irqs(unsigned int base, msc_irqmap_t *imp, int nirq) switch (imp->im_type) { case MSC01_IRQ_EDGE: - irq_desc[base+n].handler = &msc_edgeirq_type; + irq_desc[base+n].chip = &msc_edgeirq_type; if (cpu_has_veic) MSCIC_WRITE(MSC01_IC_SUP+n*8, MSC01_IC_SUP_EDGE_BIT); else MSCIC_WRITE(MSC01_IC_SUP+n*8, MSC01_IC_SUP_EDGE_BIT | imp->im_lvl); break; case MSC01_IRQ_LEVEL: - irq_desc[base+n].handler = &msc_levelirq_type; + irq_desc[base+n].chip = &msc_levelirq_type; if (cpu_has_veic) MSCIC_WRITE(MSC01_IC_SUP+n*8, 0); else diff --git a/arch/mips/kernel/irq-mv6434x.c b/arch/mips/kernel/irq-mv6434x.c index 0613f1f36b1b..f9c763a65547 100644 --- a/arch/mips/kernel/irq-mv6434x.c +++ b/arch/mips/kernel/irq-mv6434x.c @@ -155,7 +155,7 @@ void __init mv64340_irq_init(unsigned int base) irq_desc[i].status = IRQ_DISABLED; irq_desc[i].action = 0; irq_desc[i].depth = 2; - irq_desc[i].handler = &mv64340_irq_type; + irq_desc[i].chip = &mv64340_irq_type; } irq_base = base; diff --git a/arch/mips/kernel/irq-rm7000.c b/arch/mips/kernel/irq-rm7000.c index 0b130c5ac5d9..121da385a94d 100644 --- a/arch/mips/kernel/irq-rm7000.c +++ b/arch/mips/kernel/irq-rm7000.c @@ -91,7 +91,7 @@ void __init rm7k_cpu_irq_init(int base) irq_desc[i].status = IRQ_DISABLED; irq_desc[i].action = NULL; irq_desc[i].depth = 1; - irq_desc[i].handler = &rm7k_irq_controller; + irq_desc[i].chip = &rm7k_irq_controller; } irq_base = base; diff --git a/arch/mips/kernel/irq-rm9000.c b/arch/mips/kernel/irq-rm9000.c index 9b5f20c32acb..25109c103e44 100644 --- a/arch/mips/kernel/irq-rm9000.c +++ b/arch/mips/kernel/irq-rm9000.c @@ -139,11 +139,11 @@ void __init rm9k_cpu_irq_init(int base) irq_desc[i].status = IRQ_DISABLED; irq_desc[i].action = NULL; irq_desc[i].depth = 1; - irq_desc[i].handler = &rm9k_irq_controller; + irq_desc[i].chip = &rm9k_irq_controller; } rm9000_perfcount_irq = base + 1; - irq_desc[rm9000_perfcount_irq].handler = &rm9k_perfcounter_irq; + irq_desc[rm9000_perfcount_irq].chip = &rm9k_perfcounter_irq; irq_base = base; } diff --git a/arch/mips/kernel/irq.c b/arch/mips/kernel/irq.c index 3dce742e716f..5c9dcd5eed59 100644 --- a/arch/mips/kernel/irq.c +++ b/arch/mips/kernel/irq.c @@ -95,7 +95,7 @@ int show_interrupts(struct seq_file *p, void *v) for_each_online_cpu(j) seq_printf(p, "%10u ", kstat_cpu(j).irqs[i]); #endif - seq_printf(p, " %14s", irq_desc[i].handler->typename); + seq_printf(p, " %14s", irq_desc[i].chip->typename); seq_printf(p, " %s", action->name); for (action=action->next; action; action = action->next) @@ -137,7 +137,7 @@ void __init init_IRQ(void) irq_desc[i].status = IRQ_DISABLED; irq_desc[i].action = NULL; irq_desc[i].depth = 1; - irq_desc[i].handler = &no_irq_type; + irq_desc[i].chip = &no_irq_type; spin_lock_init(&irq_desc[i].lock); #ifdef CONFIG_MIPS_MT_SMTC irq_hwmask[i] = 0; diff --git a/arch/mips/kernel/irq_cpu.c b/arch/mips/kernel/irq_cpu.c index 5db67e31ec1a..0e455a8ad860 100644 --- a/arch/mips/kernel/irq_cpu.c +++ b/arch/mips/kernel/irq_cpu.c @@ -167,14 +167,14 @@ void __init mips_cpu_irq_init(int irq_base) irq_desc[i].status = IRQ_DISABLED; irq_desc[i].action = NULL; irq_desc[i].depth = 1; - irq_desc[i].handler = &mips_mt_cpu_irq_controller; + irq_desc[i].chip = &mips_mt_cpu_irq_controller; } for (i = irq_base + 2; i < irq_base + 8; i++) { irq_desc[i].status = IRQ_DISABLED; irq_desc[i].action = NULL; irq_desc[i].depth = 1; - irq_desc[i].handler = &mips_cpu_irq_controller; + irq_desc[i].chip = &mips_cpu_irq_controller; } mips_cpu_irq_base = irq_base; diff --git a/arch/mips/kernel/smp.c b/arch/mips/kernel/smp.c index 298f82fe8440..9096a5ea4229 100644 --- a/arch/mips/kernel/smp.c +++ b/arch/mips/kernel/smp.c @@ -446,7 +446,7 @@ static int __init topology_init(void) int ret; for_each_present_cpu(cpu) { - ret = register_cpu(&per_cpu(cpu_devices, cpu), cpu, NULL); + ret = register_cpu(&per_cpu(cpu_devices, cpu), cpu); if (ret) printk(KERN_WARNING "topology_init: register_cpu %d " "failed (%d)\n", cpu, ret); diff --git a/arch/mips/kernel/smtc.c b/arch/mips/kernel/smtc.c index 2e8e52c135e6..70cf09afdf56 100644 --- a/arch/mips/kernel/smtc.c +++ b/arch/mips/kernel/smtc.c @@ -367,7 +367,7 @@ void mipsmt_prepare_cpus(void) dvpe(); dmt(); - freeIPIq.lock = SPIN_LOCK_UNLOCKED; + spin_lock_init(&freeIPIq.lock); /* * We probably don't have as many VPEs as we do SMP "CPUs", @@ -375,7 +375,7 @@ void mipsmt_prepare_cpus(void) */ for (i=0; i<NR_CPUS; i++) { IPIQ[i].head = IPIQ[i].tail = NULL; - IPIQ[i].lock = SPIN_LOCK_UNLOCKED; + spin_lock_init(&IPIQ[i].lock); IPIQ[i].depth = 0; ipi_timer_latch[i] = 0; } diff --git a/arch/mips/lasat/interrupt.c b/arch/mips/lasat/interrupt.c index 2d3472b21ebb..9316a024a818 100644 --- a/arch/mips/lasat/interrupt.c +++ b/arch/mips/lasat/interrupt.c @@ -156,6 +156,6 @@ void __init arch_init_irq(void) irq_desc[i].status = IRQ_DISABLED; irq_desc[i].action = 0; irq_desc[i].depth = 1; - irq_desc[i].handler = &lasat_irq_type; + irq_desc[i].chip = &lasat_irq_type; } } diff --git a/arch/mips/mips-boards/atlas/atlas_int.c b/arch/mips/mips-boards/atlas/atlas_int.c index db53950b7cfb..9dd6b8925581 100644 --- a/arch/mips/mips-boards/atlas/atlas_int.c +++ b/arch/mips/mips-boards/atlas/atlas_int.c @@ -215,7 +215,7 @@ void __init arch_init_irq(void) irq_desc[i].status = IRQ_DISABLED; irq_desc[i].action = 0; irq_desc[i].depth = 1; - irq_desc[i].handler = &atlas_irq_type; + irq_desc[i].chip = &atlas_irq_type; spin_lock_init(&irq_desc[i].lock); } } diff --git a/arch/mips/momentum/ocelot_c/cpci-irq.c b/arch/mips/momentum/ocelot_c/cpci-irq.c index bd885785e2f9..31d179c4673f 100644 --- a/arch/mips/momentum/ocelot_c/cpci-irq.c +++ b/arch/mips/momentum/ocelot_c/cpci-irq.c @@ -147,6 +147,6 @@ void cpci_irq_init(void) irq_desc[i].status = IRQ_DISABLED; irq_desc[i].action = 0; irq_desc[i].depth = 2; - irq_desc[i].handler = &cpci_irq_type; + irq_desc[i].chip = &cpci_irq_type; } } diff --git a/arch/mips/momentum/ocelot_c/uart-irq.c b/arch/mips/momentum/ocelot_c/uart-irq.c index 755bde5146be..852265026fd1 100644 --- a/arch/mips/momentum/ocelot_c/uart-irq.c +++ b/arch/mips/momentum/ocelot_c/uart-irq.c @@ -137,10 +137,10 @@ void uart_irq_init(void) irq_desc[80].status = IRQ_DISABLED; irq_desc[80].action = 0; irq_desc[80].depth = 2; - irq_desc[80].handler = &uart_irq_type; + irq_desc[80].chip = &uart_irq_type; irq_desc[81].status = IRQ_DISABLED; irq_desc[81].action = 0; irq_desc[81].depth = 2; - irq_desc[81].handler = &uart_irq_type; + irq_desc[81].chip = &uart_irq_type; } diff --git a/arch/mips/momentum/ocelot_g/gt-irq.c b/arch/mips/momentum/ocelot_g/gt-irq.c index e5eceed1beff..8bd9b844fa9e 100644 --- a/arch/mips/momentum/ocelot_g/gt-irq.c +++ b/arch/mips/momentum/ocelot_g/gt-irq.c @@ -59,7 +59,7 @@ void hook_irq_handler(int int_cause, int bit_num, void *isr_ptr) * bit_num - Indicates which bit number in the cause register * * Outputs : - * 1 if succesful, 0 if failure + * 1 if successful, 0 if failure */ int enable_galileo_irq(int int_cause, int bit_num) { @@ -83,7 +83,7 @@ int enable_galileo_irq(int int_cause, int bit_num) * bit_num - Indicates which bit number in the cause register * * Outputs : - * 1 if succesful, 0 if failure + * 1 if successful, 0 if failure */ int disable_galileo_irq(int int_cause, int bit_num) { diff --git a/arch/mips/oprofile/common.c b/arch/mips/oprofile/common.c index c31e4cff64e0..65eb55400d77 100644 --- a/arch/mips/oprofile/common.c +++ b/arch/mips/oprofile/common.c @@ -38,7 +38,7 @@ static int op_mips_create_files(struct super_block * sb, struct dentry * root) for (i = 0; i < model->num_counters; ++i) { struct dentry *dir; - char buf[3]; + char buf[4]; snprintf(buf, sizeof buf, "%d", i); dir = oprofilefs_mkdir(sb, root, buf); diff --git a/arch/mips/pci/pci.c b/arch/mips/pci/pci.c index 4dfce154d4af..ba66f8c9bd4e 100644 --- a/arch/mips/pci/pci.c +++ b/arch/mips/pci/pci.c @@ -51,11 +51,11 @@ unsigned long PCIBIOS_MIN_MEM = 0; */ void pcibios_align_resource(void *data, struct resource *res, - unsigned long size, unsigned long align) + resource_size_t size, resource_size_t align) { struct pci_dev *dev = data; struct pci_controller *hose = dev->sysdata; - unsigned long start = res->start; + resource_size_t start = res->start; if (res->flags & IORESOURCE_IO) { /* Make sure we start at our min on all hoses */ diff --git a/arch/mips/philips/pnx8550/common/int.c b/arch/mips/philips/pnx8550/common/int.c index 39ee6314f627..8f18764a2359 100644 --- a/arch/mips/philips/pnx8550/common/int.c +++ b/arch/mips/philips/pnx8550/common/int.c @@ -236,7 +236,7 @@ void __init arch_init_irq(void) int configPR; for (i = 0; i < PNX8550_INT_CP0_TOTINT; i++) { - irq_desc[i].handler = &level_irq_type; + irq_desc[i].chip = &level_irq_type; pnx8550_ack(i); /* mask the irq just in case */ } @@ -273,7 +273,7 @@ void __init arch_init_irq(void) /* mask/priority is still 0 so we will not get any * interrupts until it is unmasked */ - irq_desc[i].handler = &level_irq_type; + irq_desc[i].chip = &level_irq_type; } /* Priority level 0 */ @@ -282,12 +282,12 @@ void __init arch_init_irq(void) /* Set int vector table address */ PNX8550_GIC_VECTOR_0 = PNX8550_GIC_VECTOR_1 = 0; - irq_desc[MIPS_CPU_GIC_IRQ].handler = &level_irq_type; + irq_desc[MIPS_CPU_GIC_IRQ].chip = &level_irq_type; setup_irq(MIPS_CPU_GIC_IRQ, &gic_action); /* init of Timer interrupts */ for (i = PNX8550_INT_TIMER_MIN; i <= PNX8550_INT_TIMER_MAX; i++) { - irq_desc[i].handler = &level_irq_type; + irq_desc[i].chip = &level_irq_type; } /* Stop Timer 1-3 */ @@ -295,7 +295,7 @@ void __init arch_init_irq(void) configPR |= 0x00000038; write_c0_config7(configPR); - irq_desc[MIPS_CPU_TIMER_IRQ].handler = &level_irq_type; + irq_desc[MIPS_CPU_TIMER_IRQ].chip = &level_irq_type; setup_irq(MIPS_CPU_TIMER_IRQ, &timer_action); } diff --git a/arch/mips/pmc-sierra/yosemite/ht.c b/arch/mips/pmc-sierra/yosemite/ht.c index 54b65a80abf5..fb523ebcafa8 100644 --- a/arch/mips/pmc-sierra/yosemite/ht.c +++ b/arch/mips/pmc-sierra/yosemite/ht.c @@ -383,12 +383,12 @@ void pcibios_update_resource(struct pci_dev *dev, struct resource *root, void pcibios_align_resource(void *data, struct resource *res, - unsigned long size, unsigned long align) + resource_size_t size, resource_size_t align) { struct pci_dev *dev = data; if (res->flags & IORESOURCE_IO) { - unsigned long start = res->start; + resource_size_t start = res->start; /* We need to avoid collisions with `mirrored' VGA ports and other strange ISA hardware, so we always want the diff --git a/arch/mips/sgi-ip22/ip22-eisa.c b/arch/mips/sgi-ip22/ip22-eisa.c index b19820110aa3..989167b49ce9 100644 --- a/arch/mips/sgi-ip22/ip22-eisa.c +++ b/arch/mips/sgi-ip22/ip22-eisa.c @@ -279,9 +279,9 @@ int __init ip22_eisa_init(void) irq_desc[i].action = 0; irq_desc[i].depth = 1; if (i < (SGINT_EISA + 8)) - irq_desc[i].handler = &ip22_eisa1_irq_type; + irq_desc[i].chip = &ip22_eisa1_irq_type; else - irq_desc[i].handler = &ip22_eisa2_irq_type; + irq_desc[i].chip = &ip22_eisa2_irq_type; } /* Cannot use request_irq because of kmalloc not being ready at such diff --git a/arch/mips/sgi-ip22/ip22-int.c b/arch/mips/sgi-ip22/ip22-int.c index fc6a7e2b189c..18906af69691 100644 --- a/arch/mips/sgi-ip22/ip22-int.c +++ b/arch/mips/sgi-ip22/ip22-int.c @@ -436,7 +436,7 @@ void __init arch_init_irq(void) irq_desc[i].status = IRQ_DISABLED; irq_desc[i].action = 0; irq_desc[i].depth = 1; - irq_desc[i].handler = handler; + irq_desc[i].chip = handler; } /* vector handler. this register the IRQ as non-sharable */ diff --git a/arch/mips/sgi-ip22/ip22-reset.c b/arch/mips/sgi-ip22/ip22-reset.c index a9c58e067b53..8134220ed600 100644 --- a/arch/mips/sgi-ip22/ip22-reset.c +++ b/arch/mips/sgi-ip22/ip22-reset.c @@ -34,7 +34,7 @@ #define POWERDOWN_TIMEOUT 120 /* - * Blink frequency during reboot grace period and when paniced. + * Blink frequency during reboot grace period and when panicked. */ #define POWERDOWN_FREQ (HZ / 4) #define PANIC_FREQ (HZ / 8) diff --git a/arch/mips/sgi-ip27/ip27-irq.c b/arch/mips/sgi-ip27/ip27-irq.c index 0b61a39ce2bb..869566c360ae 100644 --- a/arch/mips/sgi-ip27/ip27-irq.c +++ b/arch/mips/sgi-ip27/ip27-irq.c @@ -386,7 +386,7 @@ void __devinit register_bridge_irq(unsigned int irq) irq_desc[irq].status = IRQ_DISABLED; irq_desc[irq].action = 0; irq_desc[irq].depth = 1; - irq_desc[irq].handler = &bridge_irq_type; + irq_desc[irq].chip = &bridge_irq_type; } int __devinit request_bridge_irq(struct bridge_controller *bc) diff --git a/arch/mips/sgi-ip32/ip32-irq.c b/arch/mips/sgi-ip32/ip32-irq.c index 8ba08047d164..00b94aaf6371 100644 --- a/arch/mips/sgi-ip32/ip32-irq.c +++ b/arch/mips/sgi-ip32/ip32-irq.c @@ -591,7 +591,7 @@ void __init arch_init_irq(void) irq_desc[irq].status = IRQ_DISABLED; irq_desc[irq].action = 0; irq_desc[irq].depth = 0; - irq_desc[irq].handler = controller; + irq_desc[irq].chip = controller; } setup_irq(CRIME_MEMERR_IRQ, &memerr_irq); setup_irq(CRIME_CPUERR_IRQ, &cpuerr_irq); diff --git a/arch/mips/sgi-ip32/ip32-reset.c b/arch/mips/sgi-ip32/ip32-reset.c index ab9d9cef089e..79ddb4605659 100644 --- a/arch/mips/sgi-ip32/ip32-reset.c +++ b/arch/mips/sgi-ip32/ip32-reset.c @@ -28,13 +28,13 @@ #define POWERDOWN_TIMEOUT 120 /* - * Blink frequency during reboot grace period and when paniced. + * Blink frequency during reboot grace period and when panicked. */ #define POWERDOWN_FREQ (HZ / 4) #define PANIC_FREQ (HZ / 8) static struct timer_list power_timer, blink_timer, debounce_timer; -static int has_paniced, shuting_down; +static int has_panicked, shuting_down; static void ip32_machine_restart(char *command) __attribute__((noreturn)); static void ip32_machine_halt(void) __attribute__((noreturn)); @@ -109,7 +109,7 @@ static void debounce(unsigned long data) } CMOS_WRITE(reg_a & ~DS_REGA_DV0, RTC_REG_A); - if (has_paniced) + if (has_panicked) ip32_machine_restart(NULL); enable_irq(MACEISA_RTC_IRQ); @@ -117,7 +117,7 @@ static void debounce(unsigned long data) static inline void ip32_power_button(void) { - if (has_paniced) + if (has_panicked) return; if (shuting_down || kill_proc(1, SIGINT, 1)) { @@ -161,9 +161,9 @@ static int panic_event(struct notifier_block *this, unsigned long event, { unsigned long led; - if (has_paniced) + if (has_panicked) return NOTIFY_DONE; - has_paniced = 1; + has_panicked = 1; /* turn off the green LED */ led = mace->perif.ctrl.misc | MACEISA_LED_GREEN; diff --git a/arch/mips/sibyte/bcm1480/irq.c b/arch/mips/sibyte/bcm1480/irq.c index e61760b14d99..610df40cb820 100644 --- a/arch/mips/sibyte/bcm1480/irq.c +++ b/arch/mips/sibyte/bcm1480/irq.c @@ -276,10 +276,10 @@ void __init init_bcm1480_irqs(void) irq_desc[i].action = 0; irq_desc[i].depth = 1; if (i < BCM1480_NR_IRQS) { - irq_desc[i].handler = &bcm1480_irq_type; + irq_desc[i].chip = &bcm1480_irq_type; bcm1480_irq_owner[i] = 0; } else { - irq_desc[i].handler = &no_irq_type; + irq_desc[i].chip = &no_irq_type; } } } diff --git a/arch/mips/sibyte/sb1250/irq.c b/arch/mips/sibyte/sb1250/irq.c index f853c32f60a0..fcc61940f1ff 100644 --- a/arch/mips/sibyte/sb1250/irq.c +++ b/arch/mips/sibyte/sb1250/irq.c @@ -246,10 +246,10 @@ void __init init_sb1250_irqs(void) irq_desc[i].action = 0; irq_desc[i].depth = 1; if (i < SB1250_NR_IRQS) { - irq_desc[i].handler = &sb1250_irq_type; + irq_desc[i].chip = &sb1250_irq_type; sb1250_irq_owner[i] = 0; } else { - irq_desc[i].handler = &no_irq_type; + irq_desc[i].chip = &no_irq_type; } } } diff --git a/arch/mips/sni/irq.c b/arch/mips/sni/irq.c index 7365b4853ddb..c19e158ec402 100644 --- a/arch/mips/sni/irq.c +++ b/arch/mips/sni/irq.c @@ -203,7 +203,7 @@ void __init arch_init_irq(void) irq_desc[i].status = IRQ_DISABLED; irq_desc[i].action = 0; irq_desc[i].depth = 1; - irq_desc[i].handler = &pciasic_irq_type; + irq_desc[i].chip = &pciasic_irq_type; } change_c0_status(ST0_IM, IE_IRQ1|IE_IRQ2|IE_IRQ3|IE_IRQ4); diff --git a/arch/mips/tx4927/common/tx4927_irq.c b/arch/mips/tx4927/common/tx4927_irq.c index 8ca68015cf40..a42be00483e6 100644 --- a/arch/mips/tx4927/common/tx4927_irq.c +++ b/arch/mips/tx4927/common/tx4927_irq.c @@ -227,7 +227,7 @@ static void __init tx4927_irq_cp0_init(void) irq_desc[i].status = IRQ_DISABLED; irq_desc[i].action = 0; irq_desc[i].depth = 1; - irq_desc[i].handler = &tx4927_irq_cp0_type; + irq_desc[i].chip = &tx4927_irq_cp0_type; } return; @@ -435,7 +435,7 @@ static void __init tx4927_irq_pic_init(void) irq_desc[i].status = IRQ_DISABLED; irq_desc[i].action = 0; irq_desc[i].depth = 2; - irq_desc[i].handler = &tx4927_irq_pic_type; + irq_desc[i].chip = &tx4927_irq_pic_type; } setup_irq(TX4927_IRQ_NEST_PIC_ON_CP0, &tx4927_irq_pic_action); diff --git a/arch/mips/tx4927/toshiba_rbtx4927/toshiba_rbtx4927_irq.c b/arch/mips/tx4927/toshiba_rbtx4927/toshiba_rbtx4927_irq.c index aee07ff2212a..c67978b6dae4 100644 --- a/arch/mips/tx4927/toshiba_rbtx4927/toshiba_rbtx4927_irq.c +++ b/arch/mips/tx4927/toshiba_rbtx4927/toshiba_rbtx4927_irq.c @@ -368,7 +368,7 @@ static void __init toshiba_rbtx4927_irq_ioc_init(void) irq_desc[i].status = IRQ_DISABLED; irq_desc[i].action = 0; irq_desc[i].depth = 3; - irq_desc[i].handler = &toshiba_rbtx4927_irq_ioc_type; + irq_desc[i].chip = &toshiba_rbtx4927_irq_ioc_type; } setup_irq(TOSHIBA_RBTX4927_IRQ_NEST_IOC_ON_PIC, @@ -526,7 +526,7 @@ static void __init toshiba_rbtx4927_irq_isa_init(void) irq_desc[i].action = 0; irq_desc[i].depth = ((i < TOSHIBA_RBTX4927_IRQ_ISA_MID) ? (4) : (5)); - irq_desc[i].handler = &toshiba_rbtx4927_irq_isa_type; + irq_desc[i].chip = &toshiba_rbtx4927_irq_isa_type; } setup_irq(TOSHIBA_RBTX4927_IRQ_NEST_ISA_ON_IOC, @@ -692,13 +692,13 @@ void toshiba_rbtx4927_irq_dump(char *key) { u32 i, j = 0; for (i = 0; i < NR_IRQS; i++) { - if (strcmp(irq_desc[i].handler->typename, "none") + if (strcmp(irq_desc[i].chip->typename, "none") == 0) continue; if ((i >= 1) - && (irq_desc[i - 1].handler->typename == - irq_desc[i].handler->typename)) { + && (irq_desc[i - 1].chip->typename == + irq_desc[i].chip->typename)) { j++; } else { j = 0; @@ -707,12 +707,12 @@ void toshiba_rbtx4927_irq_dump(char *key) (TOSHIBA_RBTX4927_IRQ_INFO, "%s irq=0x%02x/%3d s=0x%08x h=0x%08x a=0x%08x ah=0x%08x d=%1d n=%s/%02d\n", key, i, i, irq_desc[i].status, - (u32) irq_desc[i].handler, + (u32) irq_desc[i].chip, (u32) irq_desc[i].action, (u32) (irq_desc[i].action ? irq_desc[i]. action->handler : 0), irq_desc[i].depth, - irq_desc[i].handler->typename, j); + irq_desc[i].chip->typename, j); } } #endif diff --git a/arch/mips/tx4938/common/irq.c b/arch/mips/tx4938/common/irq.c index 873805178d8e..0b2f8c849218 100644 --- a/arch/mips/tx4938/common/irq.c +++ b/arch/mips/tx4938/common/irq.c @@ -102,7 +102,7 @@ tx4938_irq_cp0_init(void) irq_desc[i].status = IRQ_DISABLED; irq_desc[i].action = 0; irq_desc[i].depth = 1; - irq_desc[i].handler = &tx4938_irq_cp0_type; + irq_desc[i].chip = &tx4938_irq_cp0_type; } return; @@ -306,7 +306,7 @@ tx4938_irq_pic_init(void) irq_desc[i].status = IRQ_DISABLED; irq_desc[i].action = 0; irq_desc[i].depth = 2; - irq_desc[i].handler = &tx4938_irq_pic_type; + irq_desc[i].chip = &tx4938_irq_pic_type; } setup_irq(TX4938_IRQ_NEST_PIC_ON_CP0, &tx4938_irq_pic_action); diff --git a/arch/mips/tx4938/toshiba_rbtx4938/irq.c b/arch/mips/tx4938/toshiba_rbtx4938/irq.c index 9cd9c0fe2265..3b8245dc5bd3 100644 --- a/arch/mips/tx4938/toshiba_rbtx4938/irq.c +++ b/arch/mips/tx4938/toshiba_rbtx4938/irq.c @@ -146,7 +146,7 @@ toshiba_rbtx4938_irq_ioc_init(void) irq_desc[i].status = IRQ_DISABLED; irq_desc[i].action = 0; irq_desc[i].depth = 3; - irq_desc[i].handler = &toshiba_rbtx4938_irq_ioc_type; + irq_desc[i].chip = &toshiba_rbtx4938_irq_ioc_type; } setup_irq(RBTX4938_IRQ_IOCINT, diff --git a/arch/mips/vr41xx/common/icu.c b/arch/mips/vr41xx/common/icu.c index 07ae19cf0c29..b9323302cc4e 100644 --- a/arch/mips/vr41xx/common/icu.c +++ b/arch/mips/vr41xx/common/icu.c @@ -722,10 +722,10 @@ static int __init vr41xx_icu_init(void) icu2_write(MGIUINTHREG, 0xffff); for (i = SYSINT1_IRQ_BASE; i <= SYSINT1_IRQ_LAST; i++) - irq_desc[i].handler = &sysint1_irq_type; + irq_desc[i].chip = &sysint1_irq_type; for (i = SYSINT2_IRQ_BASE; i <= SYSINT2_IRQ_LAST; i++) - irq_desc[i].handler = &sysint2_irq_type; + irq_desc[i].chip = &sysint2_irq_type; cascade_irq(INT0_IRQ, icu_get_irq); cascade_irq(INT1_IRQ, icu_get_irq); diff --git a/arch/mips/vr41xx/common/irq.c b/arch/mips/vr41xx/common/irq.c index 86796bb63c3c..66aa50802deb 100644 --- a/arch/mips/vr41xx/common/irq.c +++ b/arch/mips/vr41xx/common/irq.c @@ -73,13 +73,13 @@ static void irq_dispatch(unsigned int irq, struct pt_regs *regs) if (cascade->get_irq != NULL) { unsigned int source_irq = irq; desc = irq_desc + source_irq; - desc->handler->ack(source_irq); + desc->chip->ack(source_irq); irq = cascade->get_irq(irq, regs); if (irq < 0) atomic_inc(&irq_err_count); else irq_dispatch(irq, regs); - desc->handler->end(source_irq); + desc->chip->end(source_irq); } else do_IRQ(irq, regs); } diff --git a/arch/mips/vr41xx/common/vrc4173.c b/arch/mips/vr41xx/common/vrc4173.c index 3e31f8193d21..2d287b8893d9 100644 --- a/arch/mips/vr41xx/common/vrc4173.c +++ b/arch/mips/vr41xx/common/vrc4173.c @@ -483,7 +483,7 @@ static inline int vrc4173_icu_init(int cascade_irq) vr41xx_set_irq_level(GIU_IRQ_TO_PIN(cascade_irq), LEVEL_LOW); for (i = VRC4173_IRQ_BASE; i <= VRC4173_IRQ_LAST; i++) - irq_desc[i].handler = &vrc4173_irq_type; + irq_desc[i].chip = &vrc4173_irq_type; return 0; } diff --git a/arch/mips/vr41xx/nec-cmbvr4133/irq.c b/arch/mips/vr41xx/nec-cmbvr4133/irq.c index 31db6b61a39e..7b2511ca0a61 100644 --- a/arch/mips/vr41xx/nec-cmbvr4133/irq.c +++ b/arch/mips/vr41xx/nec-cmbvr4133/irq.c @@ -104,7 +104,7 @@ void __init rockhopper_init_irq(void) } for (i = I8259_IRQ_BASE; i <= I8259_IRQ_LAST; i++) - irq_desc[i].handler = &i8259_irq_type; + irq_desc[i].chip = &i8259_irq_type; setup_irq(I8259_SLAVE_IRQ, &i8259_slave_cascade); |