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-rw-r--r--arch/arm/include/asm/cp15.h1
-rw-r--r--arch/arm/mm/fault.c4
2 files changed, 5 insertions, 0 deletions
diff --git a/arch/arm/include/asm/cp15.h b/arch/arm/include/asm/cp15.h
index 43eddecc837d..d820fc5f043a 100644
--- a/arch/arm/include/asm/cp15.h
+++ b/arch/arm/include/asm/cp15.h
@@ -66,6 +66,7 @@
#define BPIALL __ACCESS_CP15(c7, 0, c5, 6)
+#define ICIALLU __ACCESS_CP15(c7, 0, c5, 0)
extern unsigned long cr_no_alignment; /* defined in entry-armv.S */
extern unsigned long cr_alignment; /* defined in entry-armv.S */
diff --git a/arch/arm/mm/fault.c b/arch/arm/mm/fault.c
index f18f94006fea..e8f42821a206 100644
--- a/arch/arm/mm/fault.c
+++ b/arch/arm/mm/fault.c
@@ -26,6 +26,7 @@
#include <asm/system_misc.h>
#include <asm/system_info.h>
#include <asm/tlbflush.h>
+#include <asm/cputype.h>
#include "fault.h"
@@ -401,6 +402,9 @@ do_pabt_page_fault(unsigned long addr, unsigned int fsr, struct pt_regs *regs)
#ifdef CONFIG_HARDEN_BRANCH_PREDICTOR
if (addr > TASK_SIZE) {
switch (read_cpuid_part_number()) {
+ case ARM_CPU_PART_CORTEX_A15:
+ write_sysreg(0, ICIALLU);
+ break;
}
}
#endif