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-rw-r--r--arch/arm/configs/tegra3_defconfig2
-rw-r--r--arch/arm/configs/tegra_defconfig1
-rw-r--r--arch/arm/mach-tegra/board-cardhu-memory.c68
-rw-r--r--arch/arm/mach-tegra/board-cardhu-powermon.c4
-rw-r--r--arch/arm/mach-tegra/board-cardhu-sensors.c161
-rw-r--r--arch/arm/mach-tegra/board-cardhu.c10
-rw-r--r--arch/arm/mach-tegra/board-ventana-panel.c19
-rw-r--r--arch/arm/mach-tegra/tegra3_speedo.c13
8 files changed, 208 insertions, 70 deletions
diff --git a/arch/arm/configs/tegra3_defconfig b/arch/arm/configs/tegra3_defconfig
index d8ba44fc373e..9f212bbad50b 100644
--- a/arch/arm/configs/tegra3_defconfig
+++ b/arch/arm/configs/tegra3_defconfig
@@ -226,6 +226,7 @@ CONFIG_DM_UEVENT=y
CONFIG_NETDEVICES=y
CONFIG_DUMMY=y
CONFIG_R8169=y
+# CONFIG_R8169_FW_LOAD is not set
# CONFIG_NETDEV_10000 is not set
CONFIG_BCM4329=m
CONFIG_BCM4329_FIRST_SCAN=y
@@ -467,3 +468,4 @@ CONFIG_CRYPTO_SHA256=y
CONFIG_CRYPTO_TWOFISH=y
# CONFIG_CRYPTO_ANSI_CPRNG is not set
CONFIG_CRYPTO_DEV_TEGRA_SE=y
+# CONFIG_INPUT_MOUSEDEV is not set
diff --git a/arch/arm/configs/tegra_defconfig b/arch/arm/configs/tegra_defconfig
index e7b72881f054..6878abd433f6 100644
--- a/arch/arm/configs/tegra_defconfig
+++ b/arch/arm/configs/tegra_defconfig
@@ -399,3 +399,4 @@ CONFIG_CRYPTO_SHA256=y
CONFIG_CRYPTO_TWOFISH=y
# CONFIG_CRYPTO_ANSI_CPRNG is not set
CONFIG_CRYPTO_DEV_TEGRA_AES=y
+# CONFIG_INPUT_MOUSEDEV is not set
diff --git a/arch/arm/mach-tegra/board-cardhu-memory.c b/arch/arm/mach-tegra/board-cardhu-memory.c
index 1ea30fe74a6d..535f9ef75b5a 100644
--- a/arch/arm/mach-tegra/board-cardhu-memory.c
+++ b/arch/arm/mach-tegra/board-cardhu-memory.c
@@ -1,5 +1,5 @@
/*
- * Copyright (C) 2011-2012 NVIDIA Corporation. All rights reserved.
+ * Copyright (c) 2011-2013, NVIDIA CORPORATION. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 as
@@ -30,12 +30,12 @@ static const struct tegra_emc_table cardhu_emc_tables_h5tc4g83mfr[] = {
51000, /* SDRAM frequency */
{
0x00000002, /* EMC_RC */
- 0x0000000d, /* EMC_RFC */
+ 0x0000000f, /* EMC_RFC */
0x00000001, /* EMC_RAS */
0x00000000, /* EMC_RP */
0x00000002, /* EMC_R2W */
0x0000000a, /* EMC_W2R */
- 0x00000003, /* EMC_R2P */
+ 0x00000005, /* EMC_R2P */
0x0000000b, /* EMC_W2P */
0x00000000, /* EMC_RD_RCD */
0x00000000, /* EMC_WR_RCD */
@@ -56,8 +56,8 @@ static const struct tegra_emc_table cardhu_emc_tables_h5tc4g83mfr[] = {
0x00000000, /* EMC_ACT2PDEN */
0x00000007, /* EMC_AR2PDEN */
0x0000000f, /* EMC_RW2PDEN */
- 0x0000000e, /* EMC_TXSR */
- 0x0000000e, /* EMC_TXSRDLL */
+ 0x00000010, /* EMC_TXSR */
+ 0x00000010, /* EMC_TXSRDLL */
0x00000004, /* EMC_TCKE */
0x00000002, /* EMC_TFAW */
0x00000000, /* EMC_TRPAB */
@@ -117,22 +117,22 @@ static const struct tegra_emc_table cardhu_emc_tables_h5tc4g83mfr[] = {
0x00000000, /* EMC_CTT_DURATION */
0x8000040b, /* EMC_DYN_SELF_REF_CONTROL */
0x00010003, /* MC_EMEM_ARB_CFG */
- 0xc000000a, /* MC_EMEM_ARB_OUTSTANDING_REQ */
+ 0xc0000010, /* MC_EMEM_ARB_OUTSTANDING_REQ */
0x00000001, /* MC_EMEM_ARB_TIMING_RCD */
0x00000001, /* MC_EMEM_ARB_TIMING_RP */
0x00000002, /* MC_EMEM_ARB_TIMING_RC */
0x00000000, /* MC_EMEM_ARB_TIMING_RAS */
0x00000001, /* MC_EMEM_ARB_TIMING_FAW */
0x00000001, /* MC_EMEM_ARB_TIMING_RRD */
- 0x00000002, /* MC_EMEM_ARB_TIMING_RAP2PRE */
+ 0x00000003, /* MC_EMEM_ARB_TIMING_RAP2PRE */
0x00000008, /* MC_EMEM_ARB_TIMING_WAP2PRE */
0x00000002, /* MC_EMEM_ARB_TIMING_R2R */
0x00000001, /* MC_EMEM_ARB_TIMING_W2W */
0x00000002, /* MC_EMEM_ARB_TIMING_R2W */
0x00000006, /* MC_EMEM_ARB_TIMING_W2R */
0x06020102, /* MC_EMEM_ARB_DA_TURNS */
- 0x000a0402, /* MC_EMEM_ARB_DA_COVERS */
- 0x74630303, /* MC_EMEM_ARB_MISC0 */
+ 0x000a0502, /* MC_EMEM_ARB_DA_COVERS */
+ 0x74e30303, /* MC_EMEM_ARB_MISC0 */
0x001f0000, /* MC_EMEM_ARB_RING1_THROTTLE */
0xe8000000, /* EMC_FBIO_SPARE */
0xff00ff00, /* EMC_CFG_RSV */
@@ -150,12 +150,12 @@ static const struct tegra_emc_table cardhu_emc_tables_h5tc4g83mfr[] = {
102000, /* SDRAM frequency */
{
0x00000004, /* EMC_RC */
- 0x0000001a, /* EMC_RFC */
+ 0x0000001e, /* EMC_RFC */
0x00000003, /* EMC_RAS */
0x00000001, /* EMC_RP */
0x00000002, /* EMC_R2W */
0x0000000a, /* EMC_W2R */
- 0x00000003, /* EMC_R2P */
+ 0x00000005, /* EMC_R2P */
0x0000000b, /* EMC_W2P */
0x00000001, /* EMC_RD_RCD */
0x00000001, /* EMC_WR_RCD */
@@ -176,8 +176,8 @@ static const struct tegra_emc_table cardhu_emc_tables_h5tc4g83mfr[] = {
0x00000000, /* EMC_ACT2PDEN */
0x00000007, /* EMC_AR2PDEN */
0x0000000f, /* EMC_RW2PDEN */
- 0x0000001c, /* EMC_TXSR */
- 0x0000001c, /* EMC_TXSRDLL */
+ 0x00000020, /* EMC_TXSR */
+ 0x00000020, /* EMC_TXSRDLL */
0x00000004, /* EMC_TCKE */
0x00000004, /* EMC_TFAW */
0x00000000, /* EMC_TRPAB */
@@ -236,23 +236,23 @@ static const struct tegra_emc_table cardhu_emc_tables_h5tc4g83mfr[] = {
0x00000000, /* EMC_CTT */
0x00000000, /* EMC_CTT_DURATION */
0x80000713, /* EMC_DYN_SELF_REF_CONTROL */
- 0x00000001, /* MC_EMEM_ARB_CFG */
- 0xc0000013, /* MC_EMEM_ARB_OUTSTANDING_REQ */
+ 0x00000003, /* MC_EMEM_ARB_CFG */
+ 0xc0000018, /* MC_EMEM_ARB_OUTSTANDING_REQ */
0x00000001, /* MC_EMEM_ARB_TIMING_RCD */
0x00000001, /* MC_EMEM_ARB_TIMING_RP */
0x00000003, /* MC_EMEM_ARB_TIMING_RC */
0x00000000, /* MC_EMEM_ARB_TIMING_RAS */
0x00000001, /* MC_EMEM_ARB_TIMING_FAW */
0x00000001, /* MC_EMEM_ARB_TIMING_RRD */
- 0x00000002, /* MC_EMEM_ARB_TIMING_RAP2PRE */
+ 0x00000003, /* MC_EMEM_ARB_TIMING_RAP2PRE */
0x00000008, /* MC_EMEM_ARB_TIMING_WAP2PRE */
0x00000002, /* MC_EMEM_ARB_TIMING_R2R */
0x00000001, /* MC_EMEM_ARB_TIMING_W2W */
0x00000002, /* MC_EMEM_ARB_TIMING_R2W */
0x00000006, /* MC_EMEM_ARB_TIMING_W2R */
0x06020102, /* MC_EMEM_ARB_DA_TURNS */
- 0x000a0403, /* MC_EMEM_ARB_DA_COVERS */
- 0x73c30504, /* MC_EMEM_ARB_MISC0 */
+ 0x000a0503, /* MC_EMEM_ARB_DA_COVERS */
+ 0x74430504, /* MC_EMEM_ARB_MISC0 */
0x001f0000, /* MC_EMEM_ARB_RING1_THROTTLE */
0xe8000000, /* EMC_FBIO_SPARE */
0xff00ff00, /* EMC_CFG_RSV */
@@ -270,12 +270,12 @@ static const struct tegra_emc_table cardhu_emc_tables_h5tc4g83mfr[] = {
204000, /* SDRAM frequency */
{
0x00000009, /* EMC_RC */
- 0x00000035, /* EMC_RFC */
+ 0x0000003d, /* EMC_RFC */
0x00000007, /* EMC_RAS */
0x00000002, /* EMC_RP */
0x00000002, /* EMC_R2W */
0x0000000a, /* EMC_W2R */
- 0x00000003, /* EMC_R2P */
+ 0x00000005, /* EMC_R2P */
0x0000000b, /* EMC_W2P */
0x00000002, /* EMC_RD_RCD */
0x00000002, /* EMC_WR_RCD */
@@ -296,8 +296,8 @@ static const struct tegra_emc_table cardhu_emc_tables_h5tc4g83mfr[] = {
0x00000000, /* EMC_ACT2PDEN */
0x00000007, /* EMC_AR2PDEN */
0x0000000f, /* EMC_RW2PDEN */
- 0x00000038, /* EMC_TXSR */
- 0x00000038, /* EMC_TXSRDLL */
+ 0x00000040, /* EMC_TXSR */
+ 0x00000040, /* EMC_TXSRDLL */
0x00000004, /* EMC_TCKE */
0x00000007, /* EMC_TFAW */
0x00000000, /* EMC_TRPAB */
@@ -356,7 +356,7 @@ static const struct tegra_emc_table cardhu_emc_tables_h5tc4g83mfr[] = {
0x00000000, /* EMC_CTT */
0x00000000, /* EMC_CTT_DURATION */
0x80000d22, /* EMC_DYN_SELF_REF_CONTROL */
- 0x00000003, /* MC_EMEM_ARB_CFG */
+ 0x00000006, /* MC_EMEM_ARB_CFG */
0xc0000025, /* MC_EMEM_ARB_OUTSTANDING_REQ */
0x00000001, /* MC_EMEM_ARB_TIMING_RCD */
0x00000001, /* MC_EMEM_ARB_TIMING_RP */
@@ -364,15 +364,15 @@ static const struct tegra_emc_table cardhu_emc_tables_h5tc4g83mfr[] = {
0x00000002, /* MC_EMEM_ARB_TIMING_RAS */
0x00000003, /* MC_EMEM_ARB_TIMING_FAW */
0x00000001, /* MC_EMEM_ARB_TIMING_RRD */
- 0x00000002, /* MC_EMEM_ARB_TIMING_RAP2PRE */
+ 0x00000003, /* MC_EMEM_ARB_TIMING_RAP2PRE */
0x00000008, /* MC_EMEM_ARB_TIMING_WAP2PRE */
0x00000002, /* MC_EMEM_ARB_TIMING_R2R */
0x00000001, /* MC_EMEM_ARB_TIMING_W2W */
0x00000002, /* MC_EMEM_ARB_TIMING_R2W */
0x00000006, /* MC_EMEM_ARB_TIMING_W2R */
0x06020102, /* MC_EMEM_ARB_DA_TURNS */
- 0x000a0405, /* MC_EMEM_ARB_DA_COVERS */
- 0x73840a06, /* MC_EMEM_ARB_MISC0 */
+ 0x000a0505, /* MC_EMEM_ARB_DA_COVERS */
+ 0x74040a06, /* MC_EMEM_ARB_MISC0 */
0x001f0000, /* MC_EMEM_ARB_RING1_THROTTLE */
0xe8000000, /* EMC_FBIO_SPARE */
0xff00ff00, /* EMC_CFG_RSV */
@@ -390,7 +390,7 @@ static const struct tegra_emc_table cardhu_emc_tables_h5tc4g83mfr[] = {
400000, /* SDRAM frequency */
{
0x00000012, /* EMC_RC */
- 0x00000066, /* EMC_RFC */
+ 0x00000076, /* EMC_RFC */
0x0000000c, /* EMC_RAS */
0x00000004, /* EMC_RP */
0x00000003, /* EMC_R2W */
@@ -416,7 +416,7 @@ static const struct tegra_emc_table cardhu_emc_tables_h5tc4g83mfr[] = {
0x00000000, /* EMC_ACT2PDEN */
0x00000008, /* EMC_AR2PDEN */
0x0000000f, /* EMC_RW2PDEN */
- 0x0000006c, /* EMC_TXSR */
+ 0x0000007c, /* EMC_TXSR */
0x00000200, /* EMC_TXSRDLL */
0x00000004, /* EMC_TCKE */
0x0000000c, /* EMC_TFAW */
@@ -471,13 +471,13 @@ static const struct tegra_emc_table cardhu_emc_tables_h5tc4g83mfr[] = {
0x00000802, /* EMC_CTT_TERM_CTRL */
0x00020000, /* EMC_ZCAL_INTERVAL */
0x00000100, /* EMC_ZCAL_WAIT_CNT */
- 0x0158000c, /* EMC_MRS_WAIT_CNT */
+ 0x0148000c, /* EMC_MRS_WAIT_CNT */
0xa0f10000, /* EMC_AUTO_CAL_CONFIG */
0x00000000, /* EMC_CTT */
0x00000000, /* EMC_CTT_DURATION */
0x800018c8, /* EMC_DYN_SELF_REF_CONTROL */
- 0x00000006, /* MC_EMEM_ARB_CFG */
- 0x80000048, /* MC_EMEM_ARB_OUTSTANDING_REQ */
+ 0x0000000c, /* MC_EMEM_ARB_CFG */
+ 0xc0000048, /* MC_EMEM_ARB_OUTSTANDING_REQ */
0x00000001, /* MC_EMEM_ARB_TIMING_RCD */
0x00000002, /* MC_EMEM_ARB_TIMING_RP */
0x00000009, /* MC_EMEM_ARB_TIMING_RC */
@@ -596,8 +596,8 @@ static const struct tegra_emc_table cardhu_emc_tables_h5tc4g83mfr[] = {
0x00000000, /* EMC_CTT */
0x00000000, /* EMC_CTT_DURATION */
0x8000308c, /* EMC_DYN_SELF_REF_CONTROL */
- 0x0000000c, /* MC_EMEM_ARB_CFG */
- 0x80000090, /* MC_EMEM_ARB_OUTSTANDING_REQ */
+ 0x00000018, /* MC_EMEM_ARB_CFG */
+ 0xc0000090, /* MC_EMEM_ARB_OUTSTANDING_REQ */
0x00000004, /* MC_EMEM_ARB_TIMING_RCD */
0x00000005, /* MC_EMEM_ARB_TIMING_RP */
0x00000013, /* MC_EMEM_ARB_TIMING_RC */
@@ -624,7 +624,7 @@ static const struct tegra_emc_table cardhu_emc_tables_h5tc4g83mfr[] = {
0x80100002, /* Mode Register 1 */
0x80200018, /* Mode Register 2 */
0x00000000, /* EMC_CFG.DYN_SELF_REF */
- }
+ },
};
static const struct tegra_emc_table cardhu_emc_tables_h5tc2g[] = {
diff --git a/arch/arm/mach-tegra/board-cardhu-powermon.c b/arch/arm/mach-tegra/board-cardhu-powermon.c
index 823cddbabeb3..bffd51b1ea84 100644
--- a/arch/arm/mach-tegra/board-cardhu-powermon.c
+++ b/arch/arm/mach-tegra/board-cardhu-powermon.c
@@ -1,7 +1,7 @@
/*
* arch/arm/mach-tegra/board-cardhu-powermon.c
*
- * Copyright (c) 2011, NVIDIA, All Rights Reserved.
+ * Copyright (c) 2011-2013, NVIDIA, All Rights Reserved.
*
* This program is free software: you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
@@ -249,7 +249,7 @@ int __init cardhu_pmon_init(void)
&power_mon_info[VDD_CORE_IN];
}
- if (bi.board_id != BOARD_PM269) {
+ if (bi.board_id != BOARD_PM269 && bi.board_id != BOARD_PM315) {
i2c_register_board_info(0, cardhu_i2c0_ina219_board_info,
ARRAY_SIZE(cardhu_i2c0_ina219_board_info));
}
diff --git a/arch/arm/mach-tegra/board-cardhu-sensors.c b/arch/arm/mach-tegra/board-cardhu-sensors.c
index 08ad0d5fb0fc..af66e1f571c6 100644
--- a/arch/arm/mach-tegra/board-cardhu-sensors.c
+++ b/arch/arm/mach-tegra/board-cardhu-sensors.c
@@ -1,7 +1,7 @@
/*
* arch/arm/mach-tegra/board-cardhu-sensors.c
*
- * Copyright (c) 2010-2012, NVIDIA CORPORATION, All rights reserved.
+ * Copyright (c) 2010-2013, NVIDIA CORPORATION, All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions are
@@ -37,6 +37,8 @@
#include <linux/i2c/pca954x.h>
#include <linux/i2c/pca953x.h>
#include <linux/nct1008.h>
+#include <linux/module.h>
+
#include <mach/fb.h>
#include <mach/gpio.h>
#include <media/ov5650.h>
@@ -44,6 +46,8 @@
#include <media/ov14810.h>
#include <media/ov2710.h>
#include <media/tps61050.h>
+#include <media/soc_camera.h>
+#include <media/tegra_v4l2_camera.h>
#include <generated/mach-types.h>
#include "gpio-names.h"
#include "board.h"
@@ -60,12 +64,17 @@
#include "board-cardhu.h"
#include "cpu-tegra.h"
-static struct regulator *cardhu_1v8_cam1 = NULL;
-static struct regulator *cardhu_1v8_cam2 = NULL;
-static struct regulator *cardhu_1v8_cam3 = NULL;
-static struct regulator *cardhu_vdd_2v8_cam1 = NULL;
-static struct regulator *cardhu_vdd_2v8_cam2 = NULL;
-static struct regulator *cardhu_vdd_cam3 = NULL;
+#if defined(CONFIG_VIDEO_OV5650) || \
+ defined(CONFIG_VIDEO_OV5650_MODULE) || \
+ defined(CONFIG_SOC_CAMERA_OV5650) || \
+ defined(CONFIG_SOC_CAMERA_OV5650_MODULE)
+static struct regulator *cardhu_1v8_cam1;
+static struct regulator *cardhu_vdd_2v8_cam1;
+#endif
+static struct regulator *cardhu_1v8_cam2;
+static struct regulator *cardhu_1v8_cam3;
+static struct regulator *cardhu_vdd_2v8_cam2;
+static struct regulator *cardhu_vdd_cam3;
static struct board_info board_info;
@@ -81,6 +90,97 @@ static struct pca954x_platform_data cardhu_pca954x_data = {
.num_modes = ARRAY_SIZE(cardhu_pca954x_modes),
};
+#if defined(CONFIG_SOC_CAMERA_OV5640) \
+ || defined(CONFIG_SOC_CAMERA_OV5640_MODULE)
+static int cardhu_ov5640_power_on(void);
+static int cardhu_ov5640_power_off(void);
+
+static int cardhu_ov5640_power(struct device *dev, int enable)
+{
+ if (enable)
+ return cardhu_ov5640_power_on();
+ else
+ cardhu_ov5640_power_off();
+
+ return 0;
+}
+
+static struct i2c_board_info cardhu_ov5640_camera_i2c_device = {
+ I2C_BOARD_INFO("ov5640", 0x3C),
+};
+
+static struct tegra_camera_platform_data cardhu_ov5640_camera_platform_data = {
+ .flip_v = 0,
+ .flip_h = 0,
+ .port = TEGRA_CAMERA_PORT_CSI_B,
+ .lanes = 2,
+ .continuous_clk = 0,
+};
+
+static struct soc_camera_link ov5640_iclink = {
+ .bus_id = -1, /* This must match the .id of tegra_vi01_device */
+ .board_info = &cardhu_ov5640_camera_i2c_device,
+ .module_name = "ov5640",
+ .i2c_adapter_id = PCA954x_I2C_BUS2,
+ .power = cardhu_ov5640_power,
+ .priv = &cardhu_ov5640_camera_platform_data,
+};
+
+static struct platform_device cardhu_ov5640_soc_camera_device = {
+ .name = "soc-camera-pdrv",
+ .id = 1,
+ .dev = {
+ .platform_data = &ov5640_iclink,
+ },
+};
+#endif
+
+/* OV5650 V4L2 device */
+#if defined(CONFIG_SOC_CAMERA_OV5650) \
+ || defined(CONFIG_SOC_CAMERA_OV5650_MODULE)
+static int cardhu_left_ov5650_power_on(void);
+static int cardhu_left_ov5650_power_off(void);
+
+static int cardhu_ov5650_power(struct device *dev, int enable)
+{
+ if (enable)
+ return cardhu_left_ov5650_power_on();
+ else
+ cardhu_left_ov5650_power_off();
+
+ return 0;
+}
+
+static struct i2c_board_info cardhu_ov5650_camera_i2c_device = {
+ I2C_BOARD_INFO("ov5650", 0x36),
+};
+
+static struct tegra_camera_platform_data cardhu_ov5650_camera_platform_data = {
+ .flip_v = 0,
+ .flip_h = 0,
+ .port = TEGRA_CAMERA_PORT_CSI_A,
+ .lanes = 2,
+ .continuous_clk = 1,
+};
+
+static struct soc_camera_link ov5650_iclink = {
+ .bus_id = -1, /* This must match the .id of tegra_vi01_device */
+ .board_info = &cardhu_ov5650_camera_i2c_device,
+ .module_name = "ov5650",
+ .i2c_adapter_id = PCA954x_I2C_BUS0,
+ .power = cardhu_ov5650_power,
+ .priv = &cardhu_ov5650_camera_platform_data,
+};
+
+static struct platform_device cardhu_ov5650_soc_camera_device = {
+ .name = "soc-camera-pdrv",
+ .id = 0,
+ .dev = {
+ .platform_data = &ov5650_iclink,
+ },
+};
+#endif
+
static int cardhu_camera_init(void)
{
int ret;
@@ -133,6 +233,10 @@ static int cardhu_camera_init(void)
return 0;
}
+#if defined(CONFIG_VIDEO_OV5650) || \
+ defined(CONFIG_VIDEO_OV5650_MODULE) || \
+ defined(CONFIG_SOC_CAMERA_OV5650) || \
+ defined(CONFIG_SOC_CAMERA_OV5650_MODULE)
static int cardhu_left_ov5650_power_on(void)
{
/* Boards E1198 and E1291 are of Cardhu personality
@@ -215,11 +319,14 @@ static int cardhu_left_ov5650_power_off(void)
return 0;
}
+#endif
+#if defined(CONFIG_VIDEO_OV5650) || defined(CONFIG_VIDEO_OV5650_MODULE)
struct ov5650_platform_data cardhu_left_ov5650_data = {
.power_on = cardhu_left_ov5650_power_on,
.power_off = cardhu_left_ov5650_power_off,
};
+#endif
#ifdef CONFIG_VIDEO_OV14810
static int cardhu_ov14810_power_on(void)
@@ -484,7 +591,6 @@ static int cardhu_ov5640_power_on(void)
(board_info.board_id == BOARD_E1291) ||
(board_info.board_id == BOARD_PM315)) {
- gpio_direction_output(CAM1_POWER_DWN_GPIO, 0);
gpio_direction_output(CAM2_POWER_DWN_GPIO, 0);
gpio_direction_output(CAM3_POWER_DWN_GPIO, 0);
mdelay(10);
@@ -537,7 +643,6 @@ static int cardhu_ov5640_power_off(void)
if ((board_info.board_id == BOARD_E1198) ||
(board_info.board_id == BOARD_E1291) ||
(board_info.board_id == BOARD_PM315)) {
- gpio_direction_output(CAM1_POWER_DWN_GPIO, 1);
gpio_direction_output(CAM2_POWER_DWN_GPIO, 1);
gpio_direction_output(CAM3_POWER_DWN_GPIO, 1);
}
@@ -678,10 +783,12 @@ static const struct i2c_board_info cardhu_i2c_board_info_tps61050[] = {
};
static struct i2c_board_info cardhu_i2c6_board_info[] = {
+#if defined(CONFIG_VIDEO_OV5650) || defined(CONFIG_VIDEO_OV5650_MODULE)
{
I2C_BOARD_INFO("ov5650L", 0x36),
.platform_data = &cardhu_left_ov5650_data,
},
+#endif
{
I2C_BOARD_INFO("sh532u", 0x72),
.platform_data = &sh532u_left_pdata,
@@ -693,10 +800,12 @@ static struct i2c_board_info cardhu_i2c6_board_info[] = {
};
static struct i2c_board_info cardhu_i2c7_board_info[] = {
+#if defined(CONFIG_VIDEO_OV5650) || defined(CONFIG_VIDEO_OV5650_MODULE)
{
I2C_BOARD_INFO("ov5650R", 0x36),
.platform_data = &cardhu_right_ov5650_data,
},
+#endif
{
I2C_BOARD_INFO("sh532u", 0x72),
.platform_data = &sh532u_right_pdata,
@@ -708,10 +817,12 @@ static struct i2c_board_info cardhu_i2c7_board_info[] = {
};
static struct i2c_board_info pm269_i2c6_board_info[] = {
+#if defined(CONFIG_VIDEO_OV5650) || defined(CONFIG_VIDEO_OV5650_MODULE)
{
I2C_BOARD_INFO("ov5650L", 0x36),
.platform_data = &cardhu_left_ov5650_data,
},
+#endif
{
I2C_BOARD_INFO("sh532u", 0x72),
.platform_data = &pm269_sh532u_left_pdata,
@@ -723,10 +834,12 @@ static struct i2c_board_info pm269_i2c6_board_info[] = {
};
static struct i2c_board_info pm269_i2c7_board_info[] = {
+#if defined(CONFIG_VIDEO_OV5650) || defined(CONFIG_VIDEO_OV5650_MODULE)
{
I2C_BOARD_INFO("ov5650R", 0x36),
.platform_data = &cardhu_right_ov5650_data,
},
+#endif
{
I2C_BOARD_INFO("sh532u", 0x72),
.platform_data = &pm269_sh532u_right_pdata,
@@ -742,10 +855,12 @@ static struct i2c_board_info cardhu_i2c8_board_info[] = {
I2C_BOARD_INFO("ov2710", 0x36),
.platform_data = &cardhu_ov2710_data,
},
+#if defined(CONFIG_VIDEO_OV5640) || defined(CONFIG_VIDEO_OV5640_MODULE)
{
I2C_BOARD_INFO("ov5640", 0x3C),
.platform_data = &cardhu_ov5640_data,
},
+#endif
};
static int nct_get_temp(void *_data, long *temp)
@@ -920,7 +1035,8 @@ static const struct i2c_board_info cardhu_i2c2_board_info_tca6416[] = {
static int __init pmu_tca6416_init(void)
{
if ((board_info.board_id == BOARD_E1198) ||
- (board_info.board_id == BOARD_E1291))
+ (board_info.board_id == BOARD_E1291) ||
+ (board_info.board_id == BOARD_PM315))
return 0;
pr_info("Registering pmu pca6416\n");
@@ -934,7 +1050,8 @@ static int __init cam_tca6416_init(void)
/* Boards E1198 and E1291 are of Cardhu personality
* and donot have TCA6416 exp for camera */
if ((board_info.board_id == BOARD_E1198) ||
- (board_info.board_id == BOARD_E1291))
+ (board_info.board_id == BOARD_E1291) ||
+ (board_info.board_id == BOARD_PM315))
return 0;
pr_info("Registering cam pca6416\n");
@@ -1073,11 +1190,13 @@ int __init cardhu_sensors_init(void)
cardhu_camera_init();
cam_tca6416_init();
- i2c_register_board_info(2, cardhu_i2c3_board_info,
- ARRAY_SIZE(cardhu_i2c3_board_info));
+ if (board_info.board_id != BOARD_PM315) {
+ i2c_register_board_info(2, cardhu_i2c3_board_info,
+ ARRAY_SIZE(cardhu_i2c3_board_info));
- i2c_register_board_info(2, cardhu_i2c_board_info_tps61050,
- ARRAY_SIZE(cardhu_i2c_board_info_tps61050));
+ i2c_register_board_info(2, cardhu_i2c_board_info_tps61050,
+ ARRAY_SIZE(cardhu_i2c_board_info_tps61050));
+ }
#ifdef CONFIG_VIDEO_OV14810
/* This is disabled by default; To enable this change Kconfig;
@@ -1133,10 +1252,21 @@ int __init cardhu_sensors_init(void)
if (board_info.board_id != BOARD_PM315)
mpuirq_init();
+
+#if defined(CONFIG_SOC_CAMERA_OV5650) \
+ || defined(CONFIG_SOC_CAMERA_OV5650_MODULE)
+ platform_device_register(&cardhu_ov5650_soc_camera_device);
+#endif
+#if defined(CONFIG_SOC_CAMERA_OV5640) \
+ || defined(CONFIG_SOC_CAMERA_OV5640_MODULE)
+ platform_device_register(&cardhu_ov5640_soc_camera_device);
+#endif
+
return 0;
}
#if defined(CONFIG_GPIO_PCA953X)
+#if defined(CONFIG_VIDEO_OV5650) || defined(CONFIG_VIDEO_OV5650_MODULE)
struct ov5650_gpios {
const char *name;
int gpio;
@@ -1206,3 +1336,4 @@ fail:
late_initcall(cardhu_ov5650_late_init);
#endif
+#endif
diff --git a/arch/arm/mach-tegra/board-cardhu.c b/arch/arm/mach-tegra/board-cardhu.c
index 4b03ddc03b7b..809dfd2b4970 100644
--- a/arch/arm/mach-tegra/board-cardhu.c
+++ b/arch/arm/mach-tegra/board-cardhu.c
@@ -1,8 +1,8 @@
/*
* arch/arm/mach-tegra/board-cardhu.c
*
- * Copyright (c) 2011-2012, NVIDIA Corporation. All rights reserved.
- * Copyright (c) 2011-2012, NVIDIA Corporation.
+ * Copyright (c) 2011-2013, NVIDIA Corporation. All rights reserved.
+ * Copyright (c) 2011-2013, NVIDIA Corporation.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
@@ -218,6 +218,7 @@ static noinline void __init cardhu_setup_bluesleep(void)
static __initdata struct tegra_clk_init_table cardhu_clk_init_table[] = {
/* name parent rate enabled */
{ "pll_m", NULL, 0, false},
+ { "pll_a", NULL, 564480000, true},
{ "hda", "pll_p", 108000000, false},
{ "hda2codec_2x","pll_p", 48000000, false},
{ "pwm", "pll_p", 3187500, false},
@@ -1057,6 +1058,11 @@ static int __init cardhu_touch_init(void)
struct board_info BoardInfo, DisplayBoardInfo;
tegra_get_board_info(&BoardInfo);
+
+ /* Beaver board does not have any touch hardware*/
+ if (BoardInfo.board_id == BOARD_PM315)
+ return 0;
+
tegra_get_display_board_info(&DisplayBoardInfo);
if (DisplayBoardInfo.board_id == BOARD_DISPLAY_PM313) {
tegra_clk_init_from_table(spi_clk_init_table);
diff --git a/arch/arm/mach-tegra/board-ventana-panel.c b/arch/arm/mach-tegra/board-ventana-panel.c
index d2d89392e1c5..d507dea88813 100644
--- a/arch/arm/mach-tegra/board-ventana-panel.c
+++ b/arch/arm/mach-tegra/board-ventana-panel.c
@@ -1,7 +1,7 @@
/*
* arch/arm/mach-tegra/board-ventana-panel.c
*
- * Copyright (c) 2010-2012 NVIDIA Corporation.
+ * Copyright (c) 2010-2013 NVIDIA Corporation.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
@@ -48,6 +48,7 @@
#define ventana_lvds_to_bl_ms 200
static struct regulator *pnl_pwr;
+static struct regulator *vdd_ldo4;
#ifdef CONFIG_TEGRA_DC
static struct regulator *ventana_hdmi_reg = NULL;
@@ -104,11 +105,17 @@ static struct platform_device ventana_backlight_device = {
#ifdef CONFIG_TEGRA_DC
static int ventana_panel_enable(void)
{
- struct regulator *reg = regulator_get(NULL, "vdd_ldo4");
-
- if (!reg) {
- regulator_enable(reg);
- regulator_put(reg);
+ if (vdd_ldo4 == NULL) {
+ vdd_ldo4 = regulator_get(NULL, "vdd_ldo4");
+
+ if (IS_ERR(vdd_ldo4)) {
+ pr_err("%s: couldn't get regulator vdd_ldo4: %ld\n",
+ __func__, PTR_ERR(vdd_ldo4));
+ } else {
+ regulator_enable(vdd_ldo4);
+ regulator_disable(vdd_ldo4);
+ regulator_put(vdd_ldo4);
+ }
}
if (pnl_pwr == NULL) {
diff --git a/arch/arm/mach-tegra/tegra3_speedo.c b/arch/arm/mach-tegra/tegra3_speedo.c
index 92ea5fe30cde..76303b4f1756 100644
--- a/arch/arm/mach-tegra/tegra3_speedo.c
+++ b/arch/arm/mach-tegra/tegra3_speedo.c
@@ -1,7 +1,7 @@
/*
* arch/arm/mach-tegra/tegra3_speedo.c
*
- * Copyright (c) 2011-2012, NVIDIA Corporation. All rights reserved.
+ * Copyright (c) 2011-2013, NVIDIA Corporation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
@@ -198,6 +198,7 @@ static void rev_sku_to_speedo_ids(int rev, int sku)
break;
case 0x81: /* T30 */
+ case 0xb1: /* T30MQS-Ax */
switch (package_id) {
case 1: /* MID => T30 */
cpu_speedo_id = 2;
@@ -303,17 +304,9 @@ static void rev_sku_to_speedo_ids(int rev, int sku)
case 0x91: /* T30AGS-Ax */
case 0xb0: /* T30IQS-Ax */
- case 0xb1: /* T30MQS-Ax */
case 0x90: /* T30AQS-Ax */
-#if defined(CONFIG_MACH_APALIS_T30) || defined(CONFIG_MACH_COLIBRI_T30)
- /* Hack: Force speedo ID of 2 for now. */
- cpu_speedo_id = 2;
- soc_speedo_id = 2;
- threshold_index = 2;
-#else /* CONFIG_MACH_APALIS_T30 | CONFIG_MACH_COLIBRI_T30 */
soc_speedo_id = 3;
threshold_index = 12;
-#endif /* CONFIG_MACH_APALIS_T30 | CONFIG_MACH_COLIBRI_T30 */
break;
case 0x93: /* T30AG-Ax */
cpu_speedo_id = 11;
@@ -480,7 +473,6 @@ void tegra_init_speedo_data(void)
if (cpu_process_id <= 2) {
switch(fuse_sku) {
case 0xb0:
- case 0xb1:
cpu_speedo_id = 9;
break;
case 0x90:
@@ -492,7 +484,6 @@ void tegra_init_speedo_data(void)
} else if (cpu_process_id >= 3 && cpu_process_id < 6) {
switch(fuse_sku) {
case 0xb0:
- case 0xb1:
cpu_speedo_id = 10;
break;
case 0x90:
generated by cgit v1.2.3 (git 2.0.4) at 2024-04-19 14:26:31 +0000