diff options
Diffstat (limited to 'drivers/gpio/langwell_gpio.c')
-rw-r--r-- | drivers/gpio/langwell_gpio.c | 56 |
1 files changed, 29 insertions, 27 deletions
diff --git a/drivers/gpio/langwell_gpio.c b/drivers/gpio/langwell_gpio.c index 64db9dc3a275..560ab648cf18 100644 --- a/drivers/gpio/langwell_gpio.c +++ b/drivers/gpio/langwell_gpio.c @@ -134,10 +134,10 @@ static int lnw_gpio_to_irq(struct gpio_chip *chip, unsigned offset) return lnw->irq_base + offset; } -static int lnw_irq_type(unsigned irq, unsigned type) +static int lnw_irq_type(struct irq_data *d, unsigned type) { - struct lnw_gpio *lnw = get_irq_chip_data(irq); - u32 gpio = irq - lnw->irq_base; + struct lnw_gpio *lnw = irq_data_get_irq_chip_data(d); + u32 gpio = d->irq - lnw->irq_base; unsigned long flags; u32 value; void __iomem *grer = gpio_reg(&lnw->chip, gpio, GRER); @@ -162,19 +162,19 @@ static int lnw_irq_type(unsigned irq, unsigned type) return 0; } -static void lnw_irq_unmask(unsigned irq) +static void lnw_irq_unmask(struct irq_data *d) { } -static void lnw_irq_mask(unsigned irq) +static void lnw_irq_mask(struct irq_data *d) { } static struct irq_chip lnw_irqchip = { .name = "LNW-GPIO", - .mask = lnw_irq_mask, - .unmask = lnw_irq_unmask, - .set_type = lnw_irq_type, + .irq_mask = lnw_irq_mask, + .irq_unmask = lnw_irq_unmask, + .irq_set_type = lnw_irq_type, }; static DEFINE_PCI_DEVICE_TABLE(lnw_gpio_ids) = { /* pin number */ @@ -187,26 +187,28 @@ MODULE_DEVICE_TABLE(pci, lnw_gpio_ids); static void lnw_irq_handler(unsigned irq, struct irq_desc *desc) { - struct lnw_gpio *lnw = (struct lnw_gpio *)get_irq_data(irq); - u32 base, gpio; + struct irq_data *data = irq_desc_get_irq_data(desc); + struct lnw_gpio *lnw = irq_data_get_irq_handler_data(data); + struct irq_chip *chip = irq_data_get_irq_chip(data); + u32 base, gpio, mask; + unsigned long pending; void __iomem *gedr; - u32 gedr_v; /* check GPIO controller to check which pin triggered the interrupt */ for (base = 0; base < lnw->chip.ngpio; base += 32) { gedr = gpio_reg(&lnw->chip, base, GEDR); - gedr_v = readl(gedr); - if (!gedr_v) - continue; - for (gpio = base; gpio < base + 32; gpio++) - if (gedr_v & BIT(gpio % 32)) { - pr_debug("pin %d triggered\n", gpio); - generic_handle_irq(lnw->irq_base + gpio); - } - /* clear the edge detect status bit */ - writel(gedr_v, gedr); + pending = readl(gedr); + while (pending) { + gpio = __ffs(pending) - 1; + mask = BIT(gpio); + pending &= ~mask; + /* Clear before handling so we can't lose an edge */ + writel(mask, gedr); + generic_handle_irq(lnw->irq_base + base + gpio); + } } - desc->chip->eoi(irq); + + chip->irq_eoi(data); } static int __devinit lnw_gpio_probe(struct pci_dev *pdev, @@ -274,12 +276,12 @@ static int __devinit lnw_gpio_probe(struct pci_dev *pdev, dev_err(&pdev->dev, "langwell gpiochip_add error %d\n", retval); goto err5; } - set_irq_data(pdev->irq, lnw); - set_irq_chained_handler(pdev->irq, lnw_irq_handler); + irq_set_handler_data(pdev->irq, lnw); + irq_set_chained_handler(pdev->irq, lnw_irq_handler); for (i = 0; i < lnw->chip.ngpio; i++) { - set_irq_chip_and_handler_name(i + lnw->irq_base, &lnw_irqchip, - handle_simple_irq, "demux"); - set_irq_chip_data(i + lnw->irq_base, lnw); + irq_set_chip_and_handler_name(i + lnw->irq_base, &lnw_irqchip, + handle_simple_irq, "demux"); + irq_set_chip_data(i + lnw->irq_base, lnw); } spin_lock_init(&lnw->lock); |