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path: root/drivers/infiniband/hw/qib/qib_iba6120.c
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Diffstat (limited to 'drivers/infiniband/hw/qib/qib_iba6120.c')
-rw-r--r--drivers/infiniband/hw/qib/qib_iba6120.c4
1 files changed, 2 insertions, 2 deletions
diff --git a/drivers/infiniband/hw/qib/qib_iba6120.c b/drivers/infiniband/hw/qib/qib_iba6120.c
index 774dea897e9c..7de4b7ebffc5 100644
--- a/drivers/infiniband/hw/qib/qib_iba6120.c
+++ b/drivers/infiniband/hw/qib/qib_iba6120.c
@@ -1799,7 +1799,7 @@ static int qib_6120_setup_reset(struct qib_devdata *dd)
/*
* Keep chip from being accessed until we are ready. Use
* writeq() directly, to allow the write even though QIB_PRESENT
- * isnt' set.
+ * isn't' set.
*/
dd->flags &= ~(QIB_INITTED | QIB_PRESENT);
dd->int_counter = 0; /* so we check interrupts work again */
@@ -2171,7 +2171,7 @@ static void rcvctrl_6120_mod(struct qib_pportdata *ppd, unsigned int op,
* Init the context registers also; if we were
* disabled, tail and head should both be zero
* already from the enable, but since we don't
- * know, we have to do it explictly.
+ * know, we have to do it explicitly.
*/
val = qib_read_ureg32(dd, ur_rcvegrindextail, ctxt);
qib_write_ureg(dd, ur_rcvegrindexhead, val, ctxt);