diff options
Diffstat (limited to 'drivers/mxc/gpu-viv/hal/kernel/inc/gc_hal_options.h')
| -rw-r--r-- | drivers/mxc/gpu-viv/hal/kernel/inc/gc_hal_options.h | 574 |
1 files changed, 574 insertions, 0 deletions
diff --git a/drivers/mxc/gpu-viv/hal/kernel/inc/gc_hal_options.h b/drivers/mxc/gpu-viv/hal/kernel/inc/gc_hal_options.h new file mode 100644 index 000000000000..c33f8bd42fcb --- /dev/null +++ b/drivers/mxc/gpu-viv/hal/kernel/inc/gc_hal_options.h @@ -0,0 +1,574 @@ +/**************************************************************************** +* +* Copyright (C) 2005 - 2011 by Vivante Corp. +* +* This program is free software; you can redistribute it and/or modify +* it under the terms of the GNU General Public License as published by +* the Free Software Foundation; either version 2 of the license, or +* (at your option) any later version. +* +* This program is distributed in the hope that it will be useful, +* but WITHOUT ANY WARRANTY; without even the implied warranty of +* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +* GNU General Public License for more details. +* +* You should have received a copy of the GNU General Public License +* along with this program; if not write to the Free Software +* Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. +* +*****************************************************************************/ + + + + +#ifndef __gc_hal_options_h_ +#define __gc_hal_options_h_ + +/* + gcdPRINT_VERSION + + Print HAL version. +*/ +#ifndef gcdPRINT_VERSION +# define gcdPRINT_VERSION 0 +#endif + +/* + USE_NEW_LINUX_SIGNAL + + This define enables the Linux kernel signaling between kernel and user. +*/ +#ifndef USE_NEW_LINUX_SIGNAL +# define USE_NEW_LINUX_SIGNAL 0 +#endif + +/* + NO_USER_DIRECT_ACCESS_FROM_KERNEL + + This define enables the Linux kernel behavior accessing user memory. +*/ +#ifndef NO_USER_DIRECT_ACCESS_FROM_KERNEL +# define NO_USER_DIRECT_ACCESS_FROM_KERNEL 0 +#endif + +/* + VIVANTE_PROFILER + + This define enables the profiler. +*/ +#ifndef VIVANTE_PROFILER +# define VIVANTE_PROFILER 0 +#endif + +/* + gcdUSE_VG + + Enable VG HAL layer (only for GC350). +*/ +#ifndef gcdUSE_VG +# define gcdUSE_VG 0 +#endif + +/* + USE_SW_FB + + Set to 1 if the frame buffer memory cannot be accessed by the GPU. +*/ +#ifndef USE_SW_FB +# define USE_SW_FB 0 +#endif + +/* + USE_SUPER_SAMPLING + + This define enables super-sampling support. +*/ +#define USE_SUPER_SAMPLING 0 + +/* + PROFILE_HAL_COUNTERS + + This define enables HAL counter profiling support. HW and SHADER + counter profiling depends on this. +*/ +#ifndef PROFILE_HAL_COUNTERS +# define PROFILE_HAL_COUNTERS 1 +#endif + +/* + PROFILE_HW_COUNTERS + + This define enables HW counter profiling support. +*/ +#ifndef PROFILE_HW_COUNTERS +# define PROFILE_HW_COUNTERS 1 +#endif + +/* + PROFILE_SHADER_COUNTERS + + This define enables SHADER counter profiling support. +*/ +#ifndef PROFILE_SHADER_COUNTERS +# define PROFILE_SHADER_COUNTERS 1 +#endif + +/* + COMMAND_PROCESSOR_VERSION + + The version of the command buffer and task manager. +*/ +#define COMMAND_PROCESSOR_VERSION 1 + +/* + gcdDUMP + + When set to 1, a dump of all states and memory uploads, as well as other + hardware related execution will be printed to the debug console. This + data can be used for playing back applications. +*/ +#ifndef gcdDUMP +# define gcdDUMP 0 +#endif + +/* + gcdDUMP_API + + When set to 1, a high level dump of the EGL and GL/VG APs's are + captured. +*/ +#ifndef gcdDUMP_API +# define gcdDUMP_API 0 +#endif + +/* + gcdDUMP_IN_KERNEL + + When set to 1, all dumps will happen in the kernel. This is handy if + you want the kernel to dump its command buffers as well and the data + needs to be in sync. +*/ +#ifndef gcdDUMP_IN_KERNEL +# define gcdDUMP_IN_KERNEL 0 +#endif + +/* + gcdDUMP_COMMAND + + When set to non-zero, the command queue will dump all incoming command + and context buffers as well as all other modifications to the command + queue. +*/ +#ifndef gcdDUMP_COMMAND +# define gcdDUMP_COMMAND 0 +#endif + +/* + gcdDUMP_FRAME_TGA + + When set to a value other than 0, a dump of the frame specified by the value, + will be done into frame.tga. Frame count starts from 1. + */ +#ifndef gcdDUMP_FRAME_TGA +#define gcdDUMP_FRAME_TGA 0 +#endif +/* + gcdNULL_DRIVER + + Set to 1 for infinite speed hardware. + Set to 2 for bypassing the HAL. + Set to 3 for bypassing the drivers. +*/ +#ifndef gcdNULL_DRIVER +# define gcdNULL_DRIVER 0 +#endif + +/* + gcdENABLE_TIMEOUT_DETECTION + + Enable timeout detection. +*/ +#ifndef gcdENABLE_TIMEOUT_DETECTION +# define gcdENABLE_TIMEOUT_DETECTION 0 +#endif + +/* + gcdCMD_BUFFER_SIZE + + Number of bytes in a command buffer. +*/ +#ifndef gcdCMD_BUFFER_SIZE +# define gcdCMD_BUFFER_SIZE (128 << 10) +#endif + +/* + gcdCMD_BUFFERS + + Number of command buffers to use per client. +*/ +#ifndef gcdCMD_BUFFERS +# define gcdCMD_BUFFERS 2 +#endif + +/* + gcdMAX_CMD_BUFFERS + + Maximum number of command buffers to use per client. +*/ +#ifndef gcdMAX_CMD_BUFFERS +# define gcdMAX_CMD_BUFFERS 8 +#endif + +/* + gcdCOMMAND_QUEUES + + Number of command queues in the kernel. +*/ +#ifndef gcdCOMMAND_QUEUES +# define gcdCOMMAND_QUEUES 2 +#endif + +/* + gcdPOWER_CONTROL_DELAY + + The delay in milliseconds required to wait until the GPU has woke up + from a suspend or power-down state. This is system dependent because + the bus clock also needs to stabalize. +*/ +#ifndef gcdPOWER_CONTROL_DELAY +# define gcdPOWER_CONTROL_DELAY 0 +#endif + +/* + gcdMMU_SIZE + + Size of the MMU page table in bytes. Each 4 bytes can hold 4kB worth of + virtual data. +*/ +#ifndef gcdMMU_SIZE +# define gcdMMU_SIZE (128 << 10) +#endif + +/* + gcdSECURE_USER + + Use logical addresses instead of physical addresses in user land. In + this case a hint table is created for both command buffers and context + buffers, and that hint table will be used to patch up those buffers in + the kernel when they are ready to submit. +*/ +#ifndef gcdSECURE_USER +# define gcdSECURE_USER 0 +#endif + +/* + gcdSECURE_CACHE_SLOTS + + Number of slots in the logical to DMA address cache table. Each time a + logical address needs to be translated into a DMA address for the GPU, + this cache will be walked. The replacement scheme is LRU. +*/ +#ifndef gcdSECURE_CACHE_SLOTS +# define gcdSECURE_CACHE_SLOTS 1024 +#endif + +/* + gcdSECURE_CACHE_METHOD + + Replacement scheme used for Secure Cache. The following options are + available: + + gcdSECURE_CACHE_LRU + A standard LRU cache. + + gcdSECURE_CACHE_LINEAR + A linear walker with the idea that an application will always + render the scene in a similar way, so the next entry in the + cache should be a hit most of the time. + + gcdSECURE_CACHE_HASH + A 256-entry hash table. + + gcdSECURE_CACHE_TABLE + A simple cache but with potential of a lot of cache replacement. +*/ +#ifndef gcdSECURE_CACHE_METHOD +# define gcdSECURE_CACHE_METHOD gcdSECURE_CACHE_HASH +#endif + +/* + gcdREGISTER_ACCESS_FROM_USER + + Set to 1 to allow IOCTL calls to get through from user land. This + should only be in debug or development drops. +*/ +#ifndef gcdREGISTER_ACCESS_FROM_USER +# define gcdREGISTER_ACCESS_FROM_USER 1 +#endif + +/* + gcdHEAP_SIZE + + Set the allocation size for the internal heaps. Each time a heap is + full, a new heap will be allocated with this minmimum amount of bytes. + The bigger this size, the fewer heaps there are to allocate, the better + the performance. However, heaps won't be freed until they are + completely free, so there might be some more memory waste if the size is + too big. +*/ +#ifndef gcdHEAP_SIZE +# define gcdHEAP_SIZE (64 << 10) +#endif + +/* + gcdPOWER_MANAGEMENT + + This define enables the power management code. +*/ +#ifndef gcdPOWER_MANAGEMENT +# define gcdPOWER_MANAGEMENT 1 +#endif + +/* + gcdFPGA_BUILD + + This define enables work arounds for FPGA images. +*/ +#ifndef gcdFPGA_BUILD +# define gcdFPGA_BUILD 0 +#endif + +/* + gcdGPU_TIMEOUT + + This define specified the number of milliseconds the system will wait + before it broadcasts the GPU is stuck. In other words, it will define + the timeout of any operation that needs to wait for the GPU. + + If the value is 0, no timeout will be checked for. +*/ +#ifndef gcdGPU_TIMEOUT +# if gcdFPGA_BUILD +# define gcdGPU_TIMEOUT 0 +# else +# define gcdGPU_TIMEOUT 2000 +# endif +#endif + +/* + gcdGPU_ADVANCETIMER + + it is advance timer. +*/ +#ifndef gcdGPU_ADVANCETIMER +# define gcdGPU_ADVANCETIMER 250 +#endif + +/* + gcdSTATIC_LINK + + This define disalbes static linking; +*/ +#ifndef gcdSTATIC_LINK +# define gcdSTATIC_LINK 0 +#endif + +/* + gcdUSE_NEW_HEAP + + Setting this define to 1 enables new heap. +*/ +#ifndef gcdUSE_NEW_HEAP +# define gcdUSE_NEW_HEAP 0 +#endif + +/* + gcdCMD_NO_2D_CONTEXT + + This define enables no-context 2D command buffer. +*/ +#ifndef gcdCMD_NO_2D_CONTEXT +# define gcdCMD_NO_2D_CONTEXT 1 +#endif + +/* + gcdENABLE_BANK_ALIGNMENT + + When enabled, video memory is allocated bank aligned. The vendor can modify + gckOS_GetSurfaceBankAlignment() and gcoOS_GetBankOffsetBytes() to define how + different types of allocations are bank and channel aligned. + When disabled (default), no bank alignment is done. +*/ +#ifndef gcdENABLE_BANK_ALIGNMENT +# define gcdENABLE_BANK_ALIGNMENT 0 +#endif + +/* + gcdDYNAMIC_SPEED + + When non-zero, it informs the kernel driver to use the speed throttling + broadcasting functions to inform the system the GPU should be spet up or + slowed down. It will send a broadcast for slowdown each "interval" + specified by this define in milliseconds + (gckOS_BroadcastCalibrateSpeed). +*/ +#ifndef gcdDYNAMIC_SPEED +# define gcdDYNAMIC_SPEED 2000 +#endif + +/* + gcdDYNAMIC_EVENT_THRESHOLD + + When non-zero, it specifies the maximum number of available events at + which the kernel driver will issue a broadcast to speed up the GPU + (gckOS_BroadcastHurry). +*/ +#ifndef gcdDYNAMIC_EVENT_THRESHOLD +# define gcdDYNAMIC_EVENT_THRESHOLD 5 +#endif + +/* + gcdENABLE_PROFILING + + Enable profiling macros. +*/ +#ifndef gcdENABLE_PROFILING +# define gcdENABLE_PROFILING 0 +#endif + +/* + gcdENABLE_128B_MERGE + + Enable 128B merge for the BUS control. +*/ +#ifndef gcdENABLE_128B_MERGE +# define gcdENABLE_128B_MERGE 0 +#endif + +/* + gcdFRAME_DB + + When non-zero, it specified the number of frames inside the frame + database. The frame DB will collect per-frame timestamps and hardware + counters. +*/ +#ifndef gcdFRAME_DB +# define gcdFRAME_DB 0 +# define gcdFRAME_DB_RESET 0 +# define gcdFRAME_DB_NAME "/var/log/frameDB.log" +#endif + +/* + gcdENABLE_VG + enable the 2D openVG +*/ + +#ifndef gcdENABLE_VG +# define gcdENABLE_VG 0 +#endif + +/* + gcdPAGED_MEMORY_CACHEABLE + + When non-zero, paged memory will be cacheable. + */ + +#ifndef gcdPAGED_MEMORY_CACHEABLE +# define gcdPAGED_MEMORY_CACHEABLE 0 +#endif + +/* + gcdNONPAGED_MEMORY_CACHEABLE + + When non-zero, non paged memory will be cacheable. + */ + +#ifndef gcdNONPAGED_MEMORY_CACHEABLE +# define gcdNONPAGED_MEMORY_CACHEABLE 0 +#endif + +/* + gcdNONPAGED_MEMORY_BUFFERABLE + + When non-zero, non paged memory will be bufferable. + gcdNONPAGED_MEMORY_BUFFERABLE and gcdNONPAGED_MEMORY_CACHEABLE + can't be set 1 at same time + */ + +#ifndef gcdNONPAGED_MEMORY_BUFFERABLE +# define gcdNONPAGED_MEMORY_BUFFERABLE 1 +#endif + +/* + gcdENABLE_INFINITE_SPEED_HW + enable the Infinte HW , this is for 2D openVG +*/ + +#ifndef gcdENABLE_INFINITE_SPEED_HW +# define gcdENABLE_INFINITE_SPEED_HW 0 +#endif + +/* + gcdENABLE_TS_DOUBLE_BUFFER + enable the TS double buffer, this is for 2D openVG +*/ + +#ifndef gcdENABLE_TS_DOUBLE_BUFFER +# define gcdENABLE_TS_DOUBLE_BUFFER 1 +#endif + + +/* + gcdENABLE_SHARED_INFO + + When non-zero, enable process store some shared data in kernel + which can be got by other processes + */ +#ifndef gcdENABLE_SHARED_INFO +# define gcdENABLE_SHARED_INFO 1 +#endif + +/* + gcd6000_SUPPORT + + Temporary define to enable/disable 6000 support. + */ +#ifndef gcd6000_SUPPORT +# define gcd6000_SUPPORT 0 +#endif + +/* + gcdPOWEROFF_TIMEOUT + + When non-zero, GPU will power off automatically after idle + state lasting for gcdPOWEROFF_TIMEOUT milliseconds. + */ + +#ifndef gcdPOWEROFF_TIMEOUT +# define gcdPOWEROFF_TIMEOUT 5000 +#endif + +/* + gcdUSE_VIDMEM_PER_PID +*/ +#ifndef gcdUSE_VIDMEM_PER_PID +# define gcdUSE_VIDMEM_PER_PID 0 +#endif + +/* + QNX_SINGLE_THREADED_DEBUGGING +*/ +#ifndef QNX_SINGLE_THREADED_DEBUGGING +# define QNX_SINGLE_THREADED_DEBUGGING 0 +#endif + +/* + gcdENABLE_RECOVERY + + This define enables the recovery code. +*/ +#ifndef gcdENABLE_RECOVERY +# define gcdENABLE_RECOVERY 0 +#endif + +#endif /* __gc_hal_options_h_ */ |