diff options
Diffstat (limited to 'drivers/staging/sm750fb/ddk750_mode.c')
| -rw-r--r-- | drivers/staging/sm750fb/ddk750_mode.c | 33 |
1 files changed, 16 insertions, 17 deletions
diff --git a/drivers/staging/sm750fb/ddk750_mode.c b/drivers/staging/sm750fb/ddk750_mode.c index ccb4e067661a..05b83646c2d5 100644 --- a/drivers/staging/sm750fb/ddk750_mode.c +++ b/drivers/staging/sm750fb/ddk750_mode.c @@ -4,15 +4,14 @@ #include "ddk750_mode.h" #include "ddk750_chip.h" -/* - SM750LE only: - This function takes care extra registers and bit fields required to set - up a mode in SM750LE - - Explanation about Display Control register: - HW only supports 7 predefined pixel clocks, and clock select is - in bit 29:27 of Display Control register. -*/ +/* SM750LE only: + * This function takes care extra registers and bit fields required to set + * up a mode in SM750LE + * + * Explanation about Display Control register: + * HW only supports 7 predefined pixel clocks, and clock select is + * in bit 29:27 of Display Control register. + */ static unsigned long displayControlAdjust_SM750LE(mode_parameter_t *pModeParam, unsigned long dispControl) { unsigned long x, y; @@ -21,9 +20,9 @@ static unsigned long displayControlAdjust_SM750LE(mode_parameter_t *pModeParam, y = pModeParam->vertical_display_end; /* SM750LE has to set up the top-left and bottom-right - registers as well. - Note that normal SM750/SM718 only use those two register for - auto-centering mode. + * registers as well. + * Note that normal SM750/SM718 only use those two register for + * auto-centering mode. */ POKE32(CRT_AUTO_CENTERING_TL, 0); @@ -33,8 +32,8 @@ static unsigned long displayControlAdjust_SM750LE(mode_parameter_t *pModeParam, ((x - 1) & CRT_AUTO_CENTERING_BR_RIGHT_MASK)); /* Assume common fields in dispControl have been properly set before - calling this function. - This function only sets the extra fields in dispControl. + * calling this function. + * This function only sets the extra fields in dispControl. */ /* Clear bit 29:27 of display control register */ @@ -63,7 +62,7 @@ static unsigned long displayControlAdjust_SM750LE(mode_parameter_t *pModeParam, dispControl |= (CRT_DISPLAY_CTRL_CRTSELECT | CRT_DISPLAY_CTRL_RGBBIT); /* Set bit 14 of display controller */ - dispControl = DISPLAY_CTRL_CLOCK_PHASE; + dispControl |= DISPLAY_CTRL_CLOCK_PHASE; POKE32(CRT_DISPLAY_CTRL, dispControl); @@ -117,7 +116,7 @@ static int programModeRegisters(mode_parameter_t *pModeParam, pll_value_t *pll) if (pModeParam->horizontal_sync_polarity) tmp |= DISPLAY_CTRL_HSYNC_PHASE; - if (getChipType() == SM750LE) { + if (sm750_get_chip_type() == SM750LE) { displayControlAdjust_SM750LE(pModeParam, tmp); } else { reg = PEEK32(CRT_DISPLAY_CTRL) & @@ -209,7 +208,7 @@ int ddk750_setModeTiming(mode_parameter_t *parm, clock_type_t clock) pll.clockType = clock; uiActualPixelClk = calcPllValue(parm->pixel_clock, &pll); - if (getChipType() == SM750LE) { + if (sm750_get_chip_type() == SM750LE) { /* set graphic mode via IO method */ outb_p(0x88, 0x3d4); outb_p(0x06, 0x3d5); |