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path: root/drivers/video/tegra/dc/rgb.c
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Diffstat (limited to 'drivers/video/tegra/dc/rgb.c')
-rw-r--r--drivers/video/tegra/dc/rgb.c6
1 files changed, 3 insertions, 3 deletions
diff --git a/drivers/video/tegra/dc/rgb.c b/drivers/video/tegra/dc/rgb.c
index e7ea9a8914df..7b87a2da4b4d 100644
--- a/drivers/video/tegra/dc/rgb.c
+++ b/drivers/video/tegra/dc/rgb.c
@@ -42,13 +42,13 @@ static const u32 tegra_dc_rgb_enable_out_sel_pintable[] = {
DC_COM_PIN_OUTPUT_SELECT0, 0x00000000,
DC_COM_PIN_OUTPUT_SELECT1, 0x00000000,
DC_COM_PIN_OUTPUT_SELECT2, 0x00000000,
-#ifdef CONFIG_TEGRA_FPGA_PLATFORM
+#ifdef CONFIG_TEGRA_SILICON_PLATFORM
+ DC_COM_PIN_OUTPUT_SELECT3, 0x00000000,
+#else
/* The display panel sub-board used on FPGA platforms (panel 86)
is non-standard. It expects the Data Enable signal on the WR
pin instead of the DE pin. */
DC_COM_PIN_OUTPUT_SELECT3, 0x00200000,
-#else
- DC_COM_PIN_OUTPUT_SELECT3, 0x00000000,
#endif
DC_COM_PIN_OUTPUT_SELECT4, 0x00210222,
DC_COM_PIN_OUTPUT_SELECT5, 0x00002200,