diff options
Diffstat (limited to 'include')
136 files changed, 8673 insertions, 148 deletions
diff --git a/include/asm-generic/vmlinux.lds.h b/include/asm-generic/vmlinux.lds.h index db22d136ad08..ff4d370a4e89 100644 --- a/include/asm-generic/vmlinux.lds.h +++ b/include/asm-generic/vmlinux.lds.h @@ -473,7 +473,7 @@ #ifdef CONFIG_CONSTRUCTORS #define KERNEL_CTORS() . = ALIGN(8); \ VMLINUX_SYMBOL(__ctors_start) = .; \ - *(.ctors) \ + *(CONFIG_GCOV_CTORS) \ VMLINUX_SYMBOL(__ctors_end) = .; #else #define KERNEL_CTORS() diff --git a/include/drm/drm_fixed.h b/include/drm/drm_fixed.h index 4a08a664ff1f..0ead502e17d2 100644 --- a/include/drm/drm_fixed.h +++ b/include/drm/drm_fixed.h @@ -37,6 +37,7 @@ typedef union dfixed { #define dfixed_init(A) { .full = dfixed_const((A)) } #define dfixed_init_half(A) { .full = dfixed_const_half((A)) } #define dfixed_trunc(A) ((A).full >> 12) +#define dfixed_frac(A) ((A).full & ((1 << 12) - 1)) static inline u32 dfixed_floor(fixed20_12 A) { diff --git a/include/linux/adt7461.h b/include/linux/adt7461.h new file mode 100644 index 000000000000..7307395ba7c8 --- /dev/null +++ b/include/linux/adt7461.h @@ -0,0 +1,41 @@ +/* + * include/linux/adt8461.h + * + * ADT7461, temperature monitoring device from ON Semiconductors + * + * Copyright (c) 2011, NVIDIA Corporation. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + * more details. + * + * You should have received a copy of the GNU General Public License along + * with this program; if not, write to the Free Software Foundation, Inc., + * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, USA. + */ + +#ifndef _LINUX_ADT7461_H +#define _LINUX_ADT7461_H + +#include <linux/types.h> + +struct adt7461_platform_data { + bool supported_hwrev; + bool ext_range; + bool therm2; + u8 conv_rate; + u8 offset; + u8 hysteresis; + u8 shutdown_ext_limit; + u8 shutdown_local_limit; + u8 throttling_ext_limit; + void (*alarm_fn)(bool raised); +}; + +#endif /* _LINUX_ADT7461_H */ diff --git a/include/linux/akm8975.h b/include/linux/akm8975.h new file mode 100644 index 000000000000..6a7c43260018 --- /dev/null +++ b/include/linux/akm8975.h @@ -0,0 +1,87 @@ +/* + * Definitions for akm8975 compass chip. + */ +#ifndef AKM8975_H +#define AKM8975_H + +#include <linux/ioctl.h> + +/*! \name AK8975 operation mode + \anchor AK8975_Mode + Defines an operation mode of the AK8975.*/ +/*! @{*/ +#define AK8975_MODE_SNG_MEASURE 0x01 +#define AK8975_MODE_SELF_TEST 0x08 +#define AK8975_MODE_FUSE_ACCESS 0x0F +#define AK8975_MODE_POWER_DOWN 0x00 +/*! @}*/ + +#define RBUFF_SIZE 8 /* Rx buffer size */ + +/*! \name AK8975 register address +\anchor AK8975_REG +Defines a register address of the AK8975.*/ +/*! @{*/ +#define AK8975_REG_WIA 0x00 +#define AK8975_REG_INFO 0x01 +#define AK8975_REG_ST1 0x02 +#define AK8975_REG_HXL 0x03 +#define AK8975_REG_HXH 0x04 +#define AK8975_REG_HYL 0x05 +#define AK8975_REG_HYH 0x06 +#define AK8975_REG_HZL 0x07 +#define AK8975_REG_HZH 0x08 +#define AK8975_REG_ST2 0x09 +#define AK8975_REG_CNTL 0x0A +#define AK8975_REG_RSV 0x0B +#define AK8975_REG_ASTC 0x0C +#define AK8975_REG_TS1 0x0D +#define AK8975_REG_TS2 0x0E +#define AK8975_REG_I2CDIS 0x0F +/*! @}*/ + +/*! \name AK8975 fuse-rom address +\anchor AK8975_FUSE +Defines a read-only address of the fuse ROM of the AK8975.*/ +/*! @{*/ +#define AK8975_FUSE_ASAX 0x10 +#define AK8975_FUSE_ASAY 0x11 +#define AK8975_FUSE_ASAZ 0x12 +/*! @}*/ + +#define AKMIO 0xA1 + +/* IOCTLs for AKM library */ +#define ECS_IOCTL_WRITE _IOW(AKMIO, 0x02, char[5]) +#define ECS_IOCTL_READ _IOWR(AKMIO, 0x03, char[5]) +#define ECS_IOCTL_GETDATA _IOR(AKMIO, 0x08, char[RBUFF_SIZE]) +#define ECS_IOCTL_SET_YPR _IOW(AKMIO, 0x0C, short[12]) +#define ECS_IOCTL_GET_OPEN_STATUS _IOR(AKMIO, 0x0D, int) +#define ECS_IOCTL_GET_CLOSE_STATUS _IOR(AKMIO, 0x0E, int) +#define ECS_IOCTL_GET_DELAY _IOR(AKMIO, 0x30, short) + +/* IOCTLs for APPs */ +#define ECS_IOCTL_APP_SET_MFLAG _IOW(AKMIO, 0x11, short) +#define ECS_IOCTL_APP_GET_MFLAG _IOW(AKMIO, 0x12, short) +#define ECS_IOCTL_APP_SET_AFLAG _IOW(AKMIO, 0x13, short) +#define ECS_IOCTL_APP_GET_AFLAG _IOR(AKMIO, 0x14, short) +#define ECS_IOCTL_APP_SET_DELAY _IOW(AKMIO, 0x18, short) +#define ECS_IOCTL_APP_GET_DELAY ECS_IOCTL_GET_DELAY +/* Set raw magnetic vector flag */ +#define ECS_IOCTL_APP_SET_MVFLAG _IOW(AKMIO, 0x19, short) +/* Get raw magnetic vector flag */ +#define ECS_IOCTL_APP_GET_MVFLAG _IOR(AKMIO, 0x1A, short) +#define ECS_IOCTL_APP_SET_TFLAG _IOR(AKMIO, 0x15, short) + + +struct akm8975_platform_data { + int intr; + + int (*init)(void); + void (*exit)(void); + int (*power_on)(void); + int (*power_off)(void); +}; + +#endif + diff --git a/include/linux/amba/mmci.h b/include/linux/amba/mmci.h index 21114810c7c0..60c737f7bda5 100644 --- a/include/linux/amba/mmci.h +++ b/include/linux/amba/mmci.h @@ -5,6 +5,15 @@ #define AMBA_MMCI_H #include <linux/mmc/host.h> +#include <linux/mmc/card.h> +#include <linux/mmc/sdio_func.h> + +struct embedded_sdio_data { + struct sdio_cis cis; + struct sdio_cccr cccr; + struct sdio_embedded_func *funcs; + int num_funcs; +}; /* Just some dummy forwarding */ struct dma_chan; @@ -55,6 +64,9 @@ struct mmci_platform_data { bool (*dma_filter)(struct dma_chan *chan, void *filter_param); void *dma_rx_param; void *dma_tx_param; + unsigned int status_irq; + struct embedded_sdio_data *embedded_sdio; + int (*register_status_notify)(void (*callback)(int card_present, void *dev_id), void *dev_id); }; #endif diff --git a/include/linux/android_aid.h b/include/linux/android_aid.h new file mode 100644 index 000000000000..0f904b3ba7f0 --- /dev/null +++ b/include/linux/android_aid.h @@ -0,0 +1,28 @@ +/* include/linux/android_aid.h + * + * Copyright (C) 2008 Google, Inc. + * + * This software is licensed under the terms of the GNU General Public + * License version 2, as published by the Free Software Foundation, and + * may be copied, distributed, and modified under those terms. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + */ + +#ifndef _LINUX_ANDROID_AID_H +#define _LINUX_ANDROID_AID_H + +/* AIDs that the kernel treats differently */ +#define AID_NET_BT_ADMIN 3001 +#define AID_NET_BT 3002 +#define AID_INET 3003 +#define AID_NET_RAW 3004 +#define AID_NET_ADMIN 3005 +#define AID_NET_BW_STATS 3006 /* read bandwidth statistics */ +#define AID_NET_BW_ACCT 3007 /* change bandwidth statistics accounting */ + +#endif diff --git a/include/linux/android_alarm.h b/include/linux/android_alarm.h new file mode 100644 index 000000000000..f8f14e793dbf --- /dev/null +++ b/include/linux/android_alarm.h @@ -0,0 +1,106 @@ +/* include/linux/android_alarm.h + * + * Copyright (C) 2006-2007 Google, Inc. + * + * This software is licensed under the terms of the GNU General Public + * License version 2, as published by the Free Software Foundation, and + * may be copied, distributed, and modified under those terms. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + */ + +#ifndef _LINUX_ANDROID_ALARM_H +#define _LINUX_ANDROID_ALARM_H + +#include <linux/ioctl.h> +#include <linux/time.h> + +enum android_alarm_type { + /* return code bit numbers or set alarm arg */ + ANDROID_ALARM_RTC_WAKEUP, + ANDROID_ALARM_RTC, + ANDROID_ALARM_ELAPSED_REALTIME_WAKEUP, + ANDROID_ALARM_ELAPSED_REALTIME, + ANDROID_ALARM_SYSTEMTIME, + + ANDROID_ALARM_TYPE_COUNT, + + /* return code bit numbers */ + /* ANDROID_ALARM_TIME_CHANGE = 16 */ +}; + +#ifdef __KERNEL__ + +#include <linux/ktime.h> +#include <linux/rbtree.h> + +/* + * The alarm interface is similar to the hrtimer interface but adds support + * for wakeup from suspend. It also adds an elapsed realtime clock that can + * be used for periodic timers that need to keep runing while the system is + * suspended and not be disrupted when the wall time is set. + */ + +/** + * struct alarm - the basic alarm structure + * @node: red black tree node for time ordered insertion + * @type: alarm type. rtc/elapsed-realtime/systemtime, wakeup/non-wakeup. + * @softexpires: the absolute earliest expiry time of the alarm. + * @expires: the absolute expiry time. + * @function: alarm expiry callback function + * + * The alarm structure must be initialized by alarm_init() + * + */ + +struct alarm { + struct rb_node node; + enum android_alarm_type type; + ktime_t softexpires; + ktime_t expires; + void (*function)(struct alarm *); +}; + +void alarm_init(struct alarm *alarm, + enum android_alarm_type type, void (*function)(struct alarm *)); +void alarm_start_range(struct alarm *alarm, ktime_t start, ktime_t end); +int alarm_try_to_cancel(struct alarm *alarm); +int alarm_cancel(struct alarm *alarm); +ktime_t alarm_get_elapsed_realtime(void); + +/* set rtc while preserving elapsed realtime */ +int alarm_set_rtc(const struct timespec ts); + +#endif + +enum android_alarm_return_flags { + ANDROID_ALARM_RTC_WAKEUP_MASK = 1U << ANDROID_ALARM_RTC_WAKEUP, + ANDROID_ALARM_RTC_MASK = 1U << ANDROID_ALARM_RTC, + ANDROID_ALARM_ELAPSED_REALTIME_WAKEUP_MASK = + 1U << ANDROID_ALARM_ELAPSED_REALTIME_WAKEUP, + ANDROID_ALARM_ELAPSED_REALTIME_MASK = + 1U << ANDROID_ALARM_ELAPSED_REALTIME, + ANDROID_ALARM_SYSTEMTIME_MASK = 1U << ANDROID_ALARM_SYSTEMTIME, + ANDROID_ALARM_TIME_CHANGE_MASK = 1U << 16 +}; + +/* Disable alarm */ +#define ANDROID_ALARM_CLEAR(type) _IO('a', 0 | ((type) << 4)) + +/* Ack last alarm and wait for next */ +#define ANDROID_ALARM_WAIT _IO('a', 1) + +#define ALARM_IOW(c, type, size) _IOW('a', (c) | ((type) << 4), size) +/* Set alarm */ +#define ANDROID_ALARM_SET(type) ALARM_IOW(2, type, struct timespec) +#define ANDROID_ALARM_SET_AND_WAIT(type) ALARM_IOW(3, type, struct timespec) +#define ANDROID_ALARM_GET_TIME(type) ALARM_IOW(4, type, struct timespec) +#define ANDROID_ALARM_SET_RTC _IOW('a', 5, struct timespec) +#define ANDROID_ALARM_BASE_CMD(cmd) (cmd & ~(_IOC(0, 0, 0xf0, 0))) +#define ANDROID_ALARM_IOCTL_TO_TYPE(cmd) (_IOC_NR(cmd) >> 4) + +#endif diff --git a/include/linux/android_pmem.h b/include/linux/android_pmem.h new file mode 100644 index 000000000000..f633621f5be3 --- /dev/null +++ b/include/linux/android_pmem.h @@ -0,0 +1,93 @@ +/* include/linux/android_pmem.h + * + * Copyright (C) 2007 Google, Inc. + * + * This software is licensed under the terms of the GNU General Public + * License version 2, as published by the Free Software Foundation, and + * may be copied, distributed, and modified under those terms. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + */ + +#ifndef _ANDROID_PMEM_H_ +#define _ANDROID_PMEM_H_ + +#define PMEM_IOCTL_MAGIC 'p' +#define PMEM_GET_PHYS _IOW(PMEM_IOCTL_MAGIC, 1, unsigned int) +#define PMEM_MAP _IOW(PMEM_IOCTL_MAGIC, 2, unsigned int) +#define PMEM_GET_SIZE _IOW(PMEM_IOCTL_MAGIC, 3, unsigned int) +#define PMEM_UNMAP _IOW(PMEM_IOCTL_MAGIC, 4, unsigned int) +/* This ioctl will allocate pmem space, backing the file, it will fail + * if the file already has an allocation, pass it the len as the argument + * to the ioctl */ +#define PMEM_ALLOCATE _IOW(PMEM_IOCTL_MAGIC, 5, unsigned int) +/* This will connect a one pmem file to another, pass the file that is already + * backed in memory as the argument to the ioctl + */ +#define PMEM_CONNECT _IOW(PMEM_IOCTL_MAGIC, 6, unsigned int) +/* Returns the total size of the pmem region it is sent to as a pmem_region + * struct (with offset set to 0). + */ +#define PMEM_GET_TOTAL_SIZE _IOW(PMEM_IOCTL_MAGIC, 7, unsigned int) +#define PMEM_CACHE_FLUSH _IOW(PMEM_IOCTL_MAGIC, 8, unsigned int) + +struct android_pmem_platform_data +{ + const char* name; + /* starting physical address of memory region */ + unsigned long start; + /* size of memory region */ + unsigned long size; + /* set to indicate the region should not be managed with an allocator */ + unsigned no_allocator; + /* set to indicate maps of this region should be cached, if a mix of + * cached and uncached is desired, set this and open the device with + * O_SYNC to get an uncached region */ + unsigned cached; + /* The MSM7k has bits to enable a write buffer in the bus controller*/ + unsigned buffered; +}; + +struct pmem_region { + unsigned long offset; + unsigned long len; +}; + +#ifdef CONFIG_ANDROID_PMEM +int is_pmem_file(struct file *file); +int get_pmem_file(int fd, unsigned long *start, unsigned long *vstart, + unsigned long *end, struct file **filp); +int get_pmem_user_addr(struct file *file, unsigned long *start, + unsigned long *end); +void put_pmem_file(struct file* file); +void flush_pmem_file(struct file *file, unsigned long start, unsigned long len); +int pmem_setup(struct android_pmem_platform_data *pdata, + long (*ioctl)(struct file *, unsigned int, unsigned long), + int (*release)(struct inode *, struct file *)); +int pmem_remap(struct pmem_region *region, struct file *file, + unsigned operation); + +#else +static inline int is_pmem_file(struct file *file) { return 0; } +static inline int get_pmem_file(int fd, unsigned long *start, + unsigned long *vstart, unsigned long *end, + struct file **filp) { return -ENOSYS; } +static inline int get_pmem_user_addr(struct file *file, unsigned long *start, + unsigned long *end) { return -ENOSYS; } +static inline void put_pmem_file(struct file* file) { return; } +static inline void flush_pmem_file(struct file *file, unsigned long start, + unsigned long len) { return; } +static inline int pmem_setup(struct android_pmem_platform_data *pdata, + long (*ioctl)(struct file *, unsigned int, unsigned long), + int (*release)(struct inode *, struct file *)) { return -ENOSYS; } + +static inline int pmem_remap(struct pmem_region *region, struct file *file, + unsigned operation) { return -ENOSYS; } +#endif + +#endif //_ANDROID_PPP_H_ + diff --git a/include/linux/ashmem.h b/include/linux/ashmem.h new file mode 100644 index 000000000000..1976b10ef93e --- /dev/null +++ b/include/linux/ashmem.h @@ -0,0 +1,48 @@ +/* + * include/linux/ashmem.h + * + * Copyright 2008 Google Inc. + * Author: Robert Love + * + * This file is dual licensed. It may be redistributed and/or modified + * under the terms of the Apache 2.0 License OR version 2 of the GNU + * General Public License. + */ + +#ifndef _LINUX_ASHMEM_H +#define _LINUX_ASHMEM_H + +#include <linux/limits.h> +#include <linux/ioctl.h> + +#define ASHMEM_NAME_LEN 256 + +#define ASHMEM_NAME_DEF "dev/ashmem" + +/* Return values from ASHMEM_PIN: Was the mapping purged while unpinned? */ +#define ASHMEM_NOT_PURGED 0 +#define ASHMEM_WAS_PURGED 1 + +/* Return values from ASHMEM_GET_PIN_STATUS: Is the mapping pinned? */ +#define ASHMEM_IS_UNPINNED 0 +#define ASHMEM_IS_PINNED 1 + +struct ashmem_pin { + __u32 offset; /* offset into region, in bytes, page-aligned */ + __u32 len; /* length forward from offset, in bytes, page-aligned */ +}; + +#define __ASHMEMIOC 0x77 + +#define ASHMEM_SET_NAME _IOW(__ASHMEMIOC, 1, char[ASHMEM_NAME_LEN]) +#define ASHMEM_GET_NAME _IOR(__ASHMEMIOC, 2, char[ASHMEM_NAME_LEN]) +#define ASHMEM_SET_SIZE _IOW(__ASHMEMIOC, 3, size_t) +#define ASHMEM_GET_SIZE _IO(__ASHMEMIOC, 4) +#define ASHMEM_SET_PROT_MASK _IOW(__ASHMEMIOC, 5, unsigned long) +#define ASHMEM_GET_PROT_MASK _IO(__ASHMEMIOC, 6) +#define ASHMEM_PIN _IOW(__ASHMEMIOC, 7, struct ashmem_pin) +#define ASHMEM_UNPIN _IOW(__ASHMEMIOC, 8, struct ashmem_pin) +#define ASHMEM_GET_PIN_STATUS _IO(__ASHMEMIOC, 9) +#define ASHMEM_PURGE_ALL_CACHES _IO(__ASHMEMIOC, 10) + +#endif /* _LINUX_ASHMEM_H */ diff --git a/include/linux/bq27x00.h b/include/linux/bq27x00.h new file mode 100644 index 000000000000..b95cd2035238 --- /dev/null +++ b/include/linux/bq27x00.h @@ -0,0 +1,30 @@ +/* + * include/linux/bq27x00.h + * + * BQ27x00 battery driver + * + * Copyright (c) 2011, NVIDIA Corporation. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + * more details. + * + * You should have received a copy of the GNU General Public License along + * with this program; if not, write to the Free Software Foundation, Inc., + * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, USA. + */ + +#ifndef _LINUX_BQ27x00_H +#define _LINUX_BQ27x00_H + +struct bq27x00_platform_data { + int ac_persent_gpio; +}; + +#endif /* _LINUX_BQ27x00_H */ diff --git a/include/linux/cgroup.h b/include/linux/cgroup.h index da7e4bc34e8c..cefedc8ced97 100644 --- a/include/linux/cgroup.h +++ b/include/linux/cgroup.h @@ -84,12 +84,6 @@ enum { CSS_REMOVED, /* This CSS is dead */ }; -/* Caller must verify that the css is not for root cgroup */ -static inline void __css_get(struct cgroup_subsys_state *css, int count) -{ - atomic_add(count, &css->refcnt); -} - /* * Call css_get() to hold a reference on the css; it can be used * for a reference obtained via: @@ -97,6 +91,7 @@ static inline void __css_get(struct cgroup_subsys_state *css, int count) * - task->cgroups for a locked task */ +extern void __css_get(struct cgroup_subsys_state *css, int count); static inline void css_get(struct cgroup_subsys_state *css) { /* We don't need to reference count the root state */ @@ -143,10 +138,7 @@ static inline void css_put(struct cgroup_subsys_state *css) enum { /* Control Group is dead */ CGRP_REMOVED, - /* - * Control Group has previously had a child cgroup or a task, - * but no longer (only if CGRP_NOTIFY_ON_RELEASE is set) - */ + /* Control Group has ever had a child cgroup or a task */ CGRP_RELEASABLE, /* Control Group requires release notifications to userspace */ CGRP_NOTIFY_ON_RELEASE, @@ -287,6 +279,7 @@ struct css_set { /* For RCU-protected deletion */ struct rcu_head rcu_head; + struct work_struct work; }; /* @@ -466,6 +459,7 @@ struct cgroup_subsys { struct cgroup *cgrp); int (*pre_destroy)(struct cgroup_subsys *ss, struct cgroup *cgrp); void (*destroy)(struct cgroup_subsys *ss, struct cgroup *cgrp); + int (*allow_attach)(struct cgroup *cgrp, struct task_struct *tsk); int (*can_attach)(struct cgroup_subsys *ss, struct cgroup *cgrp, struct task_struct *tsk); int (*can_attach_task)(struct cgroup *cgrp, struct task_struct *tsk); diff --git a/include/linux/cpu.h b/include/linux/cpu.h index b1a635acf72a..54d948ec49ab 100644 --- a/include/linux/cpu.h +++ b/include/linux/cpu.h @@ -207,4 +207,11 @@ static inline int disable_nonboot_cpus(void) { return 0; } static inline void enable_nonboot_cpus(void) {} #endif /* !CONFIG_PM_SLEEP_SMP */ +#define IDLE_START 1 +#define IDLE_END 2 + +void idle_notifier_register(struct notifier_block *n); +void idle_notifier_unregister(struct notifier_block *n); +void idle_notifier_call_chain(unsigned long val); + #endif /* _LINUX_CPU_H_ */ diff --git a/include/linux/cpuacct.h b/include/linux/cpuacct.h new file mode 100644 index 000000000000..8f68e733fe19 --- /dev/null +++ b/include/linux/cpuacct.h @@ -0,0 +1,43 @@ +/* include/linux/cpuacct.h + * + * Copyright (C) 2010 Google, Inc. + * + * This software is licensed under the terms of the GNU General Public + * License version 2, as published by the Free Software Foundation, and + * may be copied, distributed, and modified under those terms. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + */ + +#ifndef _CPUACCT_H_ +#define _CPUACCT_H_ + +#include <linux/cgroup.h> + +#ifdef CONFIG_CGROUP_CPUACCT + +/* + * Platform specific CPU frequency hooks for cpuacct. These functions are + * called from the scheduler. + */ +struct cpuacct_charge_calls { + /* + * Platforms can take advantage of this data and use + * per-cpu allocations if necessary. + */ + void (*init) (void **cpuacct_data); + void (*charge) (void *cpuacct_data, u64 cputime, unsigned int cpu); + void (*cpufreq_show) (void *cpuacct_data, struct cgroup_map_cb *cb); + /* Returns power consumed in milliWatt seconds */ + u64 (*power_usage) (void *cpuacct_data); +}; + +int cpuacct_charge_register(struct cpuacct_charge_calls *fn); + +#endif /* CONFIG_CGROUP_CPUACCT */ + +#endif // _CPUACCT_H_ diff --git a/include/linux/cpufreq.h b/include/linux/cpufreq.h index 6216115c7789..c6126b9fb7cf 100644 --- a/include/linux/cpufreq.h +++ b/include/linux/cpufreq.h @@ -363,6 +363,9 @@ extern struct cpufreq_governor cpufreq_gov_ondemand; #elif defined(CONFIG_CPU_FREQ_DEFAULT_GOV_CONSERVATIVE) extern struct cpufreq_governor cpufreq_gov_conservative; #define CPUFREQ_DEFAULT_GOVERNOR (&cpufreq_gov_conservative) +#elif defined(CONFIG_CPU_FREQ_DEFAULT_GOV_INTERACTIVE) +extern struct cpufreq_governor cpufreq_gov_interactive; +#define CPUFREQ_DEFAULT_GOVERNOR (&cpufreq_gov_interactive) #endif diff --git a/include/linux/earlysuspend.h b/include/linux/earlysuspend.h new file mode 100644 index 000000000000..8343b817af31 --- /dev/null +++ b/include/linux/earlysuspend.h @@ -0,0 +1,56 @@ +/* include/linux/earlysuspend.h + * + * Copyright (C) 2007-2008 Google, Inc. + * + * This software is licensed under the terms of the GNU General Public + * License version 2, as published by the Free Software Foundation, and + * may be copied, distributed, and modified under those terms. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + */ + +#ifndef _LINUX_EARLYSUSPEND_H +#define _LINUX_EARLYSUSPEND_H + +#ifdef CONFIG_HAS_EARLYSUSPEND +#include <linux/list.h> +#endif + +/* The early_suspend structure defines suspend and resume hooks to be called + * when the user visible sleep state of the system changes, and a level to + * control the order. They can be used to turn off the screen and input + * devices that are not used for wakeup. + * Suspend handlers are called in low to high level order, resume handlers are + * called in the opposite order. If, when calling register_early_suspend, + * the suspend handlers have already been called without a matching call to the + * resume handlers, the suspend handler will be called directly from + * register_early_suspend. This direct call can violate the normal level order. + */ +enum { + EARLY_SUSPEND_LEVEL_BLANK_SCREEN = 50, + EARLY_SUSPEND_LEVEL_STOP_DRAWING = 100, + EARLY_SUSPEND_LEVEL_DISABLE_FB = 150, +}; +struct early_suspend { +#ifdef CONFIG_HAS_EARLYSUSPEND + struct list_head link; + int level; + void (*suspend)(struct early_suspend *h); + void (*resume)(struct early_suspend *h); +#endif +}; + +#ifdef CONFIG_HAS_EARLYSUSPEND +void register_early_suspend(struct early_suspend *handler); +void unregister_early_suspend(struct early_suspend *handler); +#else +#define register_early_suspend(handler) do { } while (0) +#define unregister_early_suspend(handler) do { } while (0) +#endif + +#endif + diff --git a/include/linux/fb.h b/include/linux/fb.h index 1d6836c498dd..bb565a4c2e1c 100644 --- a/include/linux/fb.h +++ b/include/linux/fb.h @@ -226,6 +226,19 @@ struct fb_bitfield { #define FB_VMODE_SMOOTH_XPAN 512 /* smooth xpan possible (internally used) */ #define FB_VMODE_CONUPDATE 512 /* don't update x/yoffset */ +#define FB_FLAG_RATIO_4_3 64 +#define FB_FLAG_RATIO_16_9 128 +#define FB_FLAG_PIXEL_REPEAT 256 + +/* + * Stereo modes + */ +#define FB_VMODE_STEREO_NONE 0x00000000 /* not stereo */ +#define FB_VMODE_STEREO_FRAME_PACK 0x01000000 /* frame packing */ +#define FB_VMODE_STEREO_TOP_BOTTOM 0x02000000 /* top-bottom */ +#define FB_VMODE_STEREO_LEFT_RIGHT 0x04000000 /* left-right */ +#define FB_VMODE_STEREO_MASK 0xFF000000 + /* * Display rotation support */ @@ -439,6 +452,8 @@ struct file; #define FB_MISC_PRIM_COLOR 1 #define FB_MISC_1ST_DETAIL 2 /* First Detailed Timing is preferred */ +#define FB_MISC_HDMI 4 /* display supports HDMI signaling */ + struct fb_chroma { __u32 redx; /* in fraction of 1024 */ __u32 greenx; @@ -1104,6 +1119,7 @@ extern unsigned char *fb_ddc_read(struct i2c_adapter *adapter); /* drivers/video/modedb.c */ #define VESA_MODEDB_SIZE 34 +#define CEA_MODEDB_SIZE 65 extern void fb_var_to_videomode(struct fb_videomode *mode, const struct fb_var_screeninfo *var); extern void fb_videomode_to_var(struct fb_var_screeninfo *var, @@ -1156,7 +1172,7 @@ struct fb_videomode { extern const char *fb_mode_option; extern const struct fb_videomode vesa_modes[]; -extern const struct fb_videomode cea_modes[64]; +extern const struct fb_videomode cea_modes[]; struct fb_modelist { struct list_head list; diff --git a/include/linux/fsl_devices.h b/include/linux/fsl_devices.h index fffdf00f87b9..1962102d132e 100644 --- a/include/linux/fsl_devices.h +++ b/include/linux/fsl_devices.h @@ -58,6 +58,13 @@ enum fsl_usb2_phy_modes { FSL_USB2_PHY_SERIAL, }; +enum fsl_usb2_phy_types { + FSL_USB2_PHY_TYPE_UTMIP = 1, + FSL_USB2_PHY_TYPE_ULPI = 2, + FSL_USB2_PHY_TYPE_HSIC = 3, + FSL_USB2_PHY_TYPE_ICUSB = 4, +}; + struct clk; struct platform_device; @@ -72,7 +79,6 @@ struct fsl_usb2_platform_data { void (*exit)(struct platform_device *); void __iomem *regs; /* ioremap'd register base */ struct clk *clk; - unsigned power_budget; /* hcd->power_budget */ unsigned big_endian_mmio:1; unsigned big_endian_desc:1; unsigned es:1; /* need USBMODE:ES */ @@ -95,6 +101,9 @@ struct fsl_usb2_platform_data { u32 pm_configured_flag; u32 pm_portsc; u32 pm_usbgenctrl; + + void *phy_config; + enum fsl_usb2_phy_types usb_phy_type; }; /* Flags in fsl_usb2_mph_platform_data */ diff --git a/include/linux/gpio_event.h b/include/linux/gpio_event.h new file mode 100644 index 000000000000..2613fc5e4a93 --- /dev/null +++ b/include/linux/gpio_event.h @@ -0,0 +1,170 @@ +/* include/linux/gpio_event.h + * + * Copyright (C) 2007 Google, Inc. + * + * This software is licensed under the terms of the GNU General Public + * License version 2, as published by the Free Software Foundation, and + * may be copied, distributed, and modified under those terms. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + */ + +#ifndef _LINUX_GPIO_EVENT_H +#define _LINUX_GPIO_EVENT_H + +#include <linux/input.h> + +struct gpio_event_input_devs { + int count; + struct input_dev *dev[]; +}; +enum { + GPIO_EVENT_FUNC_UNINIT = 0x0, + GPIO_EVENT_FUNC_INIT = 0x1, + GPIO_EVENT_FUNC_SUSPEND = 0x2, + GPIO_EVENT_FUNC_RESUME = 0x3, +}; +struct gpio_event_info { + int (*func)(struct gpio_event_input_devs *input_devs, + struct gpio_event_info *info, + void **data, int func); + int (*event)(struct gpio_event_input_devs *input_devs, + struct gpio_event_info *info, + void **data, unsigned int dev, unsigned int type, + unsigned int code, int value); /* out events */ + bool no_suspend; +}; + +struct gpio_event_platform_data { + const char *name; + struct gpio_event_info **info; + size_t info_count; + int (*power)(const struct gpio_event_platform_data *pdata, bool on); + const char *names[]; /* If name is NULL, names contain a NULL */ + /* terminated list of input devices to create */ +}; + +#define GPIO_EVENT_DEV_NAME "gpio-event" + +/* Key matrix */ + +enum gpio_event_matrix_flags { + /* unset: drive active output low, set: drive active output high */ + GPIOKPF_ACTIVE_HIGH = 1U << 0, + GPIOKPF_DEBOUNCE = 1U << 1, + GPIOKPF_REMOVE_SOME_PHANTOM_KEYS = 1U << 2, + GPIOKPF_REMOVE_PHANTOM_KEYS = GPIOKPF_REMOVE_SOME_PHANTOM_KEYS | + GPIOKPF_DEBOUNCE, + GPIOKPF_DRIVE_INACTIVE = 1U << 3, + GPIOKPF_LEVEL_TRIGGERED_IRQ = 1U << 4, + GPIOKPF_PRINT_UNMAPPED_KEYS = 1U << 16, + GPIOKPF_PRINT_MAPPED_KEYS = 1U << 17, + GPIOKPF_PRINT_PHANTOM_KEYS = 1U << 18, +}; + +#define MATRIX_CODE_BITS (10) +#define MATRIX_KEY_MASK ((1U << MATRIX_CODE_BITS) - 1) +#define MATRIX_KEY(dev, code) \ + (((dev) << MATRIX_CODE_BITS) | (code & MATRIX_KEY_MASK)) + +extern int gpio_event_matrix_func(struct gpio_event_input_devs *input_devs, + struct gpio_event_info *info, void **data, int func); +struct gpio_event_matrix_info { + /* initialize to gpio_event_matrix_func */ + struct gpio_event_info info; + /* size must be ninputs * noutputs */ + const unsigned short *keymap; + unsigned int *input_gpios; + unsigned int *output_gpios; + unsigned int ninputs; + unsigned int noutputs; + /* time to wait before reading inputs after driving each output */ + ktime_t settle_time; + /* time to wait before scanning the keypad a second time */ + ktime_t debounce_delay; + ktime_t poll_time; + unsigned flags; +}; + +/* Directly connected inputs and outputs */ + +enum gpio_event_direct_flags { + GPIOEDF_ACTIVE_HIGH = 1U << 0, +/* GPIOEDF_USE_DOWN_IRQ = 1U << 1, */ +/* GPIOEDF_USE_IRQ = (1U << 2) | GPIOIDF_USE_DOWN_IRQ, */ + GPIOEDF_PRINT_KEYS = 1U << 8, + GPIOEDF_PRINT_KEY_DEBOUNCE = 1U << 9, + GPIOEDF_PRINT_KEY_UNSTABLE = 1U << 10, +}; + +struct gpio_event_direct_entry { + uint32_t gpio:16; + uint32_t code:10; + uint32_t dev:6; +}; + +/* inputs */ +extern int gpio_event_input_func(struct gpio_event_input_devs *input_devs, + struct gpio_event_info *info, void **data, int func); +struct gpio_event_input_info { + /* initialize to gpio_event_input_func */ + struct gpio_event_info info; + ktime_t debounce_time; + ktime_t poll_time; + uint16_t flags; + uint16_t type; + const struct gpio_event_direct_entry *keymap; + size_t keymap_size; +}; + +/* outputs */ +extern int gpio_event_output_func(struct gpio_event_input_devs *input_devs, + struct gpio_event_info *info, void **data, int func); +extern int gpio_event_output_event(struct gpio_event_input_devs *input_devs, + struct gpio_event_info *info, void **data, + unsigned int dev, unsigned int type, + unsigned int code, int value); +struct gpio_event_output_info { + /* initialize to gpio_event_output_func and gpio_event_output_event */ + struct gpio_event_info info; + uint16_t flags; + uint16_t type; + const struct gpio_event_direct_entry *keymap; + size_t keymap_size; +}; + + +/* axes */ + +enum gpio_event_axis_flags { + GPIOEAF_PRINT_UNKNOWN_DIRECTION = 1U << 16, + GPIOEAF_PRINT_RAW = 1U << 17, + GPIOEAF_PRINT_EVENT = 1U << 18, +}; + +extern int gpio_event_axis_func(struct gpio_event_input_devs *input_devs, + struct gpio_event_info *info, void **data, int func); +struct gpio_event_axis_info { + /* initialize to gpio_event_axis_func */ + struct gpio_event_info info; + uint8_t count; /* number of gpios for this axis */ + uint8_t dev; /* device index when using multiple input devices */ + uint8_t type; /* EV_REL or EV_ABS */ + uint16_t code; + uint16_t decoded_size; + uint16_t (*map)(struct gpio_event_axis_info *info, uint16_t in); + uint32_t *gpio; + uint32_t flags; +}; +#define gpio_axis_2bit_gray_map gpio_axis_4bit_gray_map +#define gpio_axis_3bit_gray_map gpio_axis_4bit_gray_map +uint16_t gpio_axis_4bit_gray_map( + struct gpio_event_axis_info *info, uint16_t in); +uint16_t gpio_axis_5bit_singletrack_map( + struct gpio_event_axis_info *info, uint16_t in); + +#endif diff --git a/include/linux/gpio_keys.h b/include/linux/gpio_keys.h index b5ca4b2c08ec..d944b2ee3d3b 100644 --- a/include/linux/gpio_keys.h +++ b/include/linux/gpio_keys.h @@ -23,6 +23,7 @@ struct gpio_keys_platform_data { int (*enable)(struct device *dev); void (*disable)(struct device *dev); const char *name; /* input device name */ + int (*wakeup_key)(void); }; #endif diff --git a/include/linux/gpio_scrollwheel.h b/include/linux/gpio_scrollwheel.h new file mode 100644 index 000000000000..33d17a0199ea --- /dev/null +++ b/include/linux/gpio_scrollwheel.h @@ -0,0 +1,46 @@ +/* + * Copyright (c) 2010, NVIDIA Corporation. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + * more details. + * + * You should have received a copy of the GNU General Public License along + * with this program; if not, write to the Free Software Foundation, Inc., + * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, USA. + */ + +#ifndef _GPIO_SCROLLWHEEL_H +#define _GPIO_SCROLLWHEEL_H + +#define GPIO_SCROLLWHEEL_PIN_ONOFF 0 +#define GPIO_SCROLLWHEEL_PIN_PRESS 1 +#define GPIO_SCROLLWHEEL_PIN_ROT1 2 +#define GPIO_SCROLLWHEEL_PIN_ROT2 3 +#define GPIO_SCROLLWHEEL_PIN_MAX 4 + +struct gpio_scrollwheel_button { + /* Configuration parameters */ + int pinaction; /* GPIO_SCROLLWHEEL_PIN_* */ + int gpio; + char *desc; + int active_low; + int debounce_interval; /* debounce ticks interval in msecs */ +}; + +struct gpio_scrollwheel_platform_data { + struct gpio_scrollwheel_button *buttons; + int nbuttons; + unsigned int rep:1; /* enable input subsystem auto repeat */ + int (*enable)(struct device *dev); + void (*disable)(struct device *dev); +}; + +#endif + diff --git a/include/linux/hid.h b/include/linux/hid.h index 9cf8e7ae7450..ab64d4768f65 100644 --- a/include/linux/hid.h +++ b/include/linux/hid.h @@ -598,6 +598,8 @@ struct hid_usage_id { * @input_mapping: invoked on input registering before mapping an usage * @input_mapped: invoked on input registering after mapping an usage * @feature_mapping: invoked on feature registering + * @input_register: called just before input device is registered after reports + * are parsed. * @suspend: invoked on suspend (NULL means nop) * @resume: invoked on resume if device was not reset (NULL means nop) * @reset_resume: invoked on resume if device was reset (NULL means nop) @@ -644,6 +646,8 @@ struct hid_driver { void (*feature_mapping)(struct hid_device *hdev, struct hid_field *field, struct hid_usage *usage); + int (*input_register)(struct hid_device *hdev, struct hid_input + *hidinput); #ifdef CONFIG_PM int (*suspend)(struct hid_device *hdev, pm_message_t message); int (*resume)(struct hid_device *hdev); diff --git a/include/linux/i2c-slave.h b/include/linux/i2c-slave.h new file mode 100755 index 000000000000..34df64f73f6f --- /dev/null +++ b/include/linux/i2c-slave.h @@ -0,0 +1,259 @@ +/* + * i2c-slave.h - definitions for the i2c-slave-bus interface + * + * Copyright (c) 2009-2011, NVIDIA Corporation. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + * more details. + * + * You should have received a copy of the GNU General Public License along + * with this program; if not, write to the Free Software Foundation, Inc., + * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, USA. + */ + +/* ------------------------------------------------------------------------- */ + +#ifndef _LINUX_I2C_SLAVE_H +#define _LINUX_I2C_SLAVE_H + +#include <linux/types.h> +#ifdef __KERNEL__ +/* --- General options ------------------------------------------------ */ + +struct i2c_client; +struct i2c_slave_algorithm; +struct i2c_slave_adapter; +#if defined(CONFIG_I2C_SLAVE) && defined(CONFIG_I2C) + +/** + * i2c_slave_send - Sends data to master. When master issues a read cycle, the + * data is sent by the slave. + * This function copies the client data into the slave tx buffer and return to + * client. This is not a blocking call. Data will be sent to master later once + * slave got the master-ready cycle transfer. + * if there is no sufficient space to write the client buffer, it will return + * error. it will not write partial data. + * @client: Handle to i2c-slave client. + * @buf: Data that will be written to the master + * @count: How many bytes to write. + * + * Returns negative errno, or else the number of bytes written. + */ +extern int i2c_slave_send(struct i2c_client *client, const char *buf, + int count); + +/** + * i2c_slave_get_tx_status - Get amount of data available in tx buffer. If there + * is still data in tx buffer then wait for given time to transfer complete + * for a give timeout. + * @client: Handle to i2c-slave client. + * @timeout_ms: Time to wait for transfer to complete. + * + * Returns negative errno, or else the number of bytes remaining in tx buffer. + */ +extern int i2c_slave_get_tx_status(struct i2c_client *client, int timeout_ms); + +/** + * i2c_slave_recv - Receive data from master. The data received from master is + * stored on slave rx buffer. When this api will be called, the data will be + * copied from the slave rx buffer to client buffer. If requested amount (count) + * of data is not available then it will wait for either min_count to be receive + * or timeout whatever first. + * + * if timeout_ms = 0, then wait for min_count data to be read. + * if timoue_ms non zero then wait for the data till timeout happen. + * @client: Handle to i2c-slave client. + * @buf: Data that will be read from the master + * @count: How many bytes to read. + * @min_count: Block till read min_count of data. + * @timeout_ms: Time to wait for read to be complete. + * + * Returns negative errno, or else the number of bytes read. + */ +extern int i2c_slave_recv(struct i2c_client *client, char *buf, int count, + int min_count, int timeout_ms); + +/** + * i2c_slave_start - Start the i2c slave to receive/transmit data. + * After this i2c controller starts responding master. + * The dummy-char will send to master if there is no data to send on slave tx + * buffer. + * @client: Handle to i2c-slave client. + * @dummy_char: Data which will be send to master if there is no data to be send + * in slave tx buffer. + * + * Returns negative errno, or else 0 for success. + */ +extern int i2c_slave_start(struct i2c_client *client, unsigned char dummy_char); + +/** + * i2c_slave_stop - Stop slave to receive/transmit data. + * After this i2c controller stops responding master. + * @client: Handle to i2c-slave client. + * @is_buffer_clear: Reset the tx and rx slave buffer or not. + */ +extern void i2c_slave_stop(struct i2c_client *client, int is_buffer_clear); + +/** + * i2c_slave_flush_buffer - Flush the receive and transmit buffer. + * @client: Handle to i2c-slave client. + * @is_flush_tx_buffer: Reset the tx slave buffer or not. + * @is_flush_rx_buffer: Reset the rx slave buffer or not. + * + * Returns negative errno, or else 0 for success. + */ +extern int i2c_slave_flush_buffer(struct i2c_client *client, + int is_flush_tx_buffer, int is_flush_rx_buffer); + +/** + * i2c_slave_get_nack_cycle - Get the number of master read cycle on which + * dummy char sent. This is the way to find that how much cycle slave sent the + * NACK packet. + * + * @client: Handle to i2c-slave client. + * @is_cout_reset: Reset the nack count or not. + * + * Returns negative errno, or else 0 for success. + */ +extern int i2c_slave_get_nack_cycle(struct i2c_client *client, + int is_cout_reset); + + +/** + * i2c_add_slave_adapter - Add slave adapter. + * + * @slv_adap: Slave adapter. + * @force_nr: Adapter number. + * + * Returns negative errno, or else 0 for success. + */ +extern int i2c_add_slave_adapter(struct i2c_slave_adapter *slv_adap, + bool force_nr); + +/** + * i2c_del_slave_adapter - Delete slave adapter. + * + * @slv_adap: Slave adapter. + * + * Returns negative errno, or else 0 for success. + */ +extern int i2c_del_slave_adapter(struct i2c_slave_adapter *slv_adap); + +#endif /* I2C_SLAVE */ + +/* + * i2c_slave_adapter is the structure used to identify a physical i2c bus along + * with the access algorithms necessary to access it. + */ +struct i2c_slave_adapter { + struct module *owner; + unsigned int id; + unsigned int class; /* classes to allow probing for */ + /* the algorithm to access the i2c-slave bus */ + const struct i2c_slave_algorithm *slv_algo; + void *algo_data; + void *parent_data; + + /* data fields that are valid for all devices */ + u8 level; /* nesting level for lockdep */ + struct mutex bus_lock; + + int timeout; /* in jiffies */ + int retries; + struct device *dev; /* the adapter device */ + struct device *parent_dev; /* the adapter device */ + + int nr; + char name[48]; + struct completion dev_released; +}; + +static inline void *i2c_get_slave_adapdata(const struct i2c_slave_adapter *dev) +{ + return dev_get_drvdata(dev->dev); +} + +static inline void i2c_set_slave_adapdata(struct i2c_slave_adapter *dev, + void *data) +{ + dev_set_drvdata(dev->dev, data); +} + +/* + * The following struct are for those who like to implement new i2c slave + * bus drivers: + * i2c_slave_algorithm is the interface to a class of hardware solutions which + * can be addressed using the same bus algorithms. + */ +struct i2c_slave_algorithm { + /* Start the slave to receive/transmit data. + * The dummy-char will send to master if there is no data to send on + * slave tx buffer. + */ + int (*slave_start)(struct i2c_slave_adapter *slv_adap, int addr, + int is_ten_bit_addr, unsigned char dummy_char); + + /* Stop slave to receive/transmit data. + * Required information to reset the slave rx and tx buffer to reset + * or not. + */ + void (*slave_stop)(struct i2c_slave_adapter *slv_adap, + int is_buffer_clear); + + /* + * Send data to master. The data will be copied on the slave tx buffer + * and will send to master once master initiates the master-read cycle. + * Function will return immediately once the buffer copied into slave + * tx buffer. + * Client will not wait till data is sent to master. + * This function will not copy data partially. If sufficient space is + * not available, it will return error. + */ + int (*slave_send)(struct i2c_slave_adapter *slv_adap, const char *buf, + int count); + + /* + * Get amount of data available in tx buffer. If there is still data in + * tx buffer wait for given time to get slave tx buffer emptied. + * returns number of data available in slave tx buffer. + */ + int (*slave_get_tx_status)(struct i2c_slave_adapter *slv_adap, + int timeout_ms); + + /* + * Receive data to master. The data received from master is stored on + * slave rx buffer. When this api will be called, the data will be + * coped from the slave rx buffer to client buffer. If requested (count) + * data is not available then it will wait for either min_count to be + * receive or timeout whatever first. + * + * if timeout_ms = 0, then wait for min_count data to be read. + * if timoue_ms non zero then wait for the data till timeout happen. + * returns number of bytes read as positive integer otherwise error. + */ + int (*slave_recv)(struct i2c_slave_adapter *slv_adap, char *buf, + int count, int min_count, int timeout_ms); + + /* Flush the receive and transmit buffer. + */ + int (*slave_flush_buffer)(struct i2c_slave_adapter *slv_adap, + int is_flush_tx_buffer, int is_flush_rx_buffer); + + /* Get the number of dummy char cycle. + * Get the number of master read cycle on which dummy character has + * been sent. + * This can be treat as NACK cycle from slave side. + * Pass option whether count need to be reset or not. + */ + int (*slave_get_nack_cycle)(struct i2c_slave_adapter *slv_adap, + int is_cout_reset); +}; +#endif /* __KERNEL__ */ +#endif /* _LINUX_I2C_SLAVE_H */ diff --git a/include/linux/i2c-tegra.h b/include/linux/i2c-tegra.h index 9c85da49857a..90dcddc52f29 100644 --- a/include/linux/i2c-tegra.h +++ b/include/linux/i2c-tegra.h @@ -4,6 +4,8 @@ * Copyright (C) 2010 Google, Inc. * Author: Colin Cross <ccross@android.com> * + * Copyright (C) 2010-2011 NVIDIA Corporation + * * This software is licensed under the terms of the GNU General Public * License version 2, as published by the Free Software Foundation, and * may be copied, distributed, and modified under those terms. @@ -18,8 +20,33 @@ #ifndef _LINUX_I2C_TEGRA_H #define _LINUX_I2C_TEGRA_H +#include <mach/pinmux.h> + +#define TEGRA_I2C_MAX_BUS 3 + struct tegra_i2c_platform_data { + int adapter_nr; + int bus_count; + const struct tegra_pingroup_config *bus_mux[TEGRA_I2C_MAX_BUS]; + int bus_mux_len[TEGRA_I2C_MAX_BUS]; + unsigned long bus_clk_rate[TEGRA_I2C_MAX_BUS]; + bool is_dvc; + bool is_clkon_always; + int retries; + int timeout; /* in jiffies */ + u16 slave_addr; + int scl_gpio[TEGRA_I2C_MAX_BUS]; + int sda_gpio[TEGRA_I2C_MAX_BUS]; + int (*arb_recovery)(int scl_gpio, int sda_gpio); +}; + +struct tegra_i2c_slave_platform_data { + int adapter_nr; + const struct tegra_pingroup_config *pinmux; + int bus_mux_len; unsigned long bus_clk_rate; + int max_rx_buffer_size; + int max_tx_buffer_size; }; #endif /* _LINUX_I2C_TEGRA_H */ diff --git a/include/linux/i2c.h b/include/linux/i2c.h index a6c652ef516d..0bd9ea2b62ea 100644 --- a/include/linux/i2c.h +++ b/include/linux/i2c.h @@ -540,6 +540,7 @@ struct i2c_msg { #define I2C_FUNC_SMBUS_WRITE_BLOCK_DATA 0x02000000 #define I2C_FUNC_SMBUS_READ_I2C_BLOCK 0x04000000 /* I2C-like block xfer */ #define I2C_FUNC_SMBUS_WRITE_I2C_BLOCK 0x08000000 /* w/ 1-byte reg. addr. */ +#define I2C_FUNC_I2C_SLAVE_SUPPORT 0x10000000 /* i2c slave support */ #define I2C_FUNC_SMBUS_BYTE (I2C_FUNC_SMBUS_READ_BYTE | \ I2C_FUNC_SMBUS_WRITE_BYTE) diff --git a/include/linux/i2c/atmel_mxt_ts.h b/include/linux/i2c/atmel_mxt_ts.h index f027f7a63511..29550c11f6dd 100644 --- a/include/linux/i2c/atmel_mxt_ts.h +++ b/include/linux/i2c/atmel_mxt_ts.h @@ -2,6 +2,8 @@ * Atmel maXTouch Touchscreen driver * * Copyright (C) 2010 Samsung Electronics Co.Ltd + * Copyright (C) 2011 Atmel Corporation + * Copyright (C) 2011 NVIDIA Corporation * Author: Joonyoung Shim <jy0922.shim@samsung.com> * * This program is free software; you can redistribute it and/or modify it @@ -15,6 +17,16 @@ #include <linux/types.h> +/* + * Atmel I2C addresses + */ +#define MXT224_I2C_ADDR1 0x4A +#define MXT224_I2C_ADDR2 0x4B +#define MXT1386_I2C_ADDR1 0x4C +#define MXT1386_I2C_ADDR2 0x4D +#define MXT1386_I2C_ADDR3 0x5A +#define MXT1386_I2C_ADDR4 0x5B + /* Orient */ #define MXT_NORMAL 0x0 #define MXT_DIAGONAL 0x1 @@ -39,6 +51,10 @@ struct mxt_platform_data { unsigned int voltage; unsigned char orient; unsigned long irqflags; + u8(*read_chg) (void); + unsigned long config_crc; + unsigned int actv_cycle_time; + unsigned int idle_cycle_time; }; #endif /* __LINUX_ATMEL_MXT_TS_H */ diff --git a/include/linux/i2c/panjit_ts.h b/include/linux/i2c/panjit_ts.h new file mode 100644 index 000000000000..1dd51e1ecae8 --- /dev/null +++ b/include/linux/i2c/panjit_ts.h @@ -0,0 +1,30 @@ +/* + * include/linux/i2c/panjit_ts.h + * + * Copyright (c) 2010, NVIDIA Corporation. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + * more details. + * + * You should have received a copy of the GNU General Public License along + * with this program; if not, write to the Free Software Foundation, Inc., + * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, USA. + */ + +#ifndef _LINUX_I2C_PANJIT_TS_H +#define _LINUX_I2C_PANJIT_TS_H + +struct device; + +struct panjit_i2c_ts_platform_data { + int gpio_reset; +}; + +#endif diff --git a/include/linux/i2c/twl.h b/include/linux/i2c/twl.h index 114c0f6fc63d..bb92f0b13288 100644 --- a/include/linux/i2c/twl.h +++ b/include/linux/i2c/twl.h @@ -82,6 +82,10 @@ #define TWL_MODULE_RTC TWL4030_MODULE_RTC #define TWL_MODULE_PWM TWL4030_MODULE_PWM0 +#define TWL6030_MODULE_CHARGER TWL4030_MODULE_MAIN_CHARGE +#define TWL6025_MODULE_CHARGER 0x18 + +#define TWL6030_MODULE_GASGAUGE 0x0B #define TWL6030_MODULE_ID0 0x0D #define TWL6030_MODULE_ID1 0x0E #define TWL6030_MODULE_ID2 0x0F @@ -108,6 +112,7 @@ #define GASGAUGE_INTR_OFFSET 17 #define USBOTG_INTR_OFFSET 4 #define CHARGER_INTR_OFFSET 2 +#define GPADCSW_INTR_OFFSET 1 #define RSV_INTR_OFFSET 0 /* INT register offsets */ @@ -172,6 +177,14 @@ TWL_CLASS_IS(4030, TWL4030_CLASS_ID) TWL_CLASS_IS(6030, TWL6030_CLASS_ID) #define TWL6025_SUBCLASS BIT(4) /* TWL6025 has changed registers */ +#define MPU80031_SUBCLASS BIT(5) /* MPU80031 has changed registers */ + +/* So we can recover the features in other parts of twl stack */ +unsigned int twl_features(void); + +/* so we can get at the EPROM SMPS OFFSET/MULT stuff */ +u8 twl_get_smps_offset(void); +u8 twl_get_smps_mult(void); /* * Read and write single 8-bit registers @@ -179,6 +192,8 @@ TWL_CLASS_IS(6030, TWL6030_CLASS_ID) int twl_i2c_write_u8(u8 mod_no, u8 val, u8 reg); int twl_i2c_read_u8(u8 mod_no, u8 *val, u8 reg); +void twl_reg_dump(int module, int start, int end); + /* * Read and write several 8-bit registers at once. * @@ -215,6 +230,10 @@ static inline int twl6030_mmc_card_detect(struct device *dev, int slot) return -EIO; } #endif + +int twl6030_set_usb_charge_enable(int enable); +int twl6030_set_usb_in_current(int currentmA); + /*----------------------------------------------------------------------*/ /* @@ -552,11 +571,27 @@ static inline int twl6030_mmc_card_detect(struct device *dev, int slot) struct twl4030_clock_init_data { bool ck32k_lowpwr_enable; + bool clk32_active_state_on; }; struct twl4030_bci_platform_data { int *battery_tmp_tbl; - unsigned int tblsize; + unsigned int battery_tmp_tblsize; + int *battery_volt_tbl; + unsigned int battery_volt_tblsize; + unsigned int monitoring_interval; + + unsigned int max_charger_currentmA; + unsigned int max_charger_voltagemV; + unsigned int termination_currentmA; + + unsigned int max_bat_voltagemV; + unsigned int low_bat_voltagemV; + + /* twl6025 */ + unsigned int use_hw_charger; + unsigned int use_eeprom_config; + unsigned int power_path; }; /* TWL4030_GPIO_MAX (18) GPIOs, with interrupts */ @@ -621,6 +656,7 @@ struct twl4030_usb_data { int (*phy_set_clock)(struct device *dev, int on); /* suspend/resume of phy */ int (*phy_suspend)(struct device *dev, int suspend); + int (*board_control_power)(struct device *dev, int on); }; struct twl4030_ins { @@ -696,6 +732,10 @@ struct twl4030_audio_data { struct twl4030_platform_data { unsigned irq_base, irq_end; + + /* Callback for boar regulator initialisation */ + int (*init)(void); + struct twl4030_clock_init_data *clock; struct twl4030_bci_platform_data *bci; struct twl4030_gpio_platform_data *gpio; @@ -822,6 +862,22 @@ static inline int twl4030charger_usb_en(int enable) { return 0; } #define TWL6030_REG_VDAC 45 #define TWL6030_REG_VUSB 46 +/* These are renamed in 6025 but same registers */ +#define TWL6025_REG_LDO2 48 +#define TWL6025_REG_LDO4 49 +#define TWL6025_REG_LDO3 50 +#define TWL6025_REG_LDO5 51 +#define TWL6025_REG_LDO1 52 +#define TWL6025_REG_LDO7 53 +#define TWL6025_REG_LDO6 54 +#define TWL6025_REG_LDOLN 55 +#define TWL6025_REG_LDOUSB 56 + +/* 6025 DCDC supplies */ +#define TWL6025_REG_SMPS3 57 +#define TWL6025_REG_SMPS4 58 +#define TWL6025_REG_VIO 59 + /* INTERNAL LDOs */ #define TWL6030_REG_VRTC 47 #define TWL6030_REG_CLK32KG 48 diff --git a/include/linux/if_pppolac.h b/include/linux/if_pppolac.h new file mode 100644 index 000000000000..c06bd6c8ba26 --- /dev/null +++ b/include/linux/if_pppolac.h @@ -0,0 +1,33 @@ +/* include/linux/if_pppolac.h + * + * Header for PPP on L2TP Access Concentrator / PPPoLAC Socket (RFC 2661) + * + * Copyright (C) 2009 Google, Inc. + * Author: Chia-chi Yeh <chiachi@android.com> + * + * This software is licensed under the terms of the GNU General Public + * License version 2, as published by the Free Software Foundation, and + * may be copied, distributed, and modified under those terms. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + */ + +#ifndef __LINUX_IF_PPPOLAC_H +#define __LINUX_IF_PPPOLAC_H + +#include <linux/socket.h> +#include <linux/types.h> + +struct sockaddr_pppolac { + sa_family_t sa_family; /* AF_PPPOX */ + unsigned int sa_protocol; /* PX_PROTO_OLAC */ + int udp_socket; + struct __attribute__((packed)) { + __u16 tunnel, session; + } local, remote; +} __attribute__((packed)); + +#endif /* __LINUX_IF_PPPOLAC_H */ diff --git a/include/linux/if_pppopns.h b/include/linux/if_pppopns.h new file mode 100644 index 000000000000..0cf34b4d551f --- /dev/null +++ b/include/linux/if_pppopns.h @@ -0,0 +1,32 @@ +/* include/linux/if_pppopns.h + * + * Header for PPP on PPTP Network Server / PPPoPNS Socket (RFC 2637) + * + * Copyright (C) 2009 Google, Inc. + * Author: Chia-chi Yeh <chiachi@android.com> + * + * This software is licensed under the terms of the GNU General Public + * License version 2, as published by the Free Software Foundation, and + * may be copied, distributed, and modified under those terms. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + */ + +#ifndef __LINUX_IF_PPPOPNS_H +#define __LINUX_IF_PPPOPNS_H + +#include <linux/socket.h> +#include <linux/types.h> + +struct sockaddr_pppopns { + sa_family_t sa_family; /* AF_PPPOX */ + unsigned int sa_protocol; /* PX_PROTO_OPNS */ + int tcp_socket; + __u16 local; + __u16 remote; +} __attribute__((packed)); + +#endif /* __LINUX_IF_PPPOPNS_H */ diff --git a/include/linux/if_pppox.h b/include/linux/if_pppox.h index 397921b09ef9..999ccd3fff37 100644 --- a/include/linux/if_pppox.h +++ b/include/linux/if_pppox.h @@ -27,6 +27,8 @@ #include <linux/ppp_channel.h> #endif /* __KERNEL__ */ #include <linux/if_pppol2tp.h> +#include <linux/if_pppolac.h> +#include <linux/if_pppopns.h> /* For user-space programs to pick up these definitions * which they wouldn't get otherwise without defining __KERNEL__ @@ -60,7 +62,9 @@ struct pptp_addr { #define PX_PROTO_OE 0 /* Currently just PPPoE */ #define PX_PROTO_OL2TP 1 /* Now L2TP also */ #define PX_PROTO_PPTP 2 -#define PX_MAX_PROTO 3 +#define PX_PROTO_OLAC 3 +#define PX_PROTO_OPNS 4 +#define PX_MAX_PROTO 5 struct sockaddr_pppox { sa_family_t sa_family; /* address family, AF_PPPOX */ @@ -167,6 +171,25 @@ struct pptp_opt { u32 seq_sent, seq_recv; int ppp_flags; }; + +struct pppolac_opt { + __u32 local; + __u32 remote; + __u32 recv_sequence; + __u32 xmit_sequence; + atomic_t sequencing; + int (*backlog_rcv)(struct sock *sk_udp, struct sk_buff *skb); +}; + +struct pppopns_opt { + __u16 local; + __u16 remote; + __u32 recv_sequence; + __u32 xmit_sequence; + void (*data_ready)(struct sock *sk_raw, int length); + int (*backlog_rcv)(struct sock *sk_raw, struct sk_buff *skb); +}; + #include <net/sock.h> struct pppox_sock { @@ -177,6 +200,8 @@ struct pppox_sock { union { struct pppoe_opt pppoe; struct pptp_opt pptp; + struct pppolac_opt lac; + struct pppopns_opt pns; } proto; __be16 num; }; diff --git a/include/linux/ina219.h b/include/linux/ina219.h new file mode 100644 index 000000000000..c27fa26c5759 --- /dev/null +++ b/include/linux/ina219.h @@ -0,0 +1,34 @@ +/* + * linux/include/linux/ina219.h + * + * Copyright (c) 2011, NVIDIA Corporation. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + * more details. + * + * You should have received a copy of the GNU General Public License along + * with this program; if not, write to the Free Software Foundation, Inc., + * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, USA. + */ + +#ifndef _INA219_H +#define _INA219_H + +#include <linux/types.h> + +struct ina219_platform_data { + u8 divisor; /*divisor needed to get current value */ + u32 calibration_data; + u32 power_lsb; + char rail_name[20]; +}; + +#endif /* _LINUX_INA219_H */ + diff --git a/include/linux/interrupt_keys.h b/include/linux/interrupt_keys.h new file mode 100755 index 000000000000..8be6e9a6b0a0 --- /dev/null +++ b/include/linux/interrupt_keys.h @@ -0,0 +1,47 @@ +/* + * include/linux/interrupt_keys.h + * + * Key driver for keys directly connected to intrrupt lines. + * + * Copyright (c) 2011, NVIDIA Corporation. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + * more details. + * + * You should have received a copy of the GNU General Public License along + * with this program; if not, write to the Free Software Foundation, Inc., + * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, USA. + */ + +#ifndef _INTERRUPT_KEYS_H +#define _INTERRUPT_KEYS_H + +struct interrupt_keys_button { + /* Configuration parameters */ + int code; /* input event code (KEY_*, SW_*) */ + int irq; + int active_low; + char *desc; + int type; /* input event type (EV_KEY, EV_SW) */ + int wakeup; /* configure the interrupt source as a wake-up + * source */ + int debounce_interval; /* debounce ticks interval in msecs */ + bool can_disable; +}; + +struct interrupt_keys_platform_data { + struct interrupt_keys_button *int_buttons; + int nbuttons; + unsigned int rep:1; /* enable input subsystem auto repeat */ + int (*enable)(struct device *dev); + void (*disable)(struct device *dev); +}; + +#endif diff --git a/include/linux/ion.h b/include/linux/ion.h new file mode 100644 index 000000000000..aed8349279ed --- /dev/null +++ b/include/linux/ion.h @@ -0,0 +1,344 @@ +/* + * include/linux/ion.h + * + * Copyright (C) 2011 Google, Inc. + * + * This software is licensed under the terms of the GNU General Public + * License version 2, as published by the Free Software Foundation, and + * may be copied, distributed, and modified under those terms. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + */ + +#ifndef _LINUX_ION_H +#define _LINUX_ION_H + +#include <linux/types.h> + +struct ion_handle; +/** + * enum ion_heap_types - list of all possible types of heaps + * @ION_HEAP_TYPE_SYSTEM: memory allocated via vmalloc + * @ION_HEAP_TYPE_SYSTEM_CONTIG: memory allocated via kmalloc + * @ION_HEAP_TYPE_CARVEOUT: memory allocated from a prereserved + * carveout heap, allocations are physically + * contiguous + * @ION_HEAP_END: helper for iterating over heaps + */ +enum ion_heap_type { + ION_HEAP_TYPE_SYSTEM, + ION_HEAP_TYPE_SYSTEM_CONTIG, + ION_HEAP_TYPE_CARVEOUT, + ION_HEAP_TYPE_CUSTOM, /* must be last so device specific heaps always + are at the end of this enum */ + ION_NUM_HEAPS, +}; + +#define ION_HEAP_SYSTEM_MASK (1 << ION_HEAP_TYPE_SYSTEM) +#define ION_HEAP_SYSTEM_CONTIG_MASK (1 << ION_HEAP_TYPE_SYSTEM_CONTIG) +#define ION_HEAP_CARVEOUT_MASK (1 << ION_HEAP_TYPE_CARVEOUT) + +#ifdef __KERNEL__ +struct ion_device; +struct ion_heap; +struct ion_mapper; +struct ion_client; +struct ion_buffer; + +/* This should be removed some day when phys_addr_t's are fully + plumbed in the kernel, and all instances of ion_phys_addr_t should + be converted to phys_addr_t. For the time being many kernel interfaces + do not accept phys_addr_t's that would have to */ +#define ion_phys_addr_t unsigned long + +/** + * struct ion_platform_heap - defines a heap in the given platform + * @type: type of the heap from ion_heap_type enum + * @id: unique identifier for heap. When allocating (lower numbers + * will be allocated from first) + * @name: used for debug purposes + * @base: base address of heap in physical memory if applicable + * @size: size of the heap in bytes if applicable + * + * Provided by the board file. + */ +struct ion_platform_heap { + enum ion_heap_type type; + unsigned int id; + const char *name; + ion_phys_addr_t base; + size_t size; +}; + +/** + * struct ion_platform_data - array of platform heaps passed from board file + * @nr: number of structures in the array + * @heaps: array of platform_heap structions + * + * Provided by the board file in the form of platform data to a platform device. + */ +struct ion_platform_data { + int nr; + struct ion_platform_heap heaps[]; +}; + +/** + * ion_client_create() - allocate a client and returns it + * @dev: the global ion device + * @heap_mask: mask of heaps this client can allocate from + * @name: used for debugging + */ +struct ion_client *ion_client_create(struct ion_device *dev, + unsigned int heap_mask, const char *name); + +/** + * ion_client_destroy() - free's a client and all it's handles + * @client: the client + * + * Free the provided client and all it's resources including + * any handles it is holding. + */ +void ion_client_destroy(struct ion_client *client); + +/** + * ion_alloc - allocate ion memory + * @client: the client + * @len: size of the allocation + * @align: requested allocation alignment, lots of hardware blocks have + * alignment requirements of some kind + * @flags: mask of heaps to allocate from, if multiple bits are set + * heaps will be tried in order from lowest to highest order bit + * + * Allocate memory in one of the heaps provided in heap mask and return + * an opaque handle to it. + */ +struct ion_handle *ion_alloc(struct ion_client *client, size_t len, + size_t align, unsigned int flags); + +/** + * ion_free - free a handle + * @client: the client + * @handle: the handle to free + * + * Free the provided handle. + */ +void ion_free(struct ion_client *client, struct ion_handle *handle); + +/** + * ion_phys - returns the physical address and len of a handle + * @client: the client + * @handle: the handle + * @addr: a pointer to put the address in + * @len: a pointer to put the length in + * + * This function queries the heap for a particular handle to get the + * handle's physical address. It't output is only correct if + * a heap returns physically contiguous memory -- in other cases + * this api should not be implemented -- ion_map_dma should be used + * instead. Returns -EINVAL if the handle is invalid. This has + * no implications on the reference counting of the handle -- + * the returned value may not be valid if the caller is not + * holding a reference. + */ +int ion_phys(struct ion_client *client, struct ion_handle *handle, + ion_phys_addr_t *addr, size_t *len); + +/** + * ion_map_kernel - create mapping for the given handle + * @client: the client + * @handle: handle to map + * + * Map the given handle into the kernel and return a kernel address that + * can be used to access this address. + */ +void *ion_map_kernel(struct ion_client *client, struct ion_handle *handle); + +/** + * ion_unmap_kernel() - destroy a kernel mapping for a handle + * @client: the client + * @handle: handle to unmap + */ +void ion_unmap_kernel(struct ion_client *client, struct ion_handle *handle); + +/** + * ion_map_dma - create a dma mapping for a given handle + * @client: the client + * @handle: handle to map + * + * Return an sglist describing the given handle + */ +struct scatterlist *ion_map_dma(struct ion_client *client, + struct ion_handle *handle); + +/** + * ion_unmap_dma() - destroy a dma mapping for a handle + * @client: the client + * @handle: handle to unmap + */ +void ion_unmap_dma(struct ion_client *client, struct ion_handle *handle); + +/** + * ion_share() - given a handle, obtain a buffer to pass to other clients + * @client: the client + * @handle: the handle to share + * + * Given a handle, return a buffer, which exists in a global name + * space, and can be passed to other clients. Should be passed into ion_import + * to obtain a new handle for this buffer. + * + * NOTE: This function does do not an extra reference. The burden is on the + * caller to make sure the buffer doesn't go away while it's being passed to + * another client. That is, ion_free should not be called on this handle until + * the buffer has been imported into the other client. + */ +struct ion_buffer *ion_share(struct ion_client *client, + struct ion_handle *handle); + +/** + * ion_import() - given an buffer in another client, import it + * @client: this blocks client + * @buffer: the buffer to import (as obtained from ion_share) + * + * Given a buffer, add it to the client and return the handle to use to refer + * to it further. This is called to share a handle from one kernel client to + * another. + */ +struct ion_handle *ion_import(struct ion_client *client, + struct ion_buffer *buffer); + +/** + * ion_import_fd() - given an fd obtained via ION_IOC_SHARE ioctl, import it + * @client: this blocks client + * @fd: the fd + * + * A helper function for drivers that will be recieving ion buffers shared + * with them from userspace. These buffers are represented by a file + * descriptor obtained as the return from the ION_IOC_SHARE ioctl. + * This function coverts that fd into the underlying buffer, and returns + * the handle to use to refer to it further. + */ +struct ion_handle *ion_import_fd(struct ion_client *client, int fd); +#endif /* __KERNEL__ */ + +/** + * DOC: Ion Userspace API + * + * create a client by opening /dev/ion + * most operations handled via following ioctls + * + */ + +/** + * struct ion_allocation_data - metadata passed from userspace for allocations + * @len: size of the allocation + * @align: required alignment of the allocation + * @flags: flags passed to heap + * @handle: pointer that will be populated with a cookie to use to refer + * to this allocation + * + * Provided by userspace as an argument to the ioctl + */ +struct ion_allocation_data { + size_t len; + size_t align; + unsigned int flags; + struct ion_handle *handle; +}; + +/** + * struct ion_fd_data - metadata passed to/from userspace for a handle/fd pair + * @handle: a handle + * @fd: a file descriptor representing that handle + * + * For ION_IOC_SHARE or ION_IOC_MAP userspace populates the handle field with + * the handle returned from ion alloc, and the kernel returns the file + * descriptor to share or map in the fd field. For ION_IOC_IMPORT, userspace + * provides the file descriptor and the kernel returns the handle. + */ +struct ion_fd_data { + struct ion_handle *handle; + int fd; +}; + +/** + * struct ion_handle_data - a handle passed to/from the kernel + * @handle: a handle + */ +struct ion_handle_data { + struct ion_handle *handle; +}; + +/** + * struct ion_custom_data - metadata passed to/from userspace for a custom ioctl + * @cmd: the custom ioctl function to call + * @arg: additional data to pass to the custom ioctl, typically a user + * pointer to a predefined structure + * + * This works just like the regular cmd and arg fields of an ioctl. + */ +struct ion_custom_data { + unsigned int cmd; + unsigned long arg; +}; + +#define ION_IOC_MAGIC 'I' + +/** + * DOC: ION_IOC_ALLOC - allocate memory + * + * Takes an ion_allocation_data struct and returns it with the handle field + * populated with the opaque handle for the allocation. + */ +#define ION_IOC_ALLOC _IOWR(ION_IOC_MAGIC, 0, \ + struct ion_allocation_data) + +/** + * DOC: ION_IOC_FREE - free memory + * + * Takes an ion_handle_data struct and frees the handle. + */ +#define ION_IOC_FREE _IOWR(ION_IOC_MAGIC, 1, struct ion_handle_data) + +/** + * DOC: ION_IOC_MAP - get a file descriptor to mmap + * + * Takes an ion_fd_data struct with the handle field populated with a valid + * opaque handle. Returns the struct with the fd field set to a file + * descriptor open in the current address space. This file descriptor + * can then be used as an argument to mmap. + */ +#define ION_IOC_MAP _IOWR(ION_IOC_MAGIC, 2, struct ion_fd_data) + +/** + * DOC: ION_IOC_SHARE - creates a file descriptor to use to share an allocation + * + * Takes an ion_fd_data struct with the handle field populated with a valid + * opaque handle. Returns the struct with the fd field set to a file + * descriptor open in the current address space. This file descriptor + * can then be passed to another process. The corresponding opaque handle can + * be retrieved via ION_IOC_IMPORT. + */ +#define ION_IOC_SHARE _IOWR(ION_IOC_MAGIC, 4, struct ion_fd_data) + +/** + * DOC: ION_IOC_IMPORT - imports a shared file descriptor + * + * Takes an ion_fd_data struct with the fd field populated with a valid file + * descriptor obtained from ION_IOC_SHARE and returns the struct with the handle + * filed set to the corresponding opaque handle. + */ +#define ION_IOC_IMPORT _IOWR(ION_IOC_MAGIC, 5, int) + +/** + * DOC: ION_IOC_CUSTOM - call architecture specific ion ioctl + * + * Takes the argument of the architecture specific ioctl to call and + * passes appropriate userdata for that ioctl + */ +#define ION_IOC_CUSTOM _IOWR(ION_IOC_MAGIC, 6, struct ion_custom_data) + +#endif /* _LINUX_ION_H */ diff --git a/include/linux/kernel.h b/include/linux/kernel.h index 46ac9a50528d..54bf5a471e1c 100644 --- a/include/linux/kernel.h +++ b/include/linux/kernel.h @@ -744,4 +744,7 @@ struct sysinfo { char _f[20-2*sizeof(long)-sizeof(int)]; /* Padding: libc5 uses this.. */ }; +/* To identify board information in panic logs, set this */ +extern char *mach_panic_string; + #endif diff --git a/include/linux/keychord.h b/include/linux/keychord.h new file mode 100644 index 000000000000..856a5850217b --- /dev/null +++ b/include/linux/keychord.h @@ -0,0 +1,52 @@ +/* + * Key chord input driver + * + * Copyright (C) 2008 Google, Inc. + * Author: Mike Lockwood <lockwood@android.com> + * + * This software is licensed under the terms of the GNU General Public + * License version 2, as published by the Free Software Foundation, and + * may be copied, distributed, and modified under those terms. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * +*/ + +#ifndef __LINUX_KEYCHORD_H_ +#define __LINUX_KEYCHORD_H_ + +#include <linux/input.h> + +#define KEYCHORD_VERSION 1 + +/* + * One or more input_keychord structs are written to /dev/keychord + * at once to specify the list of keychords to monitor. + * Reading /dev/keychord returns the id of a keychord when the + * keychord combination is pressed. A keychord is signalled when + * all of the keys in the keycode list are in the pressed state. + * The order in which the keys are pressed does not matter. + * The keychord will not be signalled if keys not in the keycode + * list are pressed. + * Keychords will not be signalled on key release events. + */ +struct input_keychord { + /* should be KEYCHORD_VERSION */ + __u16 version; + /* + * client specified ID, returned from read() + * when this keychord is pressed. + */ + __u16 id; + + /* number of keycodes in this keychord */ + __u16 count; + + /* variable length array of keycodes */ + __u16 keycodes[]; +}; + +#endif /* __LINUX_KEYCHORD_H_ */ diff --git a/include/linux/keyreset.h b/include/linux/keyreset.h new file mode 100644 index 000000000000..a2ac49e5b684 --- /dev/null +++ b/include/linux/keyreset.h @@ -0,0 +1,28 @@ +/* + * include/linux/keyreset.h - platform data structure for resetkeys driver + * + * Copyright (C) 2008 Google, Inc. + * + * This software is licensed under the terms of the GNU General Public + * License version 2, as published by the Free Software Foundation, and + * may be copied, distributed, and modified under those terms. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + */ + +#ifndef _LINUX_KEYRESET_H +#define _LINUX_KEYRESET_H + +#define KEYRESET_NAME "keyreset" + +struct keyreset_platform_data { + int (*reset_fn)(void); + int *keys_up; + int keys_down[]; /* 0 terminated */ +}; + +#endif /* _LINUX_KEYRESET_H */ diff --git a/include/linux/mfd/max77663-core.h b/include/linux/mfd/max77663-core.h new file mode 100644 index 000000000000..1edaf7aaaf4d --- /dev/null +++ b/include/linux/mfd/max77663-core.h @@ -0,0 +1,173 @@ +/* + * include/linux/mfd/max77663-core.h + * + * Copyright 2011 Maxim Integrated Products, Inc. + * Copyright (C) 2011 NVIDIA Corporation + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of the + * License, or (at your option) any later version. + * + */ + +#ifndef __LINUX_MFD_MAX77663_CORE_H__ +#define __LINUX_MFD_MAX77663_CORE_H__ + +#include <linux/irq.h> +#include <linux/mfd/core.h> + +/* + * Interrupts + */ +enum { + MAX77663_IRQ_LBT_LB, /* Low-Battery */ + MAX77663_IRQ_LBT_THERM_ALRM1, /* Thermal alarm status, > 120C */ + MAX77663_IRQ_LBT_THERM_ALRM2, /* Thermal alarm status, > 140C */ + + MAX77663_IRQ_GPIO0, /* GPIO0 edge detection */ + MAX77663_IRQ_GPIO1, /* GPIO1 edge detection */ + MAX77663_IRQ_GPIO2, /* GPIO2 edge detection */ + MAX77663_IRQ_GPIO3, /* GPIO3 edge detection */ + MAX77663_IRQ_GPIO4, /* GPIO4 edge detection */ + MAX77663_IRQ_GPIO5, /* GPIO5 edge detection */ + MAX77663_IRQ_GPIO6, /* GPIO6 edge detection */ + MAX77663_IRQ_GPIO7, /* GPIO7 edge detection */ + + MAX77663_IRQ_ONOFF_HRDPOWRN, /* Hard power off warnning */ + MAX77663_IRQ_ONOFF_EN0_1SEC, /* EN0 active for 1s */ + MAX77663_IRQ_ONOFF_EN0_FALLING, /* EN0 falling */ + MAX77663_IRQ_ONOFF_EN0_RISING, /* EN0 rising */ + MAX77663_IRQ_ONOFF_LID_FALLING, /* LID falling */ + MAX77663_IRQ_ONOFF_LID_RISING, /* LID rising */ + MAX77663_IRQ_ONOFF_ACOK_FALLING,/* ACOK falling */ + MAX77663_IRQ_ONOFF_ACOK_RISING, /* ACOK rising */ + + MAX77663_IRQ_RTC, /* RTC */ + MAX77663_IRQ_SD_PF, /* SD power fail */ + MAX77663_IRQ_LDO_PF, /* LDO power fail */ + MAX77663_IRQ_32K, /* 32kHz oscillator */ + MAX77663_IRQ_NVER, /* Non-Volatile Event Recorder */ + + MAX77663_IRQ_NR, +}; + +/* + *GPIOs + */ +enum { + MAX77663_GPIO0, + MAX77663_GPIO1, + MAX77663_GPIO2, + MAX77663_GPIO3, + MAX77663_GPIO4, + MAX77663_GPIO5, + MAX77663_GPIO6, + MAX77663_GPIO7, + + MAX77663_GPIO_NR, +}; + +/* Direction */ +enum max77663_gpio_dir { + GPIO_DIR_DEF, + GPIO_DIR_IN, + GPIO_DIR_OUT, +}; + +/* Data output */ +enum max77663_gpio_data_out { + GPIO_DOUT_DEF, + GPIO_DOUT_HIGH, + GPIO_DOUT_LOW, +}; + +/* Output drive */ +enum max77663_gpio_out_drv { + GPIO_OUT_DRV_DEF, + GPIO_OUT_DRV_PUSH_PULL, + GPIO_OUT_DRV_OPEN_DRAIN, +}; + +/* Pull-up */ +enum max77663_gpio_pull_up { + GPIO_PU_DEF, + GPIO_PU_ENABLE, + GPIO_PU_DISABLE, +}; + +/* Pull-down */ +enum max77663_gpio_pull_down { + GPIO_PD_DEF, + GPIO_PD_ENABLE, + GPIO_PD_DISABLE, +}; + +/* Alternate */ +enum max77663_gpio_alt { + GPIO_ALT_DEF, + GPIO_ALT_ENABLE, + GPIO_ALT_DISABLE, +}; + +struct max77663_gpio_config { + int gpio; /* gpio number */ + enum max77663_gpio_dir dir; + enum max77663_gpio_data_out dout; + enum max77663_gpio_out_drv out_drv; + enum max77663_gpio_pull_up pull_up; + enum max77663_gpio_pull_down pull_down; + enum max77663_gpio_alt alternate; +}; + +struct max77663_platform_data { + int irq_base; + int gpio_base; + + int num_gpio_cfgs; + struct max77663_gpio_config *gpio_cfgs; + + int num_subdevs; + struct mfd_cell *sub_devices; +}; + +#if defined(CONFIG_MFD_MAX77663) +int max77663_read(struct device *dev, u8 addr, void *values, u32 len, + bool is_rtc); +int max77663_write(struct device *dev, u8 addr, void *values, u32 len, + bool is_rtc); +int max77663_set_bits(struct device *dev, u8 addr, u8 mask, u8 value, + bool is_rtc); +int max77663_power_off(void); +int max77663_gpio_set_alternate(int gpio, int alternate); +#else +static inline int max77663_read(struct device *dev, u8 addr, void *values, + u32 len, bool is_rtc) +{ + return 0; +} + +static inline int max77663_write(struct device *dev, u8 addr, void *values, + u32 len, bool is_rtc) +{ + return 0; +} + +static inline int max77663_set_bits(struct device *dev, u8 addr, u8 mask, + u8 value, bool is_rtc) +{ + return 0; +} + +static inline int max77663_power_off(void) +{ + return 0; +} + +static inline int max77663_gpio_set_alternate(int gpio, int alternate) +{ + return 0; +} +#endif /* defined(CONFIG_MFD_MAX77663) */ + +#endif /* __LINUX_MFD_MAX77663_CORE_H__ */ diff --git a/include/linux/mfd/max8907c.h b/include/linux/mfd/max8907c.h new file mode 100644 index 000000000000..76dbdcc03046 --- /dev/null +++ b/include/linux/mfd/max8907c.h @@ -0,0 +1,259 @@ +/* linux/mfd/max8907c.h + * + * Functions to access MAX8907C power management chip. + * + * Copyright (C) 2010 Gyungoh Yoo <jack.yoo@maxim-ic.com> + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + */ + +#ifndef __LINUX_MFD_MAX8907C_H +#define __LINUX_MFD_MAX8907C_H + +/* MAX8907C register map */ +#define MAX8907C_REG_SYSENSEL 0x00 +#define MAX8907C_REG_ON_OFF_IRQ1 0x01 +#define MAX8907C_REG_ON_OFF_IRQ1_MASK 0x02 +#define MAX8907C_REG_ON_OFF_STAT 0x03 +#define MAX8907C_REG_SDCTL1 0x04 +#define MAX8907C_REG_SDSEQCNT1 0x05 +#define MAX8907C_REG_SDV1 0x06 +#define MAX8907C_REG_SDCTL2 0x07 +#define MAX8907C_REG_SDSEQCNT2 0x08 +#define MAX8907C_REG_SDV2 0x09 +#define MAX8907C_REG_SDCTL3 0x0A +#define MAX8907C_REG_SDSEQCNT3 0x0B +#define MAX8907C_REG_SDV3 0x0C +#define MAX8907C_REG_ON_OFF_IRQ2 0x0D +#define MAX8907C_REG_ON_OFF_IRQ2_MASK 0x0E +#define MAX8907C_REG_RESET_CNFG 0x0F +#define MAX8907C_REG_LDOCTL16 0x10 +#define MAX8907C_REG_LDOSEQCNT16 0x11 +#define MAX8907C_REG_LDO16VOUT 0x12 +#define MAX8907C_REG_SDBYSEQCNT 0x13 +#define MAX8907C_REG_LDOCTL17 0x14 +#define MAX8907C_REG_LDOSEQCNT17 0x15 +#define MAX8907C_REG_LDO17VOUT 0x16 +#define MAX8907C_REG_LDOCTL1 0x18 +#define MAX8907C_REG_LDOSEQCNT1 0x19 +#define MAX8907C_REG_LDO1VOUT 0x1A +#define MAX8907C_REG_LDOCTL2 0x1C +#define MAX8907C_REG_LDOSEQCNT2 0x1D +#define MAX8907C_REG_LDO2VOUT 0x1E +#define MAX8907C_REG_LDOCTL3 0x20 +#define MAX8907C_REG_LDOSEQCNT3 0x21 +#define MAX8907C_REG_LDO3VOUT 0x22 +#define MAX8907C_REG_LDOCTL4 0x24 +#define MAX8907C_REG_LDOSEQCNT4 0x25 +#define MAX8907C_REG_LDO4VOUT 0x26 +#define MAX8907C_REG_LDOCTL5 0x28 +#define MAX8907C_REG_LDOSEQCNT5 0x29 +#define MAX8907C_REG_LDO5VOUT 0x2A +#define MAX8907C_REG_LDOCTL6 0x2C +#define MAX8907C_REG_LDOSEQCNT6 0x2D +#define MAX8907C_REG_LDO6VOUT 0x2E +#define MAX8907C_REG_LDOCTL7 0x30 +#define MAX8907C_REG_LDOSEQCNT7 0x31 +#define MAX8907C_REG_LDO7VOUT 0x32 +#define MAX8907C_REG_LDOCTL8 0x34 +#define MAX8907C_REG_LDOSEQCNT8 0x35 +#define MAX8907C_REG_LDO8VOUT 0x36 +#define MAX8907C_REG_LDOCTL9 0x38 +#define MAX8907C_REG_LDOSEQCNT9 0x39 +#define MAX8907C_REG_LDO9VOUT 0x3A +#define MAX8907C_REG_LDOCTL10 0x3C +#define MAX8907C_REG_LDOSEQCNT10 0x3D +#define MAX8907C_REG_LDO10VOUT 0x3E +#define MAX8907C_REG_LDOCTL11 0x40 +#define MAX8907C_REG_LDOSEQCNT11 0x41 +#define MAX8907C_REG_LDO11VOUT 0x42 +#define MAX8907C_REG_LDOCTL12 0x44 +#define MAX8907C_REG_LDOSEQCNT12 0x45 +#define MAX8907C_REG_LDO12VOUT 0x46 +#define MAX8907C_REG_LDOCTL13 0x48 +#define MAX8907C_REG_LDOSEQCNT13 0x49 +#define MAX8907C_REG_LDO13VOUT 0x4A +#define MAX8907C_REG_LDOCTL14 0x4C +#define MAX8907C_REG_LDOSEQCNT14 0x4D +#define MAX8907C_REG_LDO14VOUT 0x4E +#define MAX8907C_REG_LDOCTL15 0x50 +#define MAX8907C_REG_LDOSEQCNT15 0x51 +#define MAX8907C_REG_LDO15VOUT 0x52 +#define MAX8907C_REG_OUT5VEN 0x54 +#define MAX8907C_REG_OUT5VSEQ 0x55 +#define MAX8907C_REG_OUT33VEN 0x58 +#define MAX8907C_REG_OUT33VSEQ 0x59 +#define MAX8907C_REG_LDOCTL19 0x5C +#define MAX8907C_REG_LDOSEQCNT19 0x5D +#define MAX8907C_REG_LDO19VOUT 0x5E +#define MAX8907C_REG_LBCNFG 0x60 +#define MAX8907C_REG_SEQ1CNFG 0x64 +#define MAX8907C_REG_SEQ2CNFG 0x65 +#define MAX8907C_REG_SEQ3CNFG 0x66 +#define MAX8907C_REG_SEQ4CNFG 0x67 +#define MAX8907C_REG_SEQ5CNFG 0x68 +#define MAX8907C_REG_SEQ6CNFG 0x69 +#define MAX8907C_REG_SEQ7CNFG 0x6A +#define MAX8907C_REG_LDOCTL18 0x72 +#define MAX8907C_REG_LDOSEQCNT18 0x73 +#define MAX8907C_REG_LDO18VOUT 0x74 +#define MAX8907C_REG_BBAT_CNFG 0x78 +#define MAX8907C_REG_CHG_CNTL1 0x7C +#define MAX8907C_REG_CHG_CNTL2 0x7D +#define MAX8907C_REG_CHG_IRQ1 0x7E +#define MAX8907C_REG_CHG_IRQ2 0x7F +#define MAX8907C_REG_CHG_IRQ1_MASK 0x80 +#define MAX8907C_REG_CHG_IRQ2_MASK 0x81 +#define MAX8907C_REG_CHG_STAT 0x82 +#define MAX8907C_REG_WLED_MODE_CNTL 0x84 +#define MAX8907C_REG_ILED_CNTL 0x84 +#define MAX8907C_REG_II1RR 0x8E +#define MAX8907C_REG_II2RR 0x8F +#define MAX8907C_REG_LDOCTL20 0x9C +#define MAX8907C_REG_LDOSEQCNT20 0x9D +#define MAX8907C_REG_LDO20VOUT 0x9E + +/* RTC register */ +#define MAX8907C_REG_RTC_SEC 0x00 +#define MAX8907C_REG_RTC_MIN 0x01 +#define MAX8907C_REG_RTC_HOURS 0x02 +#define MAX8907C_REG_RTC_WEEKDAY 0x03 +#define MAX8907C_REG_RTC_DATE 0x04 +#define MAX8907C_REG_RTC_MONTH 0x05 +#define MAX8907C_REG_RTC_YEAR1 0x06 +#define MAX8907C_REG_RTC_YEAR2 0x07 +#define MAX8907C_REG_ALARM0_SEC 0x08 +#define MAX8907C_REG_ALARM0_MIN 0x09 +#define MAX8907C_REG_ALARM0_HOURS 0x0A +#define MAX8907C_REG_ALARM0_WEEKDAY 0x0B +#define MAX8907C_REG_ALARM0_DATE 0x0C +#define MAX8907C_REG_ALARM0_MONTH 0x0D +#define MAX8907C_REG_ALARM0_YEAR1 0x0E +#define MAX8907C_REG_ALARM0_YEAR2 0x0F +#define MAX8907C_REG_ALARM1_SEC 0x10 +#define MAX8907C_REG_ALARM1_MIN 0x11 +#define MAX8907C_REG_ALARM1_HOURS 0x12 +#define MAX8907C_REG_ALARM1_WEEKDAY 0x13 +#define MAX8907C_REG_ALARM1_DATE 0x14 +#define MAX8907C_REG_ALARM1_MONTH 0x15 +#define MAX8907C_REG_ALARM1_YEAR1 0x16 +#define MAX8907C_REG_ALARM1_YEAR2 0x17 +#define MAX8907C_REG_ALARM0_CNTL 0x18 +#define MAX8907C_REG_ALARM1_CNTL 0x19 +#define MAX8907C_REG_RTC_STATUS 0x1A +#define MAX8907C_REG_RTC_CNTL 0x1B +#define MAX8907C_REG_RTC_IRQ 0x1C +#define MAX8907C_REG_RTC_IRQ_MASK 0x1D +#define MAX8907C_REG_MPL_CNTL 0x1E + +/* ADC and Touch Screen Controller register map */ + +#define MAX8907C_CTL 0 +#define MAX8907C_SEQCNT 1 +#define MAX8907C_VOUT 2 + +/* mask bit fields */ +#define MAX8907C_MASK_LDO_SEQ 0x1C +#define MAX8907C_MASK_LDO_EN 0x01 +#define MAX8907C_MASK_VBBATTCV 0x03 +#define MAX8907C_MASK_OUT5V_VINEN 0x10 +#define MAX8907C_MASK_OUT5V_ENSRC 0x0E +#define MAX8907C_MASK_OUT5V_EN 0x01 + +/* Power off bit in RESET_CNFG reg */ +#define MAX8907C_MASK_POWER_OFF 0x40 + +#define MAX8907C_MASK_PWR_EN 0x80 +#define MAX8907C_MASK_CTL_SEQ 0x1C + +#define MAX8907C_PWR_EN 0x80 +#define MAX8907C_CTL_SEQ 0x04 + +#define MAX8907C_SD_SEQ1 0x02 +#define MAX8907C_SD_SEQ2 0x06 + +#define MAX8907C_DELAY_CNT0 0x00 + +#define MAX8907C_POWER_UP_DELAY_CNT1 0x10 +#define MAX8907C_POWER_UP_DELAY_CNT12 0xC0 + +#define MAX8907C_POWER_DOWN_DELAY_CNT12 0x0C + +#define RTC_I2C_ADDR 0x68 + +/* + * MAX8907B revision requires s/w WAR to connect PWREN input to + * sequencer 2 because of the bug in the silicon. + */ +#define MAX8907B_II2RR_PWREN_WAR (0x12) + +/* Defines common for all supplies PWREN sequencer selection */ +#define MAX8907B_SEQSEL_PWREN_LXX 1 /* SEQ2 (PWREN) */ + +/* IRQ definitions */ +enum { + MAX8907C_IRQ_VCHG_DC_OVP, + MAX8907C_IRQ_VCHG_DC_F, + MAX8907C_IRQ_VCHG_DC_R, + MAX8907C_IRQ_VCHG_THM_OK_R, + MAX8907C_IRQ_VCHG_THM_OK_F, + MAX8907C_IRQ_VCHG_MBATTLOW_F, + MAX8907C_IRQ_VCHG_MBATTLOW_R, + MAX8907C_IRQ_VCHG_RST, + MAX8907C_IRQ_VCHG_DONE, + MAX8907C_IRQ_VCHG_TOPOFF, + MAX8907C_IRQ_VCHG_TMR_FAULT, + MAX8907C_IRQ_GPM_RSTIN, + MAX8907C_IRQ_GPM_MPL, + MAX8907C_IRQ_GPM_SW_3SEC, + MAX8907C_IRQ_GPM_EXTON_F, + MAX8907C_IRQ_GPM_EXTON_R, + MAX8907C_IRQ_GPM_SW_1SEC, + MAX8907C_IRQ_GPM_SW_F, + MAX8907C_IRQ_GPM_SW_R, + MAX8907C_IRQ_GPM_SYSCKEN_F, + MAX8907C_IRQ_GPM_SYSCKEN_R, + MAX8907C_IRQ_RTC_ALARM1, + MAX8907C_IRQ_RTC_ALARM0, + MAX8907C_NR_IRQS, +}; + +struct max8907c { + struct device *dev; + struct mutex io_lock; + struct mutex irq_lock; + struct i2c_client *i2c_power; + struct i2c_client *i2c_rtc; + int irq_base; + int core_irq; + + unsigned char cache_chg[2]; + unsigned char cache_on[2]; + unsigned char cache_rtc; + +}; + +struct max8907c_platform_data { + int num_subdevs; + struct platform_device **subdevs; + int irq_base; + int (*max8907c_setup)(void); +}; + +int max8907c_reg_read(struct i2c_client *i2c, u8 reg); +int max8907c_reg_bulk_read(struct i2c_client *i2c, u8 reg, u8 count, u8 *val); +int max8907c_reg_write(struct i2c_client *i2c, u8 reg, u8 val); +int max8907c_reg_bulk_write(struct i2c_client *i2c, u8 reg, u8 count, u8 *val); +int max8907c_set_bits(struct i2c_client *i2c, u8 reg, u8 mask, u8 val); + +int max8907c_irq_init(struct max8907c *chip, int irq, int irq_base); +void max8907c_irq_free(struct max8907c *chip); +int max8907c_suspend(struct i2c_client *i2c, pm_message_t state); +int max8907c_resume(struct i2c_client *i2c); +int max8907c_power_off(void); +void max8907c_deep_sleep(int enter); +int max8907c_pwr_en_config(void); +int max8907c_pwr_en_attach(void); +#endif diff --git a/include/linux/mfd/ricoh583.h b/include/linux/mfd/ricoh583.h new file mode 100644 index 000000000000..4e38cded0fa5 --- /dev/null +++ b/include/linux/mfd/ricoh583.h @@ -0,0 +1,164 @@ +/* include/linux/mfd/ricoh583.h + * + * Core driver interface to access RICOH583 power management chip. + * + * Copyright (C) 2011 NVIDIA Corporation + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + * more details. + * + * You should have received a copy of the GNU General Public License along + * with this program; if not, write to the Free Software Foundation, Inc., + * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, USA. + * + */ + +#ifndef __LINUX_MFD_RICOH583_H +#define __LINUX_MFD_RICOH583_H + +#include <linux/rtc.h> +/* RICOH583 IRQ definitions */ +enum { + RICOH583_IRQ_ONKEY, + RICOH583_IRQ_ACOK, + RICOH583_IRQ_LIDOPEN, + RICOH583_IRQ_PREOT, + RICOH583_IRQ_CLKSTP, + RICOH583_IRQ_ONKEY_OFF, + RICOH583_IRQ_WD, + RICOH583_IRQ_EN_PWRREQ1, + RICOH583_IRQ_EN_PWRREQ2, + RICOH583_IRQ_PRE_VINDET, + + RICOH583_IRQ_DC0LIM, + RICOH583_IRQ_DC1LIM, + RICOH583_IRQ_DC2LIM, + RICOH583_IRQ_DC3LIM, + + RICOH583_IRQ_CTC, + RICOH583_IRQ_YALE, + RICOH583_IRQ_DALE, + RICOH583_IRQ_WALE, + + RICOH583_IRQ_AIN1L, + RICOH583_IRQ_AIN2L, + RICOH583_IRQ_AIN3L, + RICOH583_IRQ_VBATL, + RICOH583_IRQ_VIN3L, + RICOH583_IRQ_VIN8L, + RICOH583_IRQ_AIN1H, + RICOH583_IRQ_AIN2H, + RICOH583_IRQ_AIN3H, + RICOH583_IRQ_VBATH, + RICOH583_IRQ_VIN3H, + RICOH583_IRQ_VIN8H, + RICOH583_IRQ_ADCEND, + + RICOH583_IRQ_GPIO0, + RICOH583_IRQ_GPIO1, + RICOH583_IRQ_GPIO2, + RICOH583_IRQ_GPIO3, + RICOH583_IRQ_GPIO4, + RICOH583_IRQ_GPIO5, + RICOH583_IRQ_GPIO6, + RICOH583_IRQ_GPIO7, + RICOH583_NR_IRQS, +}; + +/* Ricoh583 gpio definitions */ +enum { + RICOH583_GPIO0, + RICOH583_GPIO1, + RICOH583_GPIO2, + RICOH583_GPIO3, + RICOH583_GPIO4, + RICOH583_GPIO5, + RICOH583_GPIO6, + RICOH583_GPIO7, + + RICOH583_NR_GPIO, +}; + +enum ricoh583_deepsleep_control_id { + RICOH583_DS_NONE, + RICOH583_DS_DC0, + RICOH583_DS_DC1, + RICOH583_DS_DC2, + RICOH583_DS_DC3, + RICOH583_DS_LDO0, + RICOH583_DS_LDO1, + RICOH583_DS_LDO2, + RICOH583_DS_LDO3, + RICOH583_DS_LDO4, + RICOH583_DS_LDO5, + RICOH583_DS_LDO6, + RICOH583_DS_LDO7, + RICOH583_DS_LDO8, + RICOH583_DS_LDO9, + RICOH583_DS_PSO0, + RICOH583_DS_PSO1, + RICOH583_DS_PSO2, + RICOH583_DS_PSO3, + RICOH583_DS_PSO4, + RICOH583_DS_PSO5, + RICOH583_DS_PSO6, + RICOH583_DS_PSO7, +}; +enum ricoh583_ext_pwrreq_control { + RICOH583_EXT_PWRREQ1_CONTROL = 0x1, + RICOH583_EXT_PWRREQ2_CONTROL = 0x2, +}; + +struct ricoh583_subdev_info { + int id; + const char *name; + void *platform_data; +}; + +struct ricoh583_rtc_platform_data { + int irq; + struct rtc_time time; +}; + +struct ricoh583_gpio_init_data { + unsigned pulldn_en:1; /* Enable pull down */ + unsigned output_mode_en:1; /* Enable output mode during init */ + unsigned output_val:1; /* Output value if it is in output mode */ + unsigned init_apply:1; /* Apply init data on configuring gpios*/ +}; + +struct ricoh583_platform_data { + int num_subdevs; + struct ricoh583_subdev_info *subdevs; + int gpio_base; + int irq_base; + + struct ricoh583_gpio_init_data *gpio_init_data; + int num_gpioinit_data; + bool enable_shutdown_pin; +}; + +extern int ricoh583_read(struct device *dev, uint8_t reg, uint8_t *val); +extern int ricoh583_bulk_reads(struct device *dev, u8 reg, u8 count, + uint8_t *val); +extern int ricoh583_write(struct device *dev, u8 reg, uint8_t val); +extern int ricoh583_bulk_writes(struct device *dev, u8 reg, u8 count, + uint8_t *val); +extern int ricoh583_set_bits(struct device *dev, u8 reg, uint8_t bit_mask); +extern int ricoh583_clr_bits(struct device *dev, u8 reg, uint8_t bit_mask); +extern int ricoh583_update(struct device *dev, u8 reg, uint8_t val, + uint8_t mask); +extern int ricoh583_ext_power_req_config(struct device *dev, + enum ricoh583_deepsleep_control_id control_id, + enum ricoh583_ext_pwrreq_control ext_pwr_req, + int deepsleep_slot_nr); +extern int ricoh583_power_off(void); + +#endif diff --git a/include/linux/mfd/tps6586x.h b/include/linux/mfd/tps6586x.h index b6bab1b04e25..e43184a43201 100644 --- a/include/linux/mfd/tps6586x.h +++ b/include/linux/mfd/tps6586x.h @@ -1,6 +1,10 @@ #ifndef __LINUX_MFD_TPS6586X_H #define __LINUX_MFD_TPS6586X_H +#define SM0_PWM_BIT 0 +#define SM1_PWM_BIT 1 +#define SM2_PWM_BIT 2 + enum { TPS6586X_ID_SM_0, TPS6586X_ID_SM_1, @@ -48,12 +52,60 @@ enum { TPS6586X_INT_RTC_ALM2, }; +enum pwm_pfm_mode { + PWM_ONLY, + AUTO_PWM_PFM, + PWM_DEFAULT_VALUE, + +}; + +enum slew_rate_settings { + SLEW_RATE_INSTANTLY = 0, + SLEW_RATE_0110UV_PER_SEC = 0x1, + SLEW_RATE_0220UV_PER_SEC = 0x2, + SLEW_RATE_0440UV_PER_SEC = 0x3, + SLEW_RATE_0880UV_PER_SEC = 0x4, + SLEW_RATE_1760UV_PER_SEC = 0x5, + SLEW_RATE_3520UV_PER_SEC = 0x6, + SLEW_RATE_7040UV_PER_SEC = 0x7, + SLEW_RATE_DEFAULT_VALUE, +}; + +struct tps6586x_settings { + /* SM0, SM1 and SM2 have PWM-only and auto PWM/PFM mode */ + enum pwm_pfm_mode sm_pwm_mode; + /* SM0 and SM1 have slew rate settings */ + enum slew_rate_settings slew_rate; +}; + +enum { + TPS6586X_RTC_CL_SEL_1_5PF = 0x0, + TPS6586X_RTC_CL_SEL_6_5PF = 0x1, + TPS6586X_RTC_CL_SEL_7_5PF = 0x2, + TPS6586X_RTC_CL_SEL_12_5PF = 0x3, +}; + struct tps6586x_subdev_info { int id; const char *name; void *platform_data; }; +struct tps6586x_epoch_start { + int year; + int month; + int day; + int hour; + int min; + int sec; +}; + +struct tps6586x_rtc_platform_data { + int irq; + struct tps6586x_epoch_start start; + int cl_sel; /* internal XTAL capacitance, see TPS6586X_RTC_CL_SEL* */ +}; + struct tps6586x_platform_data { int num_subdevs; struct tps6586x_subdev_info *subdevs; @@ -74,5 +126,6 @@ extern int tps6586x_set_bits(struct device *dev, int reg, uint8_t bit_mask); extern int tps6586x_clr_bits(struct device *dev, int reg, uint8_t bit_mask); extern int tps6586x_update(struct device *dev, int reg, uint8_t val, uint8_t mask); +extern int tps6586x_power_off(void); #endif /*__LINUX_MFD_TPS6586X_H */ diff --git a/include/linux/mfd/tps6591x.h b/include/linux/mfd/tps6591x.h new file mode 100644 index 000000000000..525a8616c44b --- /dev/null +++ b/include/linux/mfd/tps6591x.h @@ -0,0 +1,123 @@ +/* + * include/linux/mfd/tps6591x.c + * Core driver interface for TI TPS6591x PMIC family + * + * Copyright (C) 2011 NVIDIA Corporation + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + * more details. + * + * You should have received a copy of the GNU General Public License along + * with this program; if not, write to the Free Software Foundation, Inc., + * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, USA. + * + */ + +#ifndef __LINUX_MFD_TPS6591X_H +#define __LINUX_MFD_TPS6591X_H + +#include <linux/rtc.h> + +enum { + TPS6591X_INT_PWRHOLD_F, + TPS6591X_INT_VMBHI, + TPS6591X_INT_PWRON, + TPS6591X_INT_PWRON_LP, + TPS6591X_INT_PWRHOLD_R, + TPS6591X_INT_HOTDIE, + TPS6591X_INT_RTC_ALARM, + TPS6591X_INT_RTC_PERIOD, + TPS6591X_INT_GPIO0, + TPS6591X_INT_GPIO1, + TPS6591X_INT_GPIO2, + TPS6591X_INT_GPIO3, + TPS6591X_INT_GPIO4, + TPS6591X_INT_GPIO5, + TPS6591X_INT_WTCHDG, + TPS6591X_INT_VMBCH2_H, + TPS6591X_INT_VMBCH2_L, + TPS6591X_INT_PWRDN, + + /* Last entry */ + TPS6591X_INT_NR, +}; + +/* Gpio definitions */ +enum { + TPS6591X_GPIO_GP0 = 0, + TPS6591X_GPIO_GP1 = 1, + TPS6591X_GPIO_GP2 = 2, + TPS6591X_GPIO_GP3 = 3, + TPS6591X_GPIO_GP4 = 4, + TPS6591X_GPIO_GP5 = 5, + TPS6591X_GPIO_GP6 = 6, + TPS6591X_GPIO_GP7 = 7, + TPS6591X_GPIO_GP8 = 8, + + /* Last entry */ + TPS6591X_GPIO_NR, +}; + +struct tps6591x_subdev_info { + int id; + const char *name; + void *platform_data; +}; + +struct tps6591x_rtc_platform_data { + int irq; + struct rtc_time time; +}; + +struct tps6591x_sleep_keepon_data { + /* set 1 to maintain the following on sleep mode */ + unsigned therm_keepon:1; /* themal monitoring */ + unsigned clkout32k_keepon:1; /* CLK32KOUT */ + unsigned vrtc_keepon:1; /* LD0 full load capability */ + unsigned i2chs_keepon:1; /* high speed internal clock */ +}; + +struct tps6591x_gpio_init_data { + unsigned sleep_en:1; /* Enable sleep mode */ + unsigned pulldn_en:1; /* Enable pull down */ + unsigned output_mode_en:1; /* Enable output mode during init */ + unsigned output_val:1; /* Output value if it is in output mode */ + unsigned init_apply:1; /* Apply init data on configuring gpios*/ +}; + +struct tps6591x_platform_data { + int gpio_base; + int irq_base; + + int num_subdevs; + struct tps6591x_subdev_info *subdevs; + + bool dev_slp_en; + struct tps6591x_sleep_keepon_data *slp_keepon; + + struct tps6591x_gpio_init_data *gpio_init_data; + int num_gpioinit_data; +}; + +/* + * NOTE: the functions below are not intended for use outside + * of the TPS6591X sub-device drivers + */ +extern int tps6591x_write(struct device *dev, int reg, uint8_t val); +extern int tps6591x_writes(struct device *dev, int reg, int len, uint8_t *val); +extern int tps6591x_read(struct device *dev, int reg, uint8_t *val); +extern int tps6591x_reads(struct device *dev, int reg, int len, uint8_t *val); +extern int tps6591x_set_bits(struct device *dev, int reg, uint8_t bit_mask); +extern int tps6591x_clr_bits(struct device *dev, int reg, uint8_t bit_mask); +extern int tps6591x_update(struct device *dev, int reg, uint8_t val, + uint8_t mask); +extern int tps6591x_power_off(void); + +#endif /*__LINUX_MFD_TPS6591X_H */ diff --git a/include/linux/mfd/tps80031.h b/include/linux/mfd/tps80031.h new file mode 100644 index 000000000000..c6aa7eadbedd --- /dev/null +++ b/include/linux/mfd/tps80031.h @@ -0,0 +1,204 @@ +/* + * include/linux/mfd/tps80031.c + * + * Core driver interface for TI TPS80031 PMIC + * + * Copyright (C) 2011 NVIDIA Corporation + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + * more details. + * + * You should have received a copy of the GNU General Public License along + * with this program; if not, write to the Free Software Foundation, Inc., + * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, USA. + * + */ + +#ifndef __LINUX_MFD_TPS80031_H +#define __LINUX_MFD_TPS80031_H + +#include <linux/rtc.h> + +/* Supported chips */ +enum chips { + TPS80031 = 0x00000001, + TPS80032 = 0x00000002, +}; + +enum { + TPS80031_INT_PWRON, + TPS80031_INT_RPWRON, + TPS80031_INT_SYS_VLOW, + TPS80031_INT_RTC_ALARM, + TPS80031_INT_RTC_PERIOD, + TPS80031_INT_HOT_DIE, + TPS80031_INT_VXX_SHORT, + TPS80031_INT_SPDURATION, + TPS80031_INT_WATCHDOG, + TPS80031_INT_BAT, + TPS80031_INT_SIM, + TPS80031_INT_MMC, + TPS80031_INT_RES, + TPS80031_INT_GPADC_RT, + TPS80031_INT_GPADC_SW2_EOC, + TPS80031_INT_CC_AUTOCAL, + TPS80031_INT_ID_WKUP, + TPS80031_INT_VBUSS_WKUP, + TPS80031_INT_ID, + TPS80031_INT_VBUS, + TPS80031_INT_CHRG_CTRL, + TPS80031_INT_EXT_CHRG, + TPS80031_INT_INT_CHRG, + TPS80031_INT_RES2, + TPS80031_INT_BAT_TEMP_OVRANGE, + TPS80031_INT_BAT_REMOVED, + TPS80031_INT_VBUS_DET, + TPS80031_INT_VAC_DET, + TPS80031_INT_FAULT_WDG, + TPS80031_INT_LINCH_GATED, + + /* Last interrupt id to get the end number */ + TPS80031_INT_NR, +}; + +enum adc_channel { + BATTERY_TYPE = 0, /* External ADC */ + BATTERY_TEMPERATURE = 1, /* External ADC */ + AUDIO_ACCESSORY = 2, /* External ADC */ + TEMPERATURE_EXTERNAL_DIODE = 3, /* External ADC */ + TEMPERATURE_MEASUREMENT = 4, /* External ADC */ + GENERAL_PURPOSE_1 = 5, /* External ADC */ + GENERAL_PURPOSE_2 = 6, /* External ADC */ + SYSTEM_SUPPLY = 7, /* Internal ADC */ + BACKUP_BATTERY = 8, /* Internal ADC */ + EXTERNAL_CHARGER_INPUT = 9, /* Internal ADC */ + VBUS = 10, /* Internal ADC */ + VBUS_DCDC_OUTPUT_CURRENT = 11, /* Internal ADC */ + DIE_TEMPERATURE_1 = 12, /* Internal ADC */ + DIE_TEMPERATURE_2 = 13, /* Internal ADC */ + USB_ID_LINE = 14, /* Internal ADC */ + TEST_NETWORK_1 = 15, /* Internal ADC */ + TEST_NETWORK_2 = 16, /* Internal ADC */ + BATTERY_CHARGING_CURRENT = 17, /* Internal ADC */ + BATTERY_VOLTAGE = 18, /* Internal ADC */ +}; + +enum TPS80031_GPIO { + TPS80031_GPIO_REGEN1, + TPS80031_GPIO_REGEN2, + TPS80031_GPIO_SYSEN, + + /* Last entry */ + TPS80031_GPIO_NR, +}; + +enum TPS80031_CLOCK32K { + TPS80031_CLOCK32K_AO, + TPS80031_CLOCK32K_G, + TPS80031_CLOCK32K_AUDIO, + + /* Last entry */ + TPS80031_CLOCK32K_NR, +}; + +enum { + SLAVE_ID0 = 0, + SLAVE_ID1 = 1, + SLAVE_ID2 = 2, + SLAVE_ID3 = 3, +}; + +enum { + I2C_ID0_ADDR = 0x12, + I2C_ID1_ADDR = 0x48, + I2C_ID2_ADDR = 0x49, + I2C_ID3_ADDR = 0x4A, +}; + +/* External controls requests */ +enum tps80031_ext_control { + PWR_REQ_INPUT_NONE = 0x00000000, + PWR_REQ_INPUT_PREQ1 = 0x00000001, + PWR_REQ_INPUT_PREQ2 = 0x00000002, + PWR_REQ_INPUT_PREQ3 = 0x00000004, + PWR_OFF_ON_SLEEP = 0x00000008, + PWR_ON_ON_SLEEP = 0x00000010, +}; + +struct tps80031_subdev_info { + int id; + const char *name; + void *platform_data; +}; + +struct tps80031_rtc_platform_data { + int irq; + struct rtc_time time; +}; + +struct tps80031_clk32k_init_data { + int clk32k_nr; + bool enable; + unsigned long ext_ctrl_flag; +}; + +struct tps80031_gpio_init_data { + int gpio_nr; + unsigned long ext_ctrl_flag; +}; + +struct tps80031_platform_data { + int num_subdevs; + struct tps80031_subdev_info *subdevs; + int gpio_base; + int irq_base; + struct tps80031_32kclock_plat_data *clk32k_pdata; + struct tps80031_gpio_init_data *gpio_init_data; + int gpio_init_data_size; + struct tps80031_clk32k_init_data *clk32k_init_data; + int clk32k_init_data_size; +}; + +struct tps80031_bg_platform_data { + int irq_base; + int battery_present; +}; + +/* + * NOTE: the functions below are not intended for use outside + * of the TPS80031 sub-device drivers + */ +extern int tps80031_write(struct device *dev, int sid, int reg, uint8_t val); +extern int tps80031_writes(struct device *dev, int sid, int reg, int len, + uint8_t *val); +extern int tps80031_read(struct device *dev, int sid, int reg, uint8_t *val); +extern int tps80031_reads(struct device *dev, int sid, int reg, int len, + uint8_t *val); +extern int tps80031_set_bits(struct device *dev, int sid, int reg, + uint8_t bit_mask); +extern int tps80031_clr_bits(struct device *dev, int sid, int reg, + uint8_t bit_mask); +extern int tps80031_update(struct device *dev, int sid, int reg, uint8_t val, + uint8_t mask); +extern int tps80031_force_update(struct device *dev, int sid, int reg, + uint8_t val, uint8_t mask); +extern int tps80031_ext_power_req_config(struct device *dev, + unsigned long ext_ctrl_flag, int preq_bit, + int state_reg_add, int trans_reg_add); + +extern int tps80031_power_off(void); + +extern unsigned long tps80031_get_chip_info(struct device *dev); + +extern int tps80031_gpadc_conversion(int channle_no); + +extern int tps80031_get_pmu_version(struct device *dev); + +#endif /*__LINUX_MFD_TPS80031_H */ diff --git a/include/linux/mm.h b/include/linux/mm.h index fedc5f0e62ea..d1d9840093f2 100644 --- a/include/linux/mm.h +++ b/include/linux/mm.h @@ -871,6 +871,7 @@ extern bool skip_free_areas_node(unsigned int flags, int nid); int shmem_lock(struct file *file, int lock, struct user_struct *user); struct file *shmem_file_setup(const char *name, loff_t size, unsigned long flags); +void shmem_set_file(struct vm_area_struct *vma, struct file *file); int shmem_zero_setup(struct vm_area_struct *); extern int can_do_mlock(void); diff --git a/include/linux/mmc/host.h b/include/linux/mmc/host.h index 1d09562ccf73..51128f8a5775 100644 --- a/include/linux/mmc/host.h +++ b/include/linux/mmc/host.h @@ -12,6 +12,7 @@ #include <linux/leds.h> #include <linux/sched.h> +#include <linux/wakelock.h> #include <linux/mmc/core.h> #include <linux/mmc/pm.h> @@ -280,10 +281,15 @@ struct mmc_host { int claim_cnt; /* "claim" nesting count */ struct delayed_work detect; + struct wake_lock detect_wake_lock; const struct mmc_bus_ops *bus_ops; /* current bus driver */ unsigned int bus_refs; /* reference counter */ + unsigned int bus_resume_flags; +#define MMC_BUSRESUME_MANUAL_RESUME (1 << 0) +#define MMC_BUSRESUME_NEEDS_RESUME (1 << 1) + unsigned int sdio_irqs; struct task_struct *sdio_irq_thread; atomic_t sdio_irq_thread_abort; @@ -302,6 +308,15 @@ struct mmc_host { struct mmc_async_req *areq; /* active async req */ +#ifdef CONFIG_MMC_EMBEDDED_SDIO + struct { + struct sdio_cis *cis; + struct sdio_cccr *cccr; + struct sdio_embedded_func *funcs; + int num_funcs; + } embedded_sdio_data; +#endif + unsigned long private[0] ____cacheline_aligned; }; @@ -310,6 +325,14 @@ extern int mmc_add_host(struct mmc_host *); extern void mmc_remove_host(struct mmc_host *); extern void mmc_free_host(struct mmc_host *); +#ifdef CONFIG_MMC_EMBEDDED_SDIO +extern void mmc_set_embedded_sdio_data(struct mmc_host *host, + struct sdio_cis *cis, + struct sdio_cccr *cccr, + struct sdio_embedded_func *funcs, + int num_funcs); +#endif + static inline void *mmc_priv(struct mmc_host *host) { return (void *)host->private; @@ -320,6 +343,18 @@ static inline void *mmc_priv(struct mmc_host *host) #define mmc_dev(x) ((x)->parent) #define mmc_classdev(x) (&(x)->class_dev) #define mmc_hostname(x) (dev_name(&(x)->class_dev)) +#define mmc_bus_needs_resume(host) ((host)->bus_resume_flags & MMC_BUSRESUME_NEEDS_RESUME) +#define mmc_bus_manual_resume(host) ((host)->bus_resume_flags & MMC_BUSRESUME_MANUAL_RESUME) + +static inline void mmc_set_bus_resume_policy(struct mmc_host *host, int manual) +{ + if (manual) + host->bus_resume_flags |= MMC_BUSRESUME_MANUAL_RESUME; + else + host->bus_resume_flags &= ~MMC_BUSRESUME_MANUAL_RESUME; +} + +extern int mmc_resume_bus(struct mmc_host *host); extern int mmc_suspend_host(struct mmc_host *); extern int mmc_resume_host(struct mmc_host *); diff --git a/include/linux/mmc/pm.h b/include/linux/mmc/pm.h index 4a139204c20c..6e2d6a135c7e 100644 --- a/include/linux/mmc/pm.h +++ b/include/linux/mmc/pm.h @@ -26,5 +26,6 @@ typedef unsigned int mmc_pm_flag_t; #define MMC_PM_KEEP_POWER (1 << 0) /* preserve card power during suspend */ #define MMC_PM_WAKE_SDIO_IRQ (1 << 1) /* wake up host system on SDIO IRQ assertion */ +#define MMC_PM_IGNORE_PM_NOTIFY (1 << 2) /* ignore mmc pm notify */ #endif /* LINUX_MMC_PM_H */ diff --git a/include/linux/mmc/sdhci.h b/include/linux/mmc/sdhci.h index 5666f3abfab7..85e7850b88af 100644 --- a/include/linux/mmc/sdhci.h +++ b/include/linux/mmc/sdhci.h @@ -21,72 +21,74 @@ struct sdhci_host { /* Data set by hardware interface driver */ const char *hw_name; /* Hardware bus name */ - unsigned int quirks; /* Deviations from spec. */ + u64 quirks; /* Deviations from spec. */ /* Controller doesn't honor resets unless we touch the clock register */ -#define SDHCI_QUIRK_CLOCK_BEFORE_RESET (1<<0) +#define SDHCI_QUIRK_CLOCK_BEFORE_RESET (1ULL<<0) /* Controller has bad caps bits, but really supports DMA */ -#define SDHCI_QUIRK_FORCE_DMA (1<<1) +#define SDHCI_QUIRK_FORCE_DMA (1ULL<<1) /* Controller doesn't like to be reset when there is no card inserted. */ -#define SDHCI_QUIRK_NO_CARD_NO_RESET (1<<2) +#define SDHCI_QUIRK_NO_CARD_NO_RESET (1ULL<<2) /* Controller doesn't like clearing the power reg before a change */ -#define SDHCI_QUIRK_SINGLE_POWER_WRITE (1<<3) +#define SDHCI_QUIRK_SINGLE_POWER_WRITE (1ULL<<3) /* Controller has flaky internal state so reset it on each ios change */ -#define SDHCI_QUIRK_RESET_CMD_DATA_ON_IOS (1<<4) +#define SDHCI_QUIRK_RESET_CMD_DATA_ON_IOS (1ULL<<4) /* Controller has an unusable DMA engine */ -#define SDHCI_QUIRK_BROKEN_DMA (1<<5) +#define SDHCI_QUIRK_BROKEN_DMA (1ULL<<5) /* Controller has an unusable ADMA engine */ -#define SDHCI_QUIRK_BROKEN_ADMA (1<<6) +#define SDHCI_QUIRK_BROKEN_ADMA (1ULL<<6) /* Controller can only DMA from 32-bit aligned addresses */ -#define SDHCI_QUIRK_32BIT_DMA_ADDR (1<<7) +#define SDHCI_QUIRK_32BIT_DMA_ADDR (1ULL<<7) /* Controller can only DMA chunk sizes that are a multiple of 32 bits */ -#define SDHCI_QUIRK_32BIT_DMA_SIZE (1<<8) +#define SDHCI_QUIRK_32BIT_DMA_SIZE (1ULL<<8) /* Controller can only ADMA chunks that are a multiple of 32 bits */ -#define SDHCI_QUIRK_32BIT_ADMA_SIZE (1<<9) +#define SDHCI_QUIRK_32BIT_ADMA_SIZE (1ULL<<9) /* Controller needs to be reset after each request to stay stable */ -#define SDHCI_QUIRK_RESET_AFTER_REQUEST (1<<10) +#define SDHCI_QUIRK_RESET_AFTER_REQUEST (1ULL<<10) /* Controller needs voltage and power writes to happen separately */ -#define SDHCI_QUIRK_NO_SIMULT_VDD_AND_POWER (1<<11) +#define SDHCI_QUIRK_NO_SIMULT_VDD_AND_POWER (1ULL<<11) /* Controller provides an incorrect timeout value for transfers */ -#define SDHCI_QUIRK_BROKEN_TIMEOUT_VAL (1<<12) +#define SDHCI_QUIRK_BROKEN_TIMEOUT_VAL (1ULL<<12) /* Controller has an issue with buffer bits for small transfers */ -#define SDHCI_QUIRK_BROKEN_SMALL_PIO (1<<13) +#define SDHCI_QUIRK_BROKEN_SMALL_PIO (1ULL<<13) /* Controller does not provide transfer-complete interrupt when not busy */ -#define SDHCI_QUIRK_NO_BUSY_IRQ (1<<14) +#define SDHCI_QUIRK_NO_BUSY_IRQ (1ULL<<14) /* Controller has unreliable card detection */ -#define SDHCI_QUIRK_BROKEN_CARD_DETECTION (1<<15) +#define SDHCI_QUIRK_BROKEN_CARD_DETECTION (1ULL<<15) /* Controller reports inverted write-protect state */ -#define SDHCI_QUIRK_INVERTED_WRITE_PROTECT (1<<16) +#define SDHCI_QUIRK_INVERTED_WRITE_PROTECT (1ULL<<16) /* Controller has nonstandard clock management */ -#define SDHCI_QUIRK_NONSTANDARD_CLOCK (1<<17) +#define SDHCI_QUIRK_NONSTANDARD_CLOCK (1ULL<<17) /* Controller does not like fast PIO transfers */ -#define SDHCI_QUIRK_PIO_NEEDS_DELAY (1<<18) +#define SDHCI_QUIRK_PIO_NEEDS_DELAY (1ULL<<18) /* Controller losing signal/interrupt enable states after reset */ -#define SDHCI_QUIRK_RESTORE_IRQS_AFTER_RESET (1<<19) +#define SDHCI_QUIRK_RESTORE_IRQS_AFTER_RESET (1ULL<<19) /* Controller has to be forced to use block size of 2048 bytes */ -#define SDHCI_QUIRK_FORCE_BLK_SZ_2048 (1<<20) +#define SDHCI_QUIRK_FORCE_BLK_SZ_2048 (1ULL<<20) /* Controller cannot do multi-block transfers */ -#define SDHCI_QUIRK_NO_MULTIBLOCK (1<<21) +#define SDHCI_QUIRK_NO_MULTIBLOCK (1ULL<<21) /* Controller can only handle 1-bit data transfers */ -#define SDHCI_QUIRK_FORCE_1_BIT_DATA (1<<22) +#define SDHCI_QUIRK_FORCE_1_BIT_DATA (1ULL<<22) /* Controller needs 10ms delay between applying power and clock */ -#define SDHCI_QUIRK_DELAY_AFTER_POWER (1<<23) +#define SDHCI_QUIRK_DELAY_AFTER_POWER (1ULL<<23) /* Controller uses SDCLK instead of TMCLK for data timeouts */ -#define SDHCI_QUIRK_DATA_TIMEOUT_USES_SDCLK (1<<24) +#define SDHCI_QUIRK_DATA_TIMEOUT_USES_SDCLK (1ULL<<24) /* Controller reports wrong base clock capability */ -#define SDHCI_QUIRK_CAP_CLOCK_BASE_BROKEN (1<<25) +#define SDHCI_QUIRK_CAP_CLOCK_BASE_BROKEN (1ULL<<25) /* Controller cannot support End Attribute in NOP ADMA descriptor */ -#define SDHCI_QUIRK_NO_ENDATTR_IN_NOPDESC (1<<26) +#define SDHCI_QUIRK_NO_ENDATTR_IN_NOPDESC (1ULL<<26) /* Controller is missing device caps. Use caps provided by host */ -#define SDHCI_QUIRK_MISSING_CAPS (1<<27) +#define SDHCI_QUIRK_MISSING_CAPS (1ULL<<27) /* Controller uses Auto CMD12 command to stop the transfer */ -#define SDHCI_QUIRK_MULTIBLOCK_READ_ACMD12 (1<<28) +#define SDHCI_QUIRK_MULTIBLOCK_READ_ACMD12 (1ULL<<28) /* Controller doesn't have HISPD bit field in HI-SPEED SD card */ -#define SDHCI_QUIRK_NO_HISPD_BIT (1<<29) +#define SDHCI_QUIRK_NO_HISPD_BIT (1ULL<<29) /* Controller treats ADMA descriptors with length 0000h incorrectly */ -#define SDHCI_QUIRK_BROKEN_ADMA_ZEROLEN_DESC (1<<30) +#define SDHCI_QUIRK_BROKEN_ADMA_ZEROLEN_DESC (1ULL<<30) /* The read-only detection via SDHCI_PRESENT_STATE register is unstable */ -#define SDHCI_QUIRK_UNSTABLE_RO_DETECT (1<<31) +#define SDHCI_QUIRK_UNSTABLE_RO_DETECT (1ULL<<31) +/* Controller cannot report the line status in present state register */ +#define SDHCI_QUIRK_NON_STD_VOLTAGE_SWITCHING (1ULL<<32) int irq; /* Device IRQ */ void __iomem *ioaddr; /* Mapped address */ @@ -145,6 +147,7 @@ struct sdhci_host { struct tasklet_struct finish_tasklet; struct timer_list timer; /* Timer for timeouts */ + unsigned int card_int_set; /* card int status */ unsigned int caps; /* Alternative capabilities */ diff --git a/include/linux/mmc/sdio_func.h b/include/linux/mmc/sdio_func.h index 50f0bc952328..dc680c4b50d4 100644 --- a/include/linux/mmc/sdio_func.h +++ b/include/linux/mmc/sdio_func.h @@ -23,6 +23,14 @@ struct sdio_func; typedef void (sdio_irq_handler_t)(struct sdio_func *); /* + * Structure used to hold embedded SDIO device data from platform layer + */ +struct sdio_embedded_func { + uint8_t f_class; + uint32_t f_maxblksize; +}; + +/* * SDIO function CIS tuple (unknown to the core) */ struct sdio_func_tuple { @@ -130,6 +138,8 @@ extern int sdio_release_irq(struct sdio_func *func); extern unsigned int sdio_align_size(struct sdio_func *func, unsigned int sz); extern u8 sdio_readb(struct sdio_func *func, unsigned int addr, int *err_ret); +extern u8 sdio_readb_ext(struct sdio_func *func, unsigned int addr, int *err_ret, + unsigned in); extern u16 sdio_readw(struct sdio_func *func, unsigned int addr, int *err_ret); extern u32 sdio_readl(struct sdio_func *func, unsigned int addr, int *err_ret); diff --git a/include/linux/mpu.h b/include/linux/mpu.h new file mode 100644 index 000000000000..fd66ba0db875 --- /dev/null +++ b/include/linux/mpu.h @@ -0,0 +1,366 @@ +/* + $License: + Copyright (C) 2011 InvenSense Corporation, All Rights Reserved. + + This program is free software; you can redistribute it and/or modify + it under the terms of the GNU General Public License as published by + the Free Software Foundation; either version 2 of the License, or + (at your option) any later version. + + This program is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program. If not, see <http://www.gnu.org/licenses/>. + $ + */ + +#ifndef __MPU_H_ +#define __MPU_H_ + +#include <linux/types.h> +#include <linux/ioctl.h> + +/* Number of axes on each sensor */ +#define GYRO_NUM_AXES (3) +#define ACCEL_NUM_AXES (3) +#define COMPASS_NUM_AXES (3) + +struct mpu_read_write { + /* Memory address or register address depending on ioctl */ + __u16 address; + __u16 length; + __u8 *data; +}; + +enum mpuirq_data_type { + MPUIRQ_DATA_TYPE_MPU_IRQ, + MPUIRQ_DATA_TYPE_SLAVE_IRQ, + MPUIRQ_DATA_TYPE_PM_EVENT, + MPUIRQ_DATA_TYPE_NUM_TYPES, +}; + +/* User space PM event notification */ +#define MPU_PM_EVENT_SUSPEND_PREPARE (3) +#define MPU_PM_EVENT_POST_SUSPEND (4) + +struct mpuirq_data { + __u32 interruptcount; + __u64 irqtime; + __u32 data_type; + __s32 data; +}; + +enum ext_slave_config_key { + MPU_SLAVE_CONFIG_ODR_SUSPEND, + MPU_SLAVE_CONFIG_ODR_RESUME, + MPU_SLAVE_CONFIG_FSR_SUSPEND, + MPU_SLAVE_CONFIG_FSR_RESUME, + MPU_SLAVE_CONFIG_MOT_THS, + MPU_SLAVE_CONFIG_NMOT_THS, + MPU_SLAVE_CONFIG_MOT_DUR, + MPU_SLAVE_CONFIG_NMOT_DUR, + MPU_SLAVE_CONFIG_IRQ_SUSPEND, + MPU_SLAVE_CONFIG_IRQ_RESUME, + MPU_SLAVE_WRITE_REGISTERS, + MPU_SLAVE_READ_REGISTERS, + MPU_SLAVE_CONFIG_INTERNAL_REFERENCE, + /* AMI 306 specific config keys */ + MPU_SLAVE_PARAM, + MPU_SLAVE_WINDOW, + MPU_SLAVE_READWINPARAMS, + MPU_SLAVE_SEARCHOFFSET, + /* AKM specific config keys */ + MPU_SLAVE_READ_SCALE, + /* MPU3050 and MPU6050 Keys */ + MPU_SLAVE_INT_CONFIG, + MPU_SLAVE_EXT_SYNC, + MPU_SLAVE_FULL_SCALE, + MPU_SLAVE_LPF, + MPU_SLAVE_CLK_SRC, + MPU_SLAVE_DIVIDER, + MPU_SLAVE_DMP_ENABLE, + MPU_SLAVE_FIFO_ENABLE, + MPU_SLAVE_DMP_CFG1, + MPU_SLAVE_DMP_CFG2, + MPU_SLAVE_TC, + MPU_SLAVE_GYRO, + MPU_SLAVE_ADDR, + MPU_SLAVE_PRODUCT_REVISION, + MPU_SLAVE_SILICON_REVISION, + MPU_SLAVE_PRODUCT_ID, + MPU_SLAVE_GYRO_SENS_TRIM, + MPU_SLAVE_ACCEL_SENS_TRIM, + MPU_SLAVE_RAM, + /* -------------------------- */ + MPU_SLAVE_CONFIG_NUM_CONFIG_KEYS +}; + +/* For the MPU_SLAVE_CONFIG_IRQ_SUSPEND and MPU_SLAVE_CONFIG_IRQ_RESUME */ +enum ext_slave_config_irq_type { + MPU_SLAVE_IRQ_TYPE_NONE, + MPU_SLAVE_IRQ_TYPE_MOTION, + MPU_SLAVE_IRQ_TYPE_DATA_READY, +}; + +/* Structure for the following IOCTS's + * MPU_CONFIG_GYRO + * MPU_CONFIG_ACCEL + * MPU_CONFIG_COMPASS + * MPU_CONFIG_PRESSURE + * MPU_GET_CONFIG_GYRO + * MPU_GET_CONFIG_ACCEL + * MPU_GET_CONFIG_COMPASS + * MPU_GET_CONFIG_PRESSURE + * + * @key one of enum ext_slave_config_key + * @len length of data pointed to by data + * @apply zero if communication with the chip is not necessary, false otherwise + * This flag can be used to select cached data or to refresh cashed data + * cache data to be pushed later or push immediately. If true and the + * slave is on the secondary bus the MPU will first enger bypass mode + * before calling the slaves .config or .get_config funcion + * @data pointer to the data to confgure or get + */ +struct ext_slave_config { + __u8 key; + __u16 len; + __u8 apply; + void *data; +}; + +enum ext_slave_type { + EXT_SLAVE_TYPE_GYROSCOPE, + EXT_SLAVE_TYPE_ACCEL, + EXT_SLAVE_TYPE_COMPASS, + EXT_SLAVE_TYPE_PRESSURE, + /*EXT_SLAVE_TYPE_TEMPERATURE */ + + EXT_SLAVE_NUM_TYPES +}; + +enum ext_slave_id { + ID_INVALID = 0, + + ACCEL_ID_LIS331, + ACCEL_ID_LSM303DLX, + ACCEL_ID_LIS3DH, + ACCEL_ID_KXSD9, + ACCEL_ID_KXTF9, + ACCEL_ID_BMA150, + ACCEL_ID_BMA222, + ACCEL_ID_BMA250, + ACCEL_ID_ADXL34X, + ACCEL_ID_MMA8450, + ACCEL_ID_MMA845X, + ACCEL_ID_MPU6050, + + COMPASS_ID_AK8975, + COMPASS_ID_AK8972, + COMPASS_ID_AMI30X, + COMPASS_ID_AMI306, + COMPASS_ID_YAS529, + COMPASS_ID_YAS530, + COMPASS_ID_HMC5883, + COMPASS_ID_LSM303DLH, + COMPASS_ID_LSM303DLM, + COMPASS_ID_MMC314X, + COMPASS_ID_HSCDTD002B, + COMPASS_ID_HSCDTD004A, + + PRESSURE_ID_BMA085, +}; + +enum ext_slave_endian { + EXT_SLAVE_BIG_ENDIAN, + EXT_SLAVE_LITTLE_ENDIAN, + EXT_SLAVE_FS8_BIG_ENDIAN, + EXT_SLAVE_FS16_BIG_ENDIAN, +}; + +enum ext_slave_bus { + EXT_SLAVE_BUS_INVALID = -1, + EXT_SLAVE_BUS_PRIMARY = 0, + EXT_SLAVE_BUS_SECONDARY = 1 +}; + + +/** + * struct ext_slave_platform_data - Platform data for mpu3050 and mpu6050 + * slave devices + * + * @type: the type of slave device based on the enum ext_slave_type + * definitions. + * @irq: the irq number attached to the slave if any. + * @adapt_num: the I2C adapter number. + * @bus: the bus the slave is attached to: enum ext_slave_bus + * @address: the I2C slave address of the slave device. + * @orientation: the mounting matrix of the device relative to MPU. + * @irq_data: private data for the slave irq handler + * @private_data: additional data, user customizable. Not touched by the MPU + * driver. + * + * The orientation matricies are 3x3 rotation matricies + * that are applied to the data to rotate from the mounting orientation to the + * platform orientation. The values must be one of 0, 1, or -1 and each row and + * column should have exactly 1 non-zero value. + */ +struct ext_slave_platform_data { + __u8 type; + __u32 irq; + __u32 adapt_num; + __u32 bus; + __u8 address; + __s8 orientation[9]; + void *irq_data; + void *private_data; +}; + +struct fix_pnt_range { + __s32 mantissa; + __s32 fraction; +}; + +static inline long range_fixedpoint_to_long_mg(struct fix_pnt_range rng) +{ + return (long)(rng.mantissa * 1000 + rng.fraction / 10); +} + +struct ext_slave_read_trigger { + __u8 reg; + __u8 value; +}; + +/** + * struct ext_slave_descr - Description of the slave device for programming. + * + * @suspend: function pointer to put the device in suspended state + * @resume: function pointer to put the device in running state + * @read: function that reads the device data + * @init: function used to preallocate memory used by the driver + * @exit: function used to free memory allocated for the driver + * @config: function used to configure the device + * @get_config:function used to get the device's configuration + * + * @name: text name of the device + * @type: device type. enum ext_slave_type + * @id: enum ext_slave_id + * @read_reg: starting register address to retrieve data. + * @read_len: length in bytes of the sensor data. Typically 6. + * @endian: byte order of the data. enum ext_slave_endian + * @range: full scale range of the slave ouput: struct fix_pnt_range + * @trigger: If reading data first requires writing a register this is the + * data to write. + * + * Defines the functions and information about the slave the mpu3050 and + * mpu6050 needs to use the slave device. + */ +struct ext_slave_descr { + int (*init) (void *mlsl_handle, + struct ext_slave_descr *slave, + struct ext_slave_platform_data *pdata); + int (*exit) (void *mlsl_handle, + struct ext_slave_descr *slave, + struct ext_slave_platform_data *pdata); + int (*suspend) (void *mlsl_handle, + struct ext_slave_descr *slave, + struct ext_slave_platform_data *pdata); + int (*resume) (void *mlsl_handle, + struct ext_slave_descr *slave, + struct ext_slave_platform_data *pdata); + int (*read) (void *mlsl_handle, + struct ext_slave_descr *slave, + struct ext_slave_platform_data *pdata, + __u8 *data); + int (*config) (void *mlsl_handle, + struct ext_slave_descr *slave, + struct ext_slave_platform_data *pdata, + struct ext_slave_config *config); + int (*get_config) (void *mlsl_handle, + struct ext_slave_descr *slave, + struct ext_slave_platform_data *pdata, + struct ext_slave_config *config); + + char *name; + __u8 type; + __u8 id; + __u8 read_reg; + __u8 read_len; + __u8 endian; + struct fix_pnt_range range; + struct ext_slave_read_trigger *trigger; +}; + +/** + * struct mpu_platform_data - Platform data for the mpu driver + * @int_config: Bits [7:3] of the int config register. + * @level_shifter: 0: VLogic, 1: VDD + * @orientation: Orientation matrix of the gyroscope + * + * Contains platform specific information on how to configure the MPU3050 to + * work on this platform. The orientation matricies are 3x3 rotation matricies + * that are applied to the data to rotate from the mounting orientation to the + * platform orientation. The values must be one of 0, 1, or -1 and each row and + * column should have exactly 1 non-zero value. + */ +struct mpu_platform_data { + __u8 int_config; + __u8 level_shifter; + __s8 orientation[GYRO_NUM_AXES * GYRO_NUM_AXES]; +}; + +#define MPU_IOCTL (0x81) /* Magic number for MPU Iocts */ +/* IOCTL commands for /dev/mpu */ + +/*-------------------------------------------------------------------------- + * Deprecated, debugging only + */ +#define MPU_SET_MPU_PLATFORM_DATA \ + _IOWR(MPU_IOCTL, 0x01, struct mpu_platform_data) +#define MPU_SET_EXT_SLAVE_PLATFORM_DATA \ + _IOWR(MPU_IOCTL, 0x01, struct ext_slave_platform_data) +/*--------------------------------------------------------------------------*/ +#define MPU_GET_EXT_SLAVE_PLATFORM_DATA \ + _IOWR(MPU_IOCTL, 0x02, struct ext_slave_platform_data) +#define MPU_GET_MPU_PLATFORM_DATA \ + _IOWR(MPU_IOCTL, 0x02, struct mpu_platform_data) +#define MPU_GET_EXT_SLAVE_DESCR \ + _IOWR(MPU_IOCTL, 0x02, struct ext_slave_descr) + +#define MPU_READ _IOWR(MPU_IOCTL, 0x10, struct mpu_read_write) +#define MPU_WRITE _IOW(MPU_IOCTL, 0x10, struct mpu_read_write) +#define MPU_READ_MEM _IOWR(MPU_IOCTL, 0x11, struct mpu_read_write) +#define MPU_WRITE_MEM _IOW(MPU_IOCTL, 0x11, struct mpu_read_write) +#define MPU_READ_FIFO _IOWR(MPU_IOCTL, 0x12, struct mpu_read_write) +#define MPU_WRITE_FIFO _IOW(MPU_IOCTL, 0x12, struct mpu_read_write) + +#define MPU_READ_COMPASS _IOR(MPU_IOCTL, 0x12, __u8) +#define MPU_READ_ACCEL _IOR(MPU_IOCTL, 0x13, __u8) +#define MPU_READ_PRESSURE _IOR(MPU_IOCTL, 0x14, __u8) + +#define MPU_CONFIG_GYRO _IOW(MPU_IOCTL, 0x20, struct ext_slave_config) +#define MPU_CONFIG_ACCEL _IOW(MPU_IOCTL, 0x21, struct ext_slave_config) +#define MPU_CONFIG_COMPASS _IOW(MPU_IOCTL, 0x22, struct ext_slave_config) +#define MPU_CONFIG_PRESSURE _IOW(MPU_IOCTL, 0x23, struct ext_slave_config) + +#define MPU_GET_CONFIG_GYRO _IOWR(MPU_IOCTL, 0x20, struct ext_slave_config) +#define MPU_GET_CONFIG_ACCEL _IOWR(MPU_IOCTL, 0x21, struct ext_slave_config) +#define MPU_GET_CONFIG_COMPASS _IOWR(MPU_IOCTL, 0x22, struct ext_slave_config) +#define MPU_GET_CONFIG_PRESSURE _IOWR(MPU_IOCTL, 0x23, struct ext_slave_config) + +#define MPU_SUSPEND _IOW(MPU_IOCTL, 0x30, __u32) +#define MPU_RESUME _IOW(MPU_IOCTL, 0x31, __u32) +/* Userspace PM Event response */ +#define MPU_PM_EVENT_HANDLED _IO(MPU_IOCTL, 0x32) + +#define MPU_GET_REQUESTED_SENSORS _IOR(MPU_IOCTL, 0x40, __u8) +#define MPU_SET_REQUESTED_SENSORS _IOW(MPU_IOCTL, 0x40, __u8) +#define MPU_GET_IGNORE_SYSTEM_SUSPEND _IOR(MPU_IOCTL, 0x41, __u8) +#define MPU_SET_IGNORE_SYSTEM_SUSPEND _IOW(MPU_IOCTL, 0x41, __u8) +#define MPU_GET_MLDL_STATUS _IOR(MPU_IOCTL, 0x42, __u8) +#define MPU_GET_I2C_SLAVES_ENABLED _IOR(MPU_IOCTL, 0x43, __u8) + + +#endif /* __MPU_H_ */ diff --git a/include/linux/mpu3050.h b/include/linux/mpu3050.h new file mode 100644 index 000000000000..a8dcd5a9473f --- /dev/null +++ b/include/linux/mpu3050.h @@ -0,0 +1,255 @@ +/* + $License: + Copyright (C) 2010 InvenSense Corporation, All Rights Reserved. + + This program is free software; you can redistribute it and/or modify + it under the terms of the GNU General Public License as published by + the Free Software Foundation; either version 2 of the License, or + (at your option) any later version. + + This program is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program. If not, see <http://www.gnu.org/licenses/>. + $ + */ + +#ifndef __MPU3050_H_ +#define __MPU3050_H_ + +#ifdef __KERNEL__ +#include <linux/types.h> +#endif + +#ifdef M_HW +#error MPU6000 build including MPU3050 header +#endif + +#define MPU_NAME "mpu3050" +#define DEFAULT_MPU_SLAVEADDR 0x68 + +/*==== MPU REGISTER SET ====*/ +enum mpu_register { + MPUREG_WHO_AM_I = 0, /* 00 0x00 */ + MPUREG_PRODUCT_ID, /* 01 0x01 */ + MPUREG_02_RSVD, /* 02 0x02 */ + MPUREG_03_RSVD, /* 03 0x03 */ + MPUREG_04_RSVD, /* 04 0x04 */ + MPUREG_XG_OFFS_TC, /* 05 0x05 */ + MPUREG_06_RSVD, /* 06 0x06 */ + MPUREG_07_RSVD, /* 07 0x07 */ + MPUREG_YG_OFFS_TC, /* 08 0x08 */ + MPUREG_09_RSVD, /* 09 0x09 */ + MPUREG_0A_RSVD, /* 10 0x0a */ + MPUREG_ZG_OFFS_TC, /* 11 0x0b */ + MPUREG_X_OFFS_USRH, /* 12 0x0c */ + MPUREG_X_OFFS_USRL, /* 13 0x0d */ + MPUREG_Y_OFFS_USRH, /* 14 0x0e */ + MPUREG_Y_OFFS_USRL, /* 15 0x0f */ + MPUREG_Z_OFFS_USRH, /* 16 0x10 */ + MPUREG_Z_OFFS_USRL, /* 17 0x11 */ + MPUREG_FIFO_EN1, /* 18 0x12 */ + MPUREG_FIFO_EN2, /* 19 0x13 */ + MPUREG_AUX_SLV_ADDR, /* 20 0x14 */ + MPUREG_SMPLRT_DIV, /* 21 0x15 */ + MPUREG_DLPF_FS_SYNC, /* 22 0x16 */ + MPUREG_INT_CFG, /* 23 0x17 */ + MPUREG_ACCEL_BURST_ADDR,/* 24 0x18 */ + MPUREG_19_RSVD, /* 25 0x19 */ + MPUREG_INT_STATUS, /* 26 0x1a */ + MPUREG_TEMP_OUT_H, /* 27 0x1b */ + MPUREG_TEMP_OUT_L, /* 28 0x1c */ + MPUREG_GYRO_XOUT_H, /* 29 0x1d */ + MPUREG_GYRO_XOUT_L, /* 30 0x1e */ + MPUREG_GYRO_YOUT_H, /* 31 0x1f */ + MPUREG_GYRO_YOUT_L, /* 32 0x20 */ + MPUREG_GYRO_ZOUT_H, /* 33 0x21 */ + MPUREG_GYRO_ZOUT_L, /* 34 0x22 */ + MPUREG_23_RSVD, /* 35 0x23 */ + MPUREG_24_RSVD, /* 36 0x24 */ + MPUREG_25_RSVD, /* 37 0x25 */ + MPUREG_26_RSVD, /* 38 0x26 */ + MPUREG_27_RSVD, /* 39 0x27 */ + MPUREG_28_RSVD, /* 40 0x28 */ + MPUREG_29_RSVD, /* 41 0x29 */ + MPUREG_2A_RSVD, /* 42 0x2a */ + MPUREG_2B_RSVD, /* 43 0x2b */ + MPUREG_2C_RSVD, /* 44 0x2c */ + MPUREG_2D_RSVD, /* 45 0x2d */ + MPUREG_2E_RSVD, /* 46 0x2e */ + MPUREG_2F_RSVD, /* 47 0x2f */ + MPUREG_30_RSVD, /* 48 0x30 */ + MPUREG_31_RSVD, /* 49 0x31 */ + MPUREG_32_RSVD, /* 50 0x32 */ + MPUREG_33_RSVD, /* 51 0x33 */ + MPUREG_34_RSVD, /* 52 0x34 */ + MPUREG_DMP_CFG_1, /* 53 0x35 */ + MPUREG_DMP_CFG_2, /* 54 0x36 */ + MPUREG_BANK_SEL, /* 55 0x37 */ + MPUREG_MEM_START_ADDR, /* 56 0x38 */ + MPUREG_MEM_R_W, /* 57 0x39 */ + MPUREG_FIFO_COUNTH, /* 58 0x3a */ + MPUREG_FIFO_COUNTL, /* 59 0x3b */ + MPUREG_FIFO_R_W, /* 60 0x3c */ + MPUREG_USER_CTRL, /* 61 0x3d */ + MPUREG_PWR_MGM, /* 62 0x3e */ + MPUREG_3F_RSVD, /* 63 0x3f */ + NUM_OF_MPU_REGISTERS /* 64 0x40 */ +}; + +/*==== BITS FOR MPU ====*/ + +/*---- MPU 'FIFO_EN1' register (12) ----*/ +#define BIT_TEMP_OUT 0x80 +#define BIT_GYRO_XOUT 0x40 +#define BIT_GYRO_YOUT 0x20 +#define BIT_GYRO_ZOUT 0x10 +#define BIT_ACCEL_XOUT 0x08 +#define BIT_ACCEL_YOUT 0x04 +#define BIT_ACCEL_ZOUT 0x02 +#define BIT_AUX_1OUT 0x01 +/*---- MPU 'FIFO_EN2' register (13) ----*/ +#define BIT_AUX_2OUT 0x02 +#define BIT_AUX_3OUT 0x01 +/*---- MPU 'DLPF_FS_SYNC' register (16) ----*/ +#define BITS_EXT_SYNC_NONE 0x00 +#define BITS_EXT_SYNC_TEMP 0x20 +#define BITS_EXT_SYNC_GYROX 0x40 +#define BITS_EXT_SYNC_GYROY 0x60 +#define BITS_EXT_SYNC_GYROZ 0x80 +#define BITS_EXT_SYNC_ACCELX 0xA0 +#define BITS_EXT_SYNC_ACCELY 0xC0 +#define BITS_EXT_SYNC_ACCELZ 0xE0 +#define BITS_EXT_SYNC_MASK 0xE0 +#define BITS_FS_250DPS 0x00 +#define BITS_FS_500DPS 0x08 +#define BITS_FS_1000DPS 0x10 +#define BITS_FS_2000DPS 0x18 +#define BITS_FS_MASK 0x18 +#define BITS_DLPF_CFG_256HZ_NOLPF2 0x00 +#define BITS_DLPF_CFG_188HZ 0x01 +#define BITS_DLPF_CFG_98HZ 0x02 +#define BITS_DLPF_CFG_42HZ 0x03 +#define BITS_DLPF_CFG_20HZ 0x04 +#define BITS_DLPF_CFG_10HZ 0x05 +#define BITS_DLPF_CFG_5HZ 0x06 +#define BITS_DLPF_CFG_2100HZ_NOLPF 0x07 +#define BITS_DLPF_CFG_MASK 0x07 +/*---- MPU 'INT_CFG' register (17) ----*/ +#define BIT_ACTL 0x80 +#define BIT_ACTL_LOW 0x80 +#define BIT_ACTL_HIGH 0x00 +#define BIT_OPEN 0x40 +#define BIT_OPEN_DRAIN 0x40 +#define BIT_PUSH_PULL 0x00 +#define BIT_LATCH_INT_EN 0x20 +#define BIT_LATCH_INT_EN 0x20 +#define BIT_INT_PULSE_WIDTH_50US 0x00 +#define BIT_INT_ANYRD_2CLEAR 0x10 +#define BIT_INT_STAT_READ_2CLEAR 0x00 +#define BIT_MPU_RDY_EN 0x04 +#define BIT_DMP_INT_EN 0x02 +#define BIT_RAW_RDY_EN 0x01 +/*---- MPU 'INT_STATUS' register (1A) ----*/ +#define BIT_INT_STATUS_FIFO_OVERLOW 0x80 +#define BIT_MPU_RDY 0x04 +#define BIT_DMP_INT 0x02 +#define BIT_RAW_RDY 0x01 +/*---- MPU 'BANK_SEL' register (37) ----*/ +#define BIT_PRFTCH_EN 0x20 +#define BIT_CFG_USER_BANK 0x10 +#define BITS_MEM_SEL 0x0f +/*---- MPU 'USER_CTRL' register (3D) ----*/ +#define BIT_DMP_EN 0x80 +#define BIT_FIFO_EN 0x40 +#define BIT_AUX_IF_EN 0x20 +#define BIT_AUX_RD_LENG 0x10 +#define BIT_AUX_IF_RST 0x08 +#define BIT_DMP_RST 0x04 +#define BIT_FIFO_RST 0x02 +#define BIT_GYRO_RST 0x01 +/*---- MPU 'PWR_MGM' register (3E) ----*/ +#define BIT_H_RESET 0x80 +#define BIT_SLEEP 0x40 +#define BIT_STBY_XG 0x20 +#define BIT_STBY_YG 0x10 +#define BIT_STBY_ZG 0x08 +#define BITS_CLKSEL 0x07 + +/*---- MPU Silicon Revision ----*/ +#define MPU_SILICON_REV_A4 1 /* MPU A4 Device */ +#define MPU_SILICON_REV_B1 2 /* MPU B1 Device */ +#define MPU_SILICON_REV_B4 3 /* MPU B4 Device */ +#define MPU_SILICON_REV_B6 4 /* MPU B6 Device */ + +/*---- MPU Memory ----*/ +#define MPU_MEM_BANK_SIZE (256) +#define FIFO_HW_SIZE (512) + +enum MPU_MEMORY_BANKS { + MPU_MEM_RAM_BANK_0 = 0, + MPU_MEM_RAM_BANK_1, + MPU_MEM_RAM_BANK_2, + MPU_MEM_RAM_BANK_3, + MPU_MEM_NUM_RAM_BANKS, + MPU_MEM_OTP_BANK_0 = MPU_MEM_NUM_RAM_BANKS, + /* This one is always last */ + MPU_MEM_NUM_BANKS +}; + +#define MPU_NUM_AXES (3) + +/*---- structure containing control variables used by MLDL ----*/ +/*---- MPU clock source settings ----*/ +/*---- MPU filter selections ----*/ +enum mpu_filter { + MPU_FILTER_256HZ_NOLPF2 = 0, + MPU_FILTER_188HZ, + MPU_FILTER_98HZ, + MPU_FILTER_42HZ, + MPU_FILTER_20HZ, + MPU_FILTER_10HZ, + MPU_FILTER_5HZ, + MPU_FILTER_2100HZ_NOLPF, + NUM_MPU_FILTER +}; + +enum mpu_fullscale { + MPU_FS_250DPS = 0, + MPU_FS_500DPS, + MPU_FS_1000DPS, + MPU_FS_2000DPS, + NUM_MPU_FS +}; + +enum mpu_clock_sel { + MPU_CLK_SEL_INTERNAL = 0, + MPU_CLK_SEL_PLLGYROX, + MPU_CLK_SEL_PLLGYROY, + MPU_CLK_SEL_PLLGYROZ, + MPU_CLK_SEL_PLLEXT32K, + MPU_CLK_SEL_PLLEXT19M, + MPU_CLK_SEL_RESERVED, + MPU_CLK_SEL_STOP, + NUM_CLK_SEL +}; + +enum mpu_ext_sync { + MPU_EXT_SYNC_NONE = 0, + MPU_EXT_SYNC_TEMP, + MPU_EXT_SYNC_GYROX, + MPU_EXT_SYNC_GYROY, + MPU_EXT_SYNC_GYROZ, + MPU_EXT_SYNC_ACCELX, + MPU_EXT_SYNC_ACCELY, + MPU_EXT_SYNC_ACCELZ, + NUM_MPU_EXT_SYNC +}; + +#define DLPF_FS_SYNC_VALUE(ext_sync, full_scale, lpf) \ + ((ext_sync << 5) | (full_scale << 3) | lpf) + +#endif /* __MPU3050_H_ */ diff --git a/include/linux/mpu6000.h b/include/linux/mpu6000.h new file mode 100644 index 000000000000..5a63c8f07b70 --- /dev/null +++ b/include/linux/mpu6000.h @@ -0,0 +1,406 @@ +/* + $License: + Copyright (C) 2010 InvenSense Corporation, All Rights Reserved. + + This program is free software; you can redistribute it and/or modify + it under the terms of the GNU General Public License as published by + the Free Software Foundation; either version 2 of the License, or + (at your option) any later version. + + This program is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program. If not, see <http://www.gnu.org/licenses/>. + $ + */ + +/** + * @defgroup + * @brief + * + * @{ + * @file mpu6000.h + * @brief + */ + +#ifndef __MPU6000_H_ +#define __MPU6000_H_ + +#define MPU_NAME "mpu6000" +#define DEFAULT_MPU_SLAVEADDR 0x68 + +/*==== M_HW REGISTER SET ====*/ +enum { + MPUREG_XG_OFFS_TC = 0, /* 0x00 */ + MPUREG_YG_OFFS_TC, /* 0x00 */ + MPUREG_ZG_OFFS_TC, /* 0x00 */ + MPUREG_X_FINE_GAIN, /* 0x00 */ + MPUREG_Y_FINE_GAIN, /* 0x00 */ + MPUREG_Z_FINE_GAIN, /* 0x00 */ + MPUREG_XA_OFFS_H, /* 0x00 */ + MPUREG_XA_OFFS_L_TC, /* 0x00 */ + MPUREG_YA_OFFS_H, /* 0x00 */ + MPUREG_YA_OFFS_L_TC, /* 0x00 */ + MPUREG_ZA_OFFS_H, /* 0x00 */ + MPUREG_ZA_OFFS_L_TC, /* 0xB */ + MPUREG_0C_RSVD, /* 0x00 */ + MPUREG_0D_RSVD, /* 0x00 */ + MPUREG_0E_RSVD, /* 0x00 */ + MPUREG_0F_RSVD, /* 0x00 */ + MPUREG_10_RSVD, /* 0x00 */ + MPUREG_11_RSVD, /* 0x00 */ + MPUREG_12_RSVD, /* 0x00 */ + MPUREG_XG_OFFS_USRH, /* 0x00 */ + MPUREG_XG_OFFS_USRL, /* 0x00 */ + MPUREG_YG_OFFS_USRH, /* 0x00 */ + MPUREG_YG_OFFS_USRL, /* 0x00 */ + MPUREG_ZG_OFFS_USRH, /* 0x00 */ + MPUREG_ZG_OFFS_USRL, /* 0x00 */ + MPUREG_SMPLRT_DIV, /* 0x19 */ + MPUREG_CONFIG, /* 0x1A ==> DLPF_FS_SYNC */ + MPUREG_GYRO_CONFIG, /* 0x00 */ + MPUREG_ACCEL_CONFIG, /* 0x00 */ + MPUREG_ACCEL_FF_THR, /* 0x00 */ + MPUREG_ACCEL_FF_DUR, /* 0x00 */ + MPUREG_ACCEL_MOT_THR, /* 0x00 */ + MPUREG_ACCEL_MOT_DUR, /* 0x00 */ + MPUREG_ACCEL_ZRMOT_THR, /* 0x00 */ + MPUREG_ACCEL_ZRMOT_DUR, /* 0x00 */ + MPUREG_FIFO_EN, /* 0x23 */ + MPUREG_I2C_MST_CTRL, /* 0x00 */ + MPUREG_I2C_SLV0_ADDR, /* 0x25 */ + MPUREG_I2C_SLV0_REG, /* 0x00 */ + MPUREG_I2C_SLV0_CTRL, /* 0x00 */ + MPUREG_I2C_SLV1_ADDR, /* 0x28 */ + MPUREG_I2C_SLV1_REG_PASSWORD, /* 0x00 */ + MPUREG_I2C_SLV1_CTRL, /* 0x00 */ + MPUREG_I2C_SLV2_ADDR, /* 0x2B */ + MPUREG_I2C_SLV2_REG, /* 0x00 */ + MPUREG_I2C_SLV2_CTRL, /* 0x00 */ + MPUREG_I2C_SLV3_ADDR, /* 0x2E */ + MPUREG_I2C_SLV3_REG, /* 0x00 */ + MPUREG_I2C_SLV3_CTRL, /* 0x00 */ + MPUREG_I2C_SLV4_ADDR, /* 0x31 */ + MPUREG_I2C_SLV4_REG, /* 0x00 */ + MPUREG_I2C_SLV4_DO, /* 0x00 */ + MPUREG_I2C_SLV4_CTRL, /* 0x00 */ + MPUREG_I2C_SLV4_DI, /* 0x00 */ + MPUREG_I2C_MST_STATUS, /* 0x36 */ + MPUREG_INT_PIN_CFG, /* 0x37 ==> -* INT_CFG */ + MPUREG_INT_ENABLE, /* 0x38 ==> / */ + MPUREG_DMP_INT_STATUS, /* 0x39 */ + MPUREG_INT_STATUS, /* 0x3A */ + MPUREG_ACCEL_XOUT_H, /* 0x3B */ + MPUREG_ACCEL_XOUT_L, /* 0x00 */ + MPUREG_ACCEL_YOUT_H, /* 0x00 */ + MPUREG_ACCEL_YOUT_L, /* 0x00 */ + MPUREG_ACCEL_ZOUT_H, /* 0x00 */ + MPUREG_ACCEL_ZOUT_L, /* 0x00 */ + MPUREG_TEMP_OUT_H, /* 0x41 */ + MPUREG_TEMP_OUT_L, /* 0x00 */ + MPUREG_GYRO_XOUT_H, /* 0x43 */ + MPUREG_GYRO_XOUT_L, /* 0x00 */ + MPUREG_GYRO_YOUT_H, /* 0x00 */ + MPUREG_GYRO_YOUT_L, /* 0x00 */ + MPUREG_GYRO_ZOUT_H, /* 0x00 */ + MPUREG_GYRO_ZOUT_L, /* 0x00 */ + MPUREG_EXT_SLV_SENS_DATA_00, /* 0x49 */ + MPUREG_EXT_SLV_SENS_DATA_01, /* 0x00 */ + MPUREG_EXT_SLV_SENS_DATA_02, /* 0x00 */ + MPUREG_EXT_SLV_SENS_DATA_03, /* 0x00 */ + MPUREG_EXT_SLV_SENS_DATA_04, /* 0x00 */ + MPUREG_EXT_SLV_SENS_DATA_05, /* 0x00 */ + MPUREG_EXT_SLV_SENS_DATA_06, /* 0x4F */ + MPUREG_EXT_SLV_SENS_DATA_07, /* 0x00 */ + MPUREG_EXT_SLV_SENS_DATA_08, /* 0x00 */ + MPUREG_EXT_SLV_SENS_DATA_09, /* 0x00 */ + MPUREG_EXT_SLV_SENS_DATA_10, /* 0x00 */ + MPUREG_EXT_SLV_SENS_DATA_11, /* 0x00 */ + MPUREG_EXT_SLV_SENS_DATA_12, /* 0x55 */ + MPUREG_EXT_SLV_SENS_DATA_13, /* 0x00 */ + MPUREG_EXT_SLV_SENS_DATA_14, /* 0x00 */ + MPUREG_EXT_SLV_SENS_DATA_15, /* 0x00 */ + MPUREG_EXT_SLV_SENS_DATA_16, /* 0x00 */ + MPUREG_EXT_SLV_SENS_DATA_17, /* 0x00 */ + MPUREG_EXT_SLV_SENS_DATA_18, /* 0x5B */ + MPUREG_EXT_SLV_SENS_DATA_19, /* 0x00 */ + MPUREG_EXT_SLV_SENS_DATA_20, /* 0x00 */ + MPUREG_EXT_SLV_SENS_DATA_21, /* 0x00 */ + MPUREG_EXT_SLV_SENS_DATA_22, /* 0x00 */ + MPUREG_EXT_SLV_SENS_DATA_23, /* 0x00 */ + ACCEL_INTEL_STATUS, /* 0x61 */ + MPUREG_62_RSVD, /* 0x00 */ + MPUREG_63_RSVD, /* 0x00 */ + MPUREG_64_RSVD, /* 0x00 */ + MPUREG_65_RSVD, /* 0x00 */ + MPUREG_66_RSVD, /* 0x00 */ + MPUREG_67_RSVD, /* 0x00 */ + SIGNAL_PATH_RESET, /* 0x68 */ + ACCEL_INTEL_CTRL, /* 0x69 */ + MPUREG_USER_CTRL, /* 0x6A */ + MPUREG_PWR_MGMT_1, /* 0x6B */ + MPUREG_PWR_MGMT_2, /* 0x00 */ + MPUREG_BANK_SEL, /* 0x6D */ + MPUREG_MEM_START_ADDR, /* 0x6E */ + MPUREG_MEM_R_W, /* 0x6F */ + MPUREG_PRGM_STRT_ADDRH, /* 0x00 */ + MPUREG_PRGM_STRT_ADDRL, /* 0x00 */ + MPUREG_FIFO_COUNTH, /* 0x72 */ + MPUREG_FIFO_COUNTL, /* 0x00 */ + MPUREG_FIFO_R_W, /* 0x74 */ + MPUREG_WHOAMI, /* 0x75,117 */ + + NUM_OF_MPU_REGISTERS /* = 0x76,118 */ +}; + +/*==== M_HW MEMORY ====*/ +enum MPU_MEMORY_BANKS { + MEM_RAM_BANK_0 = 0, + MEM_RAM_BANK_1, + MEM_RAM_BANK_2, + MEM_RAM_BANK_3, + MEM_RAM_BANK_4, + MEM_RAM_BANK_5, + MEM_RAM_BANK_6, + MEM_RAM_BANK_7, + MEM_RAM_BANK_8, + MEM_RAM_BANK_9, + MEM_RAM_BANK_10, + MEM_RAM_BANK_11, + MPU_MEM_NUM_RAM_BANKS, + MPU_MEM_OTP_BANK_0 = 16 +}; + + +/*==== M_HW parameters ====*/ + +#define NUM_REGS (NUM_OF_MPU_REGISTERS) +#define START_SENS_REGS (0x3B) +#define NUM_SENS_REGS (0x60-START_SENS_REGS+1) + +/*---- MPU Memory ----*/ +#define NUM_BANKS (MPU_MEM_NUM_RAM_BANKS) +#define BANK_SIZE (256) +#define MEM_SIZE (NUM_BANKS*BANK_SIZE) +#define MPU_MEM_BANK_SIZE (BANK_SIZE) /*alternative name */ + +#define FIFO_HW_SIZE (1024) + +#define NUM_EXT_SLAVES (4) + + +/*==== BITS FOR M_HW ====*/ + +/*---- M_HW 'FIFO_EN' register (23) ----*/ +#define BIT_TEMP_OUT 0x80 +#define BIT_GYRO_XOUT 0x40 +#define BIT_GYRO_YOUT 0x20 +#define BIT_GYRO_ZOUT 0x10 +#define BIT_ACCEL 0x08 +#define BIT_SLV_2 0x04 +#define BIT_SLV_1 0x02 +#define BIT_SLV_0 0x01 +/*---- M_HW 'CONFIG' register (1A) ----*/ +/*NONE 0xC0 */ +#define BITS_EXT_SYNC_SET 0x38 +#define BITS_DLPF_CFG 0x07 +/*---- M_HW 'GYRO_CONFIG' register (1B) ----*/ +/* voluntarily modified label from BITS_FS_SEL to + * BITS_GYRO_FS_SEL to avoid confusion with MPU + */ +#define BITS_GYRO_FS_SEL 0x18 +/*NONE 0x07 */ +/*---- M_HW 'ACCEL_CONFIG' register (1C) ----*/ +#define BITS_ACCEL_FS_SEL 0x18 +#define BITS_ACCEL_HPF 0x07 +/*---- M_HW 'I2C_MST_CTRL' register (24) ----*/ +#define BIT_MULT_MST_DIS 0x80 +#define BIT_WAIT_FOR_ES 0x40 +#define BIT_I2C_MST_VDDIO 0x20 +/*NONE 0x10 */ +#define BITS_I2C_MST_CLK 0x0F +/*---- M_HW 'I2C_SLV?_CTRL' register (27,2A,2D,30) ----*/ +#define BIT_SLV_ENABLE 0x80 +#define BIT_SLV_BYTE_SW 0x40 +/*NONE 0x20 */ +#define BIT_SLV_GRP 0x10 +#define BITS_SLV_LENG 0x0F +/*---- M_HW 'I2C_SLV4_ADDR' register (31) ----*/ +#define BIT_I2C_SLV4_RNW 0x80 +/*---- M_HW 'I2C_SLV4_CTRL' register (34) ----*/ +#define BIT_I2C_SLV4_EN 0x80 +#define BIT_SLV4_DONE_INT_EN 0x40 +/*NONE 0x3F */ +/*---- M_HW 'I2C_MST_STATUS' register (36) ----*/ +#define BIT_PASSTHROUGH 0x80 +#define BIT_I2C_SLV4_DONE 0x40 +#define BIT_I2C_LOST_ARB 0x20 +#define BIT_I2C_SLV4_NACK 0x10 +#define BIT_I2C_SLV3_NACK 0x08 +#define BIT_I2C_SLV2_NACK 0x04 +#define BIT_I2C_SLV1_NACK 0x02 +#define BIT_I2C_SLV0_NACK 0x01 +/*---- M_HW 'INT_PIN_CFG' register (37) ----*/ +#define BIT_ACTL 0x80 +#define BIT_ACTL_LOW 0x80 +#define BIT_ACTL_HIGH 0x00 +#define BIT_OPEN 0x40 +#define BIT_LATCH_INT_EN 0x20 +#define BIT_INT_ANYRD_2CLEAR 0x10 +#define BIT_ACTL_FSYNC 0x08 +#define BIT_FSYNC_INT_EN 0x04 +#define BIT_BYPASS_EN 0x02 +#define BIT_CLKOUT_EN 0x01 +/*---- M_HW 'INT_ENABLE' register (38) ----*/ +#define BIT_FF_EN 0x80 +#define BIT_MOT_EN 0x40 +#define BIT_ZMOT_EN 0x20 +#define BIT_FIFO_OVERFLOW_EN 0x10 +#define BIT_I2C_MST_INT_EN 0x08 +#define BIT_PLL_RDY_EN 0x04 +#define BIT_DMP_INT_EN 0x02 +#define BIT_RAW_RDY_EN 0x01 +/*---- M_HW 'DMP_INT_STATUS' register (39) ----*/ +/*NONE 0x80 */ +/*NONE 0x40 */ +#define BIT_DMP_INT_5 0x20 +#define BIT_DMP_INT_4 0x10 +#define BIT_DMP_INT_3 0x08 +#define BIT_DMP_INT_2 0x04 +#define BIT_DMP_INT_1 0x02 +#define BIT_DMP_INT_0 0x01 +/*---- M_HW 'INT_STATUS' register (3A) ----*/ +#define BIT_FF_INT 0x80 +#define BIT_MOT_INT 0x40 +#define BIT_ZMOT_INT 0x20 +#define BIT_FIFO_OVERFLOW_INT 0x10 +#define BIT_I2C_MST_INT 0x08 +#define BIT_PLL_RDY_INT 0x04 +#define BIT_DMP_INT 0x02 +#define BIT_RAW_DATA_RDY_INT 0x01 +/*---- M_HW 'BANK_SEL' register (6D) ----*/ +#define BIT_PRFTCH_EN 0x40 +#define BIT_CFG_USER_BANK 0x20 +#define BITS_MEM_SEL 0x1f +/*---- M_HW 'USER_CTRL' register (6A) ----*/ +#define BIT_DMP_EN 0x80 +#define BIT_FIFO_EN 0x40 +#define BIT_I2C_MST_EN 0x20 +#define BIT_I2C_IF_DIS 0x10 +#define BIT_DMP_RST 0x08 +#define BIT_FIFO_RST 0x04 +#define BIT_I2C_MST_RST 0x02 +#define BIT_SIG_COND_RST 0x01 +/*---- M_HW 'PWR_MGMT_1' register (6B) ----*/ +#define BIT_H_RESET 0x80 +#define BITS_PWRSEL 0x70 +#define BIT_WKUP_INT 0x08 +#define BITS_CLKSEL 0x07 +/*---- M_HW 'PWR_MGMT_2' register (6C) ----*/ +#define BITS_LPA_WAKE_CTRL 0xC0 +#define BIT_STBY_XA 0x20 +#define BIT_STBY_YA 0x10 +#define BIT_STBY_ZA 0x08 +#define BIT_STBY_XG 0x04 +#define BIT_STBY_YG 0x02 +#define BIT_STBY_ZG 0x01 + +/* although it has 6, this refers to the gyros */ +#define MPU_NUM_AXES (3) + +#define ACCEL_MOT_THR_LSB (32) /* mg */ +#define ACCEL_MOT_DUR_LSB (1) +#define ACCEL_ZRMOT_THR_LSB_CONVERSION(mg) ((mg *1000)/255) +#define ACCEL_ZRMOT_DUR_LSB (64) + +/*----------------------------------------------------------------------------*/ +/*---- Alternative names to take care of conflicts with current mpu3050.h ----*/ +/*----------------------------------------------------------------------------*/ + +/*-- registers --*/ +#define MPUREG_DLPF_FS_SYNC MPUREG_CONFIG /* 0x1A */ + +#define MPUREG_PRODUCT_ID MPUREG_WHOAMI /* 0x75 HACK!*/ +#define MPUREG_PWR_MGM MPUREG_PWR_MGMT_1 /* 0x6B */ +#define MPUREG_FIFO_EN1 MPUREG_FIFO_EN /* 0x23 */ +#define MPUREG_DMP_CFG_1 MPUREG_PRGM_STRT_ADDRH /* 0x70 */ +#define MPUREG_DMP_CFG_2 MPUREG_PRGM_STRT_ADDRL /* 0x71 */ +#define MPUREG_INT_CFG MPUREG_INT_ENABLE /* 0x38 */ +#define MPUREG_X_OFFS_USRH MPUREG_XG_OFFS_USRH /* 0x13 */ +#define MPUREG_WHO_AM_I MPUREG_WHOAMI /* 0x75 */ +#define MPUREG_23_RSVD MPUREG_EXT_SLV_SENS_DATA_00 /* 0x49 */ +#define MPUREG_AUX_SLV_ADDR MPUREG_I2C_SLV0_ADDR /* 0x25 */ +#define MPUREG_ACCEL_BURST_ADDR MPUREG_I2C_SLV0_REG /* 0x26 */ + +/*-- bits --*/ +/* 'USER_CTRL' register */ +#define BIT_AUX_IF_EN BIT_I2C_MST_EN +#define BIT_AUX_RD_LENG BIT_I2C_MST_EN +#define BIT_IME_IF_RST BIT_I2C_MST_RST +#define BIT_GYRO_RST BIT_SIG_COND_RST +/* 'INT_ENABLE' register */ +#define BIT_RAW_RDY BIT_RAW_DATA_RDY_INT +#define BIT_MPU_RDY_EN BIT_PLL_RDY_EN +/* 'INT_STATUS' register */ +#define BIT_INT_STATUS_FIFO_OVERLOW BIT_FIFO_OVERFLOW_INT + + + +/*---- M_HW Silicon Revisions ----*/ +#define MPU_SILICON_REV_A1 1 /* M_HW A1 Device */ +#define MPU_SILICON_REV_B1 2 /* M_HW B1 Device */ + +/*---- structure containing control variables used by MLDL ----*/ +/*---- MPU clock source settings ----*/ +/*---- MPU filter selections ----*/ +enum mpu_filter { + MPU_FILTER_256HZ_NOLPF2 = 0, + MPU_FILTER_188HZ, + MPU_FILTER_98HZ, + MPU_FILTER_42HZ, + MPU_FILTER_20HZ, + MPU_FILTER_10HZ, + MPU_FILTER_5HZ, + MPU_FILTER_2100HZ_NOLPF, + NUM_MPU_FILTER +}; + +enum mpu_fullscale { + MPU_FS_250DPS = 0, + MPU_FS_500DPS, + MPU_FS_1000DPS, + MPU_FS_2000DPS, + NUM_MPU_FS +}; + +enum mpu_clock_sel { + MPU_CLK_SEL_INTERNAL = 0, + MPU_CLK_SEL_PLLGYROX, + MPU_CLK_SEL_PLLGYROY, + MPU_CLK_SEL_PLLGYROZ, + MPU_CLK_SEL_PLLEXT32K, + MPU_CLK_SEL_PLLEXT19M, + MPU_CLK_SEL_RESERVED, + MPU_CLK_SEL_STOP, + NUM_CLK_SEL +}; + +enum mpu_ext_sync { + MPU_EXT_SYNC_NONE = 0, + MPU_EXT_SYNC_TEMP, + MPU_EXT_SYNC_GYROX, + MPU_EXT_SYNC_GYROY, + MPU_EXT_SYNC_GYROZ, + MPU_EXT_SYNC_ACCELX, + MPU_EXT_SYNC_ACCELY, + MPU_EXT_SYNC_ACCELZ, + NUM_MPU_EXT_SYNC +}; + +#define DLPF_FS_SYNC_VALUE(ext_sync, full_scale, lpf) \ + ((ext_sync << 5) | (full_scale << 3) | lpf) + +#endif /* __IMU6000_H_ */ diff --git a/include/linux/msdos_fs.h b/include/linux/msdos_fs.h index 34066e65fdeb..f38d4f0a5ae8 100644 --- a/include/linux/msdos_fs.h +++ b/include/linux/msdos_fs.h @@ -101,6 +101,7 @@ struct __fat_dirent { /* <linux/videotext.h> has used 0x72 ('r') in collision, so skip a few */ #define FAT_IOCTL_GET_ATTRIBUTES _IOR('r', 0x10, __u32) #define FAT_IOCTL_SET_ATTRIBUTES _IOW('r', 0x11, __u32) +#define VFAT_IOCTL_GET_VOLUME_ID _IOR('r', 0x12, __u32) struct fat_boot_sector { __u8 ignored[3]; /* Boot strap short or near jump */ @@ -138,6 +139,17 @@ struct fat_boot_fsinfo { __le32 reserved2[4]; }; +struct fat_boot_bsx { + __u8 drive; /* drive number */ + __u8 reserved1; + __u8 signature; /* extended boot signature */ + __u8 vol_id[4]; /* volume ID */ + __u8 vol_label[11]; /* volume label */ + __u8 type[8]; /* file system type */ +}; +#define FAT16_BSX_OFFSET 36 /* offset of fat_boot_bsx in FAT12 and FAT16 */ +#define FAT32_BSX_OFFSET 64 /* offset of fat_boot_bsx in FAT32 */ + struct msdos_dir_entry { __u8 name[MSDOS_NAME];/* name and extension */ __u8 attr; /* attribute bits */ diff --git a/include/linux/nct1008.h b/include/linux/nct1008.h new file mode 100644 index 000000000000..d2be5dba1563 --- /dev/null +++ b/include/linux/nct1008.h @@ -0,0 +1,98 @@ +/* + * include/linux/nct1008.h + * + * NCT1008, temperature monitoring device from ON Semiconductors + * + * Copyright (c) 2010, NVIDIA Corporation. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + * more details. + * + * You should have received a copy of the GNU General Public License along + * with this program; if not, write to the Free Software Foundation, Inc., + * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, USA. + */ + +#ifndef _LINUX_NCT1008_H +#define _LINUX_NCT1008_H + +#include <linux/types.h> + +#include <mach/edp.h> + +#define MAX_ZONES 16 + +struct nct1008_data; + +struct nct1008_platform_data { + bool supported_hwrev; + bool ext_range; + u8 conv_rate; + u8 offset; + u8 hysteresis; + s8 shutdown_ext_limit; + s8 shutdown_local_limit; + s8 throttling_ext_limit; + s8 thermal_zones[MAX_ZONES]; + u8 thermal_zones_sz; + void (*alarm_fn)(bool raised); + void (*probe_callback)(struct nct1008_data *); +}; + +struct nct1008_data { + struct work_struct work; + struct i2c_client *client; + struct nct1008_platform_data plat_data; + struct mutex mutex; + struct dentry *dent; + u8 config; + s8 *limits; + u8 limits_sz; + void (*alarm_fn)(bool raised); + struct regulator *nct_reg; + long current_lo_limit; + long current_hi_limit; + + void (*alert_func)(void *); + void *alert_data; +}; + +#ifdef CONFIG_SENSORS_NCT1008 +int nct1008_thermal_get_temp(struct nct1008_data *data, long *temp); +int nct1008_thermal_get_temp_low(struct nct1008_data *data, long *temp); +int nct1008_thermal_set_limits(struct nct1008_data *data, + long lo_limit_milli, + long hi_limit_milli); +int nct1008_thermal_set_alert(struct nct1008_data *data, + void (*alert_func)(void *), + void *alert_data); +int nct1008_thermal_set_shutdown_temp(struct nct1008_data *data, + long shutdown_temp); +#else +static inline int nct1008_thermal_get_temp(struct nct1008_data *data, + long *temp) +{ return -EINVAL; } +static inline int nct1008_thermal_get_temp_low(struct nct1008_data *data, + long *temp) +{ return -EINVAL; } +static inline int nct1008_thermal_set_limits(struct nct1008_data *data, + long lo_limit_milli, + long hi_limit_milli) +{ return -EINVAL; } +static inline int nct1008_thermal_set_alert(struct nct1008_data *data, + void (*alert_func)(void *), + void *alert_data) +{ return -EINVAL; } +static inline int nct1008_thermal_set_shutdown_temp(struct nct1008_data *data, + long shutdown_temp) +{ return -EINVAL; } +#endif + +#endif /* _LINUX_NCT1008_H */ diff --git a/include/linux/netfilter/xt_qtaguid.h b/include/linux/netfilter/xt_qtaguid.h new file mode 100644 index 000000000000..ca60fbdec2f3 --- /dev/null +++ b/include/linux/netfilter/xt_qtaguid.h @@ -0,0 +1,13 @@ +#ifndef _XT_QTAGUID_MATCH_H +#define _XT_QTAGUID_MATCH_H + +/* For now we just replace the xt_owner. + * FIXME: make iptables aware of qtaguid. */ +#include <linux/netfilter/xt_owner.h> + +#define XT_QTAGUID_UID XT_OWNER_UID +#define XT_QTAGUID_GID XT_OWNER_GID +#define XT_QTAGUID_SOCKET XT_OWNER_SOCKET +#define xt_qtaguid_match_info xt_owner_match_info + +#endif /* _XT_QTAGUID_MATCH_H */ diff --git a/include/linux/netfilter/xt_quota2.h b/include/linux/netfilter/xt_quota2.h new file mode 100644 index 000000000000..eadc6903314e --- /dev/null +++ b/include/linux/netfilter/xt_quota2.h @@ -0,0 +1,25 @@ +#ifndef _XT_QUOTA_H +#define _XT_QUOTA_H + +enum xt_quota_flags { + XT_QUOTA_INVERT = 1 << 0, + XT_QUOTA_GROW = 1 << 1, + XT_QUOTA_PACKET = 1 << 2, + XT_QUOTA_NO_CHANGE = 1 << 3, + XT_QUOTA_MASK = 0x0F, +}; + +struct xt_quota_counter; + +struct xt_quota_mtinfo2 { + char name[15]; + u_int8_t flags; + + /* Comparison-invariant */ + aligned_u64 quota; + + /* Used internally by the kernel */ + struct xt_quota_counter *master __attribute__((aligned(8))); +}; + +#endif /* _XT_QUOTA_H */ diff --git a/include/linux/netfilter/xt_socket.h b/include/linux/netfilter/xt_socket.h index 26d7217bd4f1..63594564831c 100644 --- a/include/linux/netfilter/xt_socket.h +++ b/include/linux/netfilter/xt_socket.h @@ -11,4 +11,10 @@ struct xt_socket_mtinfo1 { __u8 flags; }; +void xt_socket_put_sk(struct sock *sk); +struct sock *xt_socket_get4_sk(const struct sk_buff *skb, + struct xt_action_param *par); +struct sock *xt_socket_get6_sk(const struct sk_buff *skb, + struct xt_action_param *par); + #endif /* _XT_SOCKET_H */ diff --git a/include/linux/nfc/pn544.h b/include/linux/nfc/pn544.h index 7ab8521f2347..9285000dbb46 100644 --- a/include/linux/nfc/pn544.h +++ b/include/linux/nfc/pn544.h @@ -1,97 +1,33 @@ /* - * Driver include for the PN544 NFC chip. + * Copyright (C) 2010 Trusted Logic S.A. * - * Copyright (C) Nokia Corporation - * - * Author: Jari Vanhala <ext-jari.vanhala@nokia.com> - * Contact: Matti Aaltoenn <matti.j.aaltonen@nokia.com> - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License - * version 2 as published by the Free Software Foundation. + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. * * This program is distributed in the hope that it will be useful, * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the * GNU General Public License for more details. * * You should have received a copy of the GNU General Public License * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA */ -#ifndef _PN544_H_ -#define _PN544_H_ - -#include <linux/i2c.h> - -#define PN544_DRIVER_NAME "pn544" -#define PN544_MAXWINDOW_SIZE 7 -#define PN544_WINDOW_SIZE 4 -#define PN544_RETRIES 10 -#define PN544_MAX_I2C_TRANSFER 0x0400 -#define PN544_MSG_MAX_SIZE 0x21 /* at normal HCI mode */ - -/* ioctl */ -#define PN544_CHAR_BASE 'P' -#define PN544_IOR(num, dtype) _IOR(PN544_CHAR_BASE, num, dtype) -#define PN544_IOW(num, dtype) _IOW(PN544_CHAR_BASE, num, dtype) -#define PN544_GET_FW_MODE PN544_IOW(1, unsigned int) -#define PN544_SET_FW_MODE PN544_IOW(2, unsigned int) -#define PN544_GET_DEBUG PN544_IOW(3, unsigned int) -#define PN544_SET_DEBUG PN544_IOW(4, unsigned int) - -/* Timing restrictions (ms) */ -#define PN544_RESETVEN_TIME 30 /* 7 */ -#define PN544_PVDDVEN_TIME 0 -#define PN544_VBATVEN_TIME 0 -#define PN544_GPIO4VEN_TIME 0 -#define PN544_WAKEUP_ACK 5 -#define PN544_WAKEUP_GUARD (PN544_WAKEUP_ACK + 1) -#define PN544_INACTIVITY_TIME 1000 -#define PN544_INTERFRAME_DELAY 200 /* us */ -#define PN544_BAUDRATE_CHANGE 150 /* us */ - -/* Debug bits */ -#define PN544_DEBUG_BUF 0x01 -#define PN544_DEBUG_READ 0x02 -#define PN544_DEBUG_WRITE 0x04 -#define PN544_DEBUG_IRQ 0x08 -#define PN544_DEBUG_CALLS 0x10 -#define PN544_DEBUG_MODE 0x20 - -/* Normal (HCI) mode */ -#define PN544_LLC_HCI_OVERHEAD 3 /* header + crc (to length) */ -#define PN544_LLC_MIN_SIZE (1 + PN544_LLC_HCI_OVERHEAD) /* length + */ -#define PN544_LLC_MAX_DATA (PN544_MSG_MAX_SIZE - 2) -#define PN544_LLC_MAX_HCI_SIZE (PN544_LLC_MAX_DATA - 2) +#define PN544_MAGIC 0xE9 -struct pn544_llc_packet { - unsigned char length; /* of rest of packet */ - unsigned char header; - unsigned char data[PN544_LLC_MAX_DATA]; /* includes crc-ccitt */ -}; - -/* Firmware upgrade mode */ -#define PN544_FW_HEADER_SIZE 3 -/* max fw transfer is 1024bytes, but I2C limits it to 0xC0 */ -#define PN544_MAX_FW_DATA (PN544_MAX_I2C_TRANSFER - PN544_FW_HEADER_SIZE) - -struct pn544_fw_packet { - unsigned char command; /* status in answer */ - unsigned char length[2]; /* big-endian order (msf) */ - unsigned char data[PN544_MAX_FW_DATA]; -}; +/* + * PN544 power control via ioctl + * PN544_SET_PWR(0): power off + * PN544_SET_PWR(1): power on + * PN544_SET_PWR(2): reset and power on with firmware download enabled + */ +#define PN544_SET_PWR _IOW(PN544_MAGIC, 0x01, unsigned int) -#ifdef __KERNEL__ -/* board config */ -struct pn544_nfc_platform_data { - int (*request_resources) (struct i2c_client *client); - void (*free_resources) (void); - void (*enable) (int fw); - int (*test) (void); - void (*disable) (void); +struct pn544_i2c_platform_data { + unsigned int irq_gpio; + unsigned int ven_gpio; + unsigned int firm_gpio; }; -#endif /* __KERNEL__ */ - -#endif /* _PN544_H_ */ diff --git a/include/linux/nvhost.h b/include/linux/nvhost.h new file mode 100644 index 000000000000..a1d211de1ef1 --- /dev/null +++ b/include/linux/nvhost.h @@ -0,0 +1,73 @@ +/* + * include/linux/nvhost.h + * + * Tegra graphics host driver + * + * Copyright (c) 2009-2011, NVIDIA Corporation. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + * more details. + * + * You should have received a copy of the GNU General Public License along + * with this program; if not, write to the Free Software Foundation, Inc., + * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, USA. + */ + +#ifndef __LINUX_NVHOST_H +#define __LINUX_NVHOST_H + +#include <linux/device.h> +#include <linux/types.h> + +struct nvhost_master; + +struct nvhost_device { + const char *name; + struct device dev; + int id; + u32 num_resources; + struct resource *resource; + + struct nvhost_master *host; +}; + +extern int nvhost_device_register(struct nvhost_device *); +extern void nvhost_device_unregister(struct nvhost_device *); + +extern struct bus_type nvhost_bus_type; + +struct nvhost_driver { + int (*probe)(struct nvhost_device *); + int (*remove)(struct nvhost_device *); + void (*shutdown)(struct nvhost_device *); + int (*suspend)(struct nvhost_device *, pm_message_t state); + int (*resume)(struct nvhost_device *); + struct device_driver driver; +}; + +extern int nvhost_driver_register(struct nvhost_driver *); +extern void nvhost_driver_unregister(struct nvhost_driver *); +extern struct resource *nvhost_get_resource(struct nvhost_device *, + unsigned int, unsigned int); +extern int nvhost_get_irq(struct nvhost_device *, unsigned int); +extern struct resource *nvhost_get_resource_byname(struct nvhost_device *, + unsigned int, const char *); +extern int nvhost_get_irq_byname(struct nvhost_device *, const char *); + +#define to_nvhost_device(x) container_of((x), struct nvhost_device, dev) +#define to_nvhost_driver(drv) (container_of((drv), struct nvhost_driver, \ + driver)) + +#define nvhost_get_drvdata(_dev) dev_get_drvdata(&(_dev)->dev) +#define nvhost_set_drvdata(_dev, data) dev_set_drvdata(&(_dev)->dev, (data)) + +int nvhost_bus_register(struct nvhost_master *host); + +#endif diff --git a/include/linux/nvhost_ioctl.h b/include/linux/nvhost_ioctl.h new file mode 100644 index 000000000000..a1fc0b7cd247 --- /dev/null +++ b/include/linux/nvhost_ioctl.h @@ -0,0 +1,204 @@ +/* + * include/linux/nvhost_ioctl.h + * + * Tegra graphics host driver + * + * Copyright (c) 2009-2011, NVIDIA Corporation. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + * more details. + * + * You should have received a copy of the GNU General Public License along + * with this program; if not, write to the Free Software Foundation, Inc., + * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, USA. + */ + +#ifndef __LINUX_NVHOST_IOCTL_H +#define __LINUX_NVHOST_IOCTL_H + +#include <linux/ioctl.h> +#include <linux/types.h> + +#if !defined(__KERNEL__) +#define __user +#endif + +#define NVHOST_INVALID_SYNCPOINT 0xFFFFFFFF +#define NVHOST_NO_TIMEOUT (-1) +#define NVHOST_NO_CONTEXT 0x0 +#define NVHOST_IOCTL_MAGIC 'H' +#define NVHOST_PRIORITY_LOW 50 +#define NVHOST_PRIORITY_MEDIUM 100 +#define NVHOST_PRIORITY_HIGH 150 + +/* version 0 header (used with write() submit interface) */ +struct nvhost_submit_hdr { + __u32 syncpt_id; + __u32 syncpt_incrs; + __u32 num_cmdbufs; + __u32 num_relocs; +}; + +#define NVHOST_SUBMIT_VERSION_V0 0x0 +#define NVHOST_SUBMIT_VERSION_V1 0x1 +#define NVHOST_SUBMIT_VERSION_V2 0x2 +#define NVHOST_SUBMIT_VERSION_MAX_SUPPORTED NVHOST_SUBMIT_VERSION_V2 + +/* version 1 header (used with ioctl() submit interface) */ +struct nvhost_submit_hdr_ext { + __u32 syncpt_id; /* version 0 fields */ + __u32 syncpt_incrs; + __u32 num_cmdbufs; + __u32 num_relocs; + __u32 submit_version; /* version 1 fields */ + __u32 num_waitchks; + __u32 waitchk_mask; + __u32 pad[5]; /* future expansion */ +}; + +struct nvhost_cmdbuf { + __u32 mem; + __u32 offset; + __u32 words; +}; + +struct nvhost_reloc { + __u32 cmdbuf_mem; + __u32 cmdbuf_offset; + __u32 target; + __u32 target_offset; +}; + +struct nvhost_reloc_shift { + __u32 shift; +}; + +struct nvhost_waitchk { + __u32 mem; + __u32 offset; + __u32 syncpt_id; + __u32 thresh; +}; + +struct nvhost_get_param_args { + __u32 value; +}; + +struct nvhost_set_nvmap_fd_args { + __u32 fd; +}; + +struct nvhost_read_3d_reg_args { + __u32 offset; + __u32 value; +}; + +struct nvhost_clk_rate_args { + __u64 rate; +}; + +struct nvhost_set_timeout_args { + __u32 timeout; +}; + +struct nvhost_set_priority_args { + __u32 priority; +}; + +#define NVHOST_IOCTL_CHANNEL_FLUSH \ + _IOR(NVHOST_IOCTL_MAGIC, 1, struct nvhost_get_param_args) +#define NVHOST_IOCTL_CHANNEL_GET_SYNCPOINTS \ + _IOR(NVHOST_IOCTL_MAGIC, 2, struct nvhost_get_param_args) +#define NVHOST_IOCTL_CHANNEL_GET_WAITBASES \ + _IOR(NVHOST_IOCTL_MAGIC, 3, struct nvhost_get_param_args) +#define NVHOST_IOCTL_CHANNEL_GET_MODMUTEXES \ + _IOR(NVHOST_IOCTL_MAGIC, 4, struct nvhost_get_param_args) +#define NVHOST_IOCTL_CHANNEL_SET_NVMAP_FD \ + _IOW(NVHOST_IOCTL_MAGIC, 5, struct nvhost_set_nvmap_fd_args) +#define NVHOST_IOCTL_CHANNEL_NULL_KICKOFF \ + _IOR(NVHOST_IOCTL_MAGIC, 6, struct nvhost_get_param_args) +#define NVHOST_IOCTL_CHANNEL_SUBMIT_EXT \ + _IOW(NVHOST_IOCTL_MAGIC, 7, struct nvhost_submit_hdr_ext) +#define NVHOST_IOCTL_CHANNEL_READ_3D_REG \ + _IOWR(NVHOST_IOCTL_MAGIC, 8, struct nvhost_read_3d_reg_args) +#define NVHOST_IOCTL_CHANNEL_GET_CLK_RATE \ + _IOR(NVHOST_IOCTL_MAGIC, 9, struct nvhost_clk_rate_args) +#define NVHOST_IOCTL_CHANNEL_SET_CLK_RATE \ + _IOW(NVHOST_IOCTL_MAGIC, 10, struct nvhost_clk_rate_args) +#define NVHOST_IOCTL_CHANNEL_SET_TIMEOUT \ + _IOW(NVHOST_IOCTL_MAGIC, 11, struct nvhost_set_timeout_args) +#define NVHOST_IOCTL_CHANNEL_GET_TIMEDOUT \ + _IOR(NVHOST_IOCTL_MAGIC, 12, struct nvhost_get_param_args) +#define NVHOST_IOCTL_CHANNEL_SET_PRIORITY \ + _IOW(NVHOST_IOCTL_MAGIC, 13, struct nvhost_set_priority_args) +#define NVHOST_IOCTL_CHANNEL_LAST \ + _IOC_NR(NVHOST_IOCTL_CHANNEL_SET_PRIORITY) +#define NVHOST_IOCTL_CHANNEL_MAX_ARG_SIZE sizeof(struct nvhost_submit_hdr_ext) + +struct nvhost_ctrl_syncpt_read_args { + __u32 id; + __u32 value; +}; + +struct nvhost_ctrl_syncpt_incr_args { + __u32 id; +}; + +struct nvhost_ctrl_syncpt_wait_args { + __u32 id; + __u32 thresh; + __s32 timeout; +}; + +struct nvhost_ctrl_syncpt_waitex_args { + __u32 id; + __u32 thresh; + __s32 timeout; + __u32 value; +}; + +struct nvhost_ctrl_module_mutex_args { + __u32 id; + __u32 lock; +}; + +struct nvhost_ctrl_module_regrdwr_args { + __u32 id; + __u32 num_offsets; + __u32 block_size; + __u32 *offsets; + __u32 *values; + __u32 write; +}; + +#define NVHOST_IOCTL_CTRL_SYNCPT_READ \ + _IOWR(NVHOST_IOCTL_MAGIC, 1, struct nvhost_ctrl_syncpt_read_args) +#define NVHOST_IOCTL_CTRL_SYNCPT_INCR \ + _IOW(NVHOST_IOCTL_MAGIC, 2, struct nvhost_ctrl_syncpt_incr_args) +#define NVHOST_IOCTL_CTRL_SYNCPT_WAIT \ + _IOW(NVHOST_IOCTL_MAGIC, 3, struct nvhost_ctrl_syncpt_wait_args) + +#define NVHOST_IOCTL_CTRL_MODULE_MUTEX \ + _IOWR(NVHOST_IOCTL_MAGIC, 4, struct nvhost_ctrl_module_mutex_args) +#define NVHOST_IOCTL_CTRL_MODULE_REGRDWR \ + _IOWR(NVHOST_IOCTL_MAGIC, 5, struct nvhost_ctrl_module_regrdwr_args) + +#define NVHOST_IOCTL_CTRL_SYNCPT_WAITEX \ + _IOWR(NVHOST_IOCTL_MAGIC, 6, struct nvhost_ctrl_syncpt_waitex_args) + +#define NVHOST_IOCTL_CTRL_GET_VERSION \ + _IOR(NVHOST_IOCTL_MAGIC, 7, struct nvhost_get_param_args) + +#define NVHOST_IOCTL_CTRL_LAST \ + _IOC_NR(NVHOST_IOCTL_CTRL_GET_VERSION) +#define NVHOST_IOCTL_CTRL_MAX_ARG_SIZE \ + sizeof(struct nvhost_ctrl_module_regrdwr_args) + +#endif diff --git a/include/linux/pda_power.h b/include/linux/pda_power.h index c9e4d814ff77..2bb62bf296ac 100644 --- a/include/linux/pda_power.h +++ b/include/linux/pda_power.h @@ -35,6 +35,8 @@ struct pda_power_pdata { unsigned int polling_interval; /* msecs, default is 2000 */ unsigned long ac_max_uA; /* current to draw when on AC */ + + bool use_otg_notifier; }; #endif /* __PDA_POWER_H__ */ diff --git a/include/linux/platform_data/ina230.h b/include/linux/platform_data/ina230.h new file mode 100644 index 000000000000..fb1ac28ff623 --- /dev/null +++ b/include/linux/platform_data/ina230.h @@ -0,0 +1,32 @@ +/* + * include/linux/platform_data/ina230.h + * + * Copyright (c) 2011, NVIDIA Corporation. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; version 2 of the License. + * + * This program is distributed in the hope that it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + * more details. + * + * You should have received a copy of the GNU General Public License along + * with this program; if not, write to the Free Software Foundation, Inc., + * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, USA. + */ + +#ifndef _INA230_H +#define _INA230_H + +#include <linux/types.h> + +struct ina230_platform_data { + const char *rail_name; + s32 current_threshold; + s32 resistor; + s32 min_cores_online; +}; + +#endif /* _INA230_H */ diff --git a/include/linux/platform_data/ram_console.h b/include/linux/platform_data/ram_console.h new file mode 100644 index 000000000000..9f1125c11066 --- /dev/null +++ b/include/linux/platform_data/ram_console.h @@ -0,0 +1,22 @@ +/* + * Copyright (C) 2010 Google, Inc. + * + * This software is licensed under the terms of the GNU General Public + * License version 2, as published by the Free Software Foundation, and + * may be copied, distributed, and modified under those terms. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + */ + +#ifndef _INCLUDE_LINUX_PLATFORM_DATA_RAM_CONSOLE_H_ +#define _INCLUDE_LINUX_PLATFORM_DATA_RAM_CONSOLE_H_ + +struct ram_console_platform_data { + const char *bootinfo; +}; + +#endif /* _INCLUDE_LINUX_PLATFORM_DATA_RAM_CONSOLE_H_ */ diff --git a/include/linux/platform_data/tegra_bpc_mgmt.h b/include/linux/platform_data/tegra_bpc_mgmt.h new file mode 100644 index 000000000000..bdd4862d63a3 --- /dev/null +++ b/include/linux/platform_data/tegra_bpc_mgmt.h @@ -0,0 +1,25 @@ +/* + * Copyright (C) 2010-2011 NVIDIA Corporation + * + * This software is licensed under the terms of the GNU General Public + * License version 2, as published by the Free Software Foundation, and + * may be copied, distributed, and modified under those terms. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + */ + +#ifndef __TEGRA_BPC_MGMT_H +#define __TEGRA_BPC_MGMT_H +#include <linux/cpumask.h> + +struct tegra_bpc_mgmt_platform_data { + int gpio_trigger; + struct cpumask affinity_mask; + int bpc_mgmt_timeout; +}; + +#endif /*__TEGRA_BPC_MGMT_H*/ diff --git a/include/linux/platform_data/tegra_nor.h b/include/linux/platform_data/tegra_nor.h new file mode 100644 index 000000000000..cd8faff2f1cd --- /dev/null +++ b/include/linux/platform_data/tegra_nor.h @@ -0,0 +1,37 @@ +/* + * include/linux/platform_data/tegra_nor.h + * + * Copyright (C) 2010 - 2011 NVIDIA Corporation. + * + * Author: + * Raghavendra V K <rvk@nvidia.com> + * + * This software is licensed under the terms of the GNU General Public + * License version 2, as published by the Free Software Foundation, and + * may be copied, distributed, and modified under those terms. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + */ + +#ifndef __MACH_TEGRA_NOR_PDATA_H +#define __MACH_TEGRA_NOR_PDATA_H + +#include <asm/mach/flash.h> + +struct tegra_nor_chip_parms { + struct { + uint32_t timing0; + uint32_t timing1; + } timing_default, timing_read; +}; + +struct tegra_nor_platform_data { + struct tegra_nor_chip_parms chip_parms; + struct flash_platform_data flash; +}; + +#endif /* __MACH_TEGRA_NOR_PDATA_H */ diff --git a/include/linux/platform_data/tegra_usb.h b/include/linux/platform_data/tegra_usb.h index 6bca5b569acb..09f32de5c671 100644 --- a/include/linux/platform_data/tegra_usb.h +++ b/include/linux/platform_data/tegra_usb.h @@ -1,5 +1,6 @@ /* * Copyright (C) 2010 Google, Inc. + * Copyright (C) 2010-2011 NVIDIA Corporation * * This software is licensed under the terms of the GNU General Public * License version 2, as published by the Free Software Foundation, and @@ -21,11 +22,26 @@ enum tegra_usb_operating_modes { TEGRA_USB_OTG, }; +enum tegra_usb_phy_type { + TEGRA_USB_PHY_TYPE_UTMIP = 0, + TEGRA_USB_PHY_TYPE_LINK_ULPI = 1, + TEGRA_USB_PHY_TYPE_NULL_ULPI = 2, + TEGRA_USB_PHY_TYPE_HSIC = 3, + TEGRA_USB_PHY_TYPE_ICUSB = 4, +}; + struct tegra_ehci_platform_data { enum tegra_usb_operating_modes operating_mode; /* power down the phy on bus suspend */ int power_down_on_bus_suspend; + int hotplug; void *phy_config; + enum tegra_usb_phy_type phy_type; +}; + +struct tegra_otg_platform_data { + struct platform_device *ehci_device; + struct tegra_ehci_platform_data *ehci_pdata; }; #endif /* _TEGRA_USB_H_ */ diff --git a/include/linux/pm_qos_params.h b/include/linux/pm_qos_params.h index a7d87f911cab..eee55bc0b667 100644 --- a/include/linux/pm_qos_params.h +++ b/include/linux/pm_qos_params.h @@ -8,17 +8,24 @@ #include <linux/notifier.h> #include <linux/miscdevice.h> -#define PM_QOS_RESERVED 0 -#define PM_QOS_CPU_DMA_LATENCY 1 -#define PM_QOS_NETWORK_LATENCY 2 -#define PM_QOS_NETWORK_THROUGHPUT 3 +enum { + PM_QOS_RESERVED = 0, + PM_QOS_CPU_DMA_LATENCY, + PM_QOS_NETWORK_LATENCY, + PM_QOS_NETWORK_THROUGHPUT, + PM_QOS_MAX_ONLINE_CPUS, + + /* insert new class ID */ + + PM_QOS_NUM_CLASSES, +}; -#define PM_QOS_NUM_CLASSES 4 #define PM_QOS_DEFAULT_VALUE -1 #define PM_QOS_CPU_DMA_LAT_DEFAULT_VALUE (2000 * USEC_PER_SEC) #define PM_QOS_NETWORK_LAT_DEFAULT_VALUE (2000 * USEC_PER_SEC) #define PM_QOS_NETWORK_THROUGHPUT_DEFAULT_VALUE 0 +#define PM_QOS_MAX_ONLINE_CPUS_DEFAULT_VALUE LONG_MAX struct pm_qos_request_list { struct plist_node list; diff --git a/include/linux/power/max8907c-charger.h b/include/linux/power/max8907c-charger.h new file mode 100644 index 000000000000..2cebad768b0d --- /dev/null +++ b/include/linux/power/max8907c-charger.h @@ -0,0 +1,64 @@ +/* linux/power/max8907c-charger.h + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + */ + +#ifndef __LINUX_MAX8907C_CHARGER_H +#define __LINUX_MAX8907C_CHARGER_H + +/* interrupt */ +#define MAX8907C_VCHG_OVP (1 << 0) +#define MAX8907C_VCHG_F (1 << 1) +#define MAX8907C_VCHG_R (1 << 2) +#define MAX8907C_THM_OK_R (1 << 8) +#define MAX8907C_THM_OK_F (1 << 9) +#define MAX8907C_MBATTLOW_F (1 << 10) +#define MAX8907C_MBATTLOW_R (1 << 11) +#define MAX8907C_CHG_RST (1 << 12) +#define MAX8907C_CHG_DONE (1 << 13) +#define MAX8907C_CHG_TOPOFF (1 << 14) +#define MAX8907C_CHK_TMR_FAULT (1 << 15) + +enum max8907c_charger_topoff_threshold { + MAX8907C_TOPOFF_5PERCENT = 0x00, + MAX8907C_TOPOFF_10PERCENT = 0x01, + MAX8907C_TOPOFF_15PERCENT = 0x02, + MAX8907C_TOPOFF_20PERCENT = 0x03, +}; + +enum max8907c_charger_restart_hysteresis { + MAX8907C_RESTART_100MV = 0x00, + MAX8907C_RESTART_150MV = 0x01, + MAX8907C_RESTART_200MV = 0x02, + MAX8907C_RESTART_FLOAT = 0x03, +}; + +enum max8907c_fast_charging_current { + MAX8907C_FASTCHARGE_90MA = 0x00, + MAX8907C_FASTCHARGE_300MA = 0x01, + MAX8907C_FASTCHARGE_460MA = 0x02, + MAX8907C_FASTCHARGE_600MA = 0x03, + MAX8907C_FASTCHARGE_700MA = 0x04, + MAX8907C_FASTCHARGE_800MA = 0x05, + MAX8907C_FASTCHARGE_900MA = 0x06, + MAX8907C_FASTCHARGE_1000MA = 0x07, +}; + +enum max8907c_fast_charger_time { + MAX8907C_FCHARGE_TM_8H = 0x00, + MAX8907C_FCHARGE_TM_12H = 0x01, + MAX8907C_FCHARGE_TM_16H = 0x02, + MAX8907C_FCHARGE_TM_OFF = 0x03, +}; + +struct max8907c_charger_pdata { + int irq; + enum max8907c_charger_topoff_threshold topoff_threshold; + enum max8907c_charger_restart_hysteresis restart_hysteresis; + enum max8907c_charger_restart_hysteresis fast_charging_current; + enum max8907c_fast_charger_time fast_charger_time; +}; + +#endif diff --git a/include/linux/power_supply.h b/include/linux/power_supply.h index 204c18dfdc9e..2287c3214138 100644 --- a/include/linux/power_supply.h +++ b/include/linux/power_supply.h @@ -14,6 +14,7 @@ #define __LINUX_POWER_SUPPLY_H__ #include <linux/device.h> +#include <linux/wakelock.h> #include <linux/workqueue.h> #include <linux/leds.h> @@ -163,6 +164,9 @@ struct power_supply { /* private */ struct device *dev; struct work_struct changed_work; + spinlock_t changed_lock; + bool changed; + struct wake_lock work_wake_lock; #ifdef CONFIG_LEDS_TRIGGERS struct led_trigger *charging_full_trig; diff --git a/include/linux/regmap.h b/include/linux/regmap.h index 60a65cd7e1a0..04e59205dec9 100644 --- a/include/linux/regmap.h +++ b/include/linux/regmap.h @@ -78,5 +78,7 @@ int regmap_bulk_read(struct regmap *map, unsigned int reg, void *val, size_t val_count); int regmap_update_bits(struct regmap *map, unsigned int reg, unsigned int mask, unsigned int val); +int regmap_update_bits_lazy(struct regmap *map, unsigned int reg, + unsigned int mask, unsigned int val); #endif diff --git a/include/linux/regulator/consumer.h b/include/linux/regulator/consumer.h index b47771aa5718..24aae2104c08 100644 --- a/include/linux/regulator/consumer.h +++ b/include/linux/regulator/consumer.h @@ -92,6 +92,10 @@ * FORCE_DISABLE Regulator forcibly shut down by software. * VOLTAGE_CHANGE Regulator voltage changed. * DISABLE Regulator was disabled. + * PRE_ENABLE Regulator is to be enabled + * POST_ENABLE Regulator was enabled + * OUT_PRECHANGE Regulator is enabled and its voltage is to be changed + * OUT_POSTCHANGE Regulator is enabled and its voltage was changed * * NOTE: These events can be OR'ed together when passed into handler. */ @@ -104,6 +108,10 @@ #define REGULATOR_EVENT_FORCE_DISABLE 0x20 #define REGULATOR_EVENT_VOLTAGE_CHANGE 0x40 #define REGULATOR_EVENT_DISABLE 0x80 +#define REGULATOR_EVENT_PRE_ENABLE 0x100 +#define REGULATOR_EVENT_POST_ENABLE 0x200 +#define REGULATOR_EVENT_OUT_PRECHANGE 0x400 +#define REGULATOR_EVENT_OUT_POSTCHANGE 0x800 struct regulator; diff --git a/include/linux/regulator/fan53555-regulator.h b/include/linux/regulator/fan53555-regulator.h new file mode 100644 index 000000000000..e2ed83bab4ed --- /dev/null +++ b/include/linux/regulator/fan53555-regulator.h @@ -0,0 +1,63 @@ +/* + * include/linux/regulator/fan53555.h + * + * Interface for regulator driver for FairChild fan53555 Processor power supply + * + * Copyright (C) 2011 NVIDIA Corporation + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + * more details. + * + * You should have received a copy of the GNU General Public License along + * with this program; if not, write to the Free Software Foundation, Inc., + * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, USA. + * + */ + +#ifndef __REGULATOR_FAN53555_H +#define __REGULATOR_FAN53555_H + +#include <linux/regulator/machine.h> + +/* + * struct fan53555_regulator_platform_data - fan53555 regulator platform data. + * When VSEL pin is low, VOUT is set by the VSEL0 register. + * When VSEL pin is high, VOUT is set by the VSEL1 register + * + * @reg_init_data: The regulator init data. + * @vsel_id: Select the voltage id register. + * @vsel0_buck_en: Software Buck enable when EN=high & VSEL=low + * @vsel0_mode: Force PWM mode(1) or Allow auto-PFM mode(0) during light load + * @init_vsel0_min_uV: initial micro volts when EN=high & VSEL=low + * @init_vsel0_max_uV: initial micro volts when EN=high & VSEL=low + * @vsel1_buck_en: Software Buck enable when EN=high & VSEL=high + * @vsel1_mode: Force PWM mode(1) or Allow auto-PFM mode(0) during light load + * @init_vsel1_min_uV: initial micro volts when EN=high & VSEL=high + * @init_vsel1_max_uV: initial micro volts when EN=high & VSEL=high + * @output_discharge: when the regulator is disabled, VOUT discharges + * @slew_rate: slew rate of trasitioning from a low to high voltage + */ + +struct fan53555_regulator_platform_data { + struct regulator_init_data reg_init_data; + int vsel_id; + unsigned vsel0_buck_en:1; + unsigned vsel0_mode:1; + int init_vsel0_min_uV; + int init_vsel0_max_uV; + unsigned vsel1_buck_en:1; + unsigned vsel1_mode:1; + int init_vsel1_min_uV; + int init_vsel1_max_uV; + unsigned output_discharge:1; + unsigned slew_rate:3; +}; + +#endif /* __REGULATOR_FAN53555_H */ diff --git a/include/linux/regulator/gpio-switch-regulator.h b/include/linux/regulator/gpio-switch-regulator.h new file mode 100644 index 000000000000..68776b93ef00 --- /dev/null +++ b/include/linux/regulator/gpio-switch-regulator.h @@ -0,0 +1,69 @@ +/* + * Copyright (c) 2011, NVIDIA Corporation. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + * more details. + * + * You should have received a copy of the GNU General Public License along + * with this program; if not, write to the Free Software Foundation, Inc., + * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, USA. + */ + +#ifndef _GPIO_SWITCH_REGULATOR_H +#define _GPIO_SWITCH_REGULATOR_H + +#include <linux/regulator/machine.h> + +/* + * struct gpio_switch_regulator_subdev_data - Gpio switch regulator subdevice + * data. + * + * Subdevice data to register a gpio regulator switch device driver. + * + * @regulator_name: The name of regulator. + * @input_supply: Input supply name. + * @id: The id of the switch. + * @gpio_nr: Gpio nr which controls this switch. + * @active_low: true if making gpio low makes voltage output enable. + * @init_state: 1 if init_state should be active. + * @voltages: Possible voltages to set at output. The values are in millivolt. + * @n_voltages: Number of voltages. + * @num_consumer_supplies: Number of cosumer supplies. + * @consumer_supplies: List of consumer spllies. + */ +struct gpio_switch_regulator_subdev_data { + const char *regulator_name; + const char *input_supply; + int id; + int gpio_nr; + int active_low; + int pin_group; + int init_state; + int *voltages; + unsigned n_voltages; + struct regulator_consumer_supply *consumer_supplies; + int num_consumer_supplies; + struct regulation_constraints constraints; + int (*enable_rail)(struct gpio_switch_regulator_subdev_data *pdata); + int (*disable_rail)(struct gpio_switch_regulator_subdev_data *pdata); + +}; + +/** + * gpio_switch_regulator_platform_data - platform data for gpio_switch_regulator + * @num_subdevs: number of regulators used + * @subdevs: pointer to regulators used + */ +struct gpio_switch_regulator_platform_data { + int num_subdevs; + struct gpio_switch_regulator_subdev_data **subdevs; +}; + +#endif diff --git a/include/linux/regulator/max77663-regulator.h b/include/linux/regulator/max77663-regulator.h new file mode 100644 index 000000000000..093ca42d4ca7 --- /dev/null +++ b/include/linux/regulator/max77663-regulator.h @@ -0,0 +1,125 @@ +/* + * include/linux/regulator/max77663-regulator.h + * Maxim LDO and Buck regulators driver + * + * Copyright 2011 Maxim Integrated Products, Inc. + * Copyright (C) 2011 NVIDIA Corporation + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of the + * License, or (at your option) any later version. + * + */ + +#ifndef __LINUX_REGULATOR_MAX77663_REGULATOR_H__ +#define __LINUX_REGULATOR_MAX77663_REGULATOR_H__ + +#include <linux/regulator/machine.h> + +#define max77663_rails(_name) "max77663_"#_name + +enum max77663_regulator_id { + MAX77663_REGULATOR_ID_SD0, + MAX77663_REGULATOR_ID_DVSSD0, + MAX77663_REGULATOR_ID_SD1, + MAX77663_REGULATOR_ID_DVSSD1, + MAX77663_REGULATOR_ID_SD2, + MAX77663_REGULATOR_ID_SD3, + MAX77663_REGULATOR_ID_SD4, + MAX77663_REGULATOR_ID_LDO0, + MAX77663_REGULATOR_ID_LDO1, + MAX77663_REGULATOR_ID_LDO2, + MAX77663_REGULATOR_ID_LDO3, + MAX77663_REGULATOR_ID_LDO4, + MAX77663_REGULATOR_ID_LDO5, + MAX77663_REGULATOR_ID_LDO6, + MAX77663_REGULATOR_ID_LDO7, + MAX77663_REGULATOR_ID_LDO8, + MAX77663_REGULATOR_ID_NR, +}; + +/* FPS Power Up/Down Period */ +enum max77663_regulator_fps_power_period { + FPS_POWER_PERIOD_0, + FPS_POWER_PERIOD_1, + FPS_POWER_PERIOD_2, + FPS_POWER_PERIOD_3, + FPS_POWER_PERIOD_4, + FPS_POWER_PERIOD_5, + FPS_POWER_PERIOD_6, + FPS_POWER_PERIOD_7, + FPS_POWER_PERIOD_DEF = -1, +}; + +/* FPS Time Period */ +enum max77663_regulator_fps_time_period { + FPS_TIME_PERIOD_20US, + FPS_TIME_PERIOD_40US, + FPS_TIME_PERIOD_80US, + FPS_TIME_PERIOD_160US, + FPS_TIME_PERIOD_320US, + FPS_TIME_PERIOD_640US, + FPS_TIME_PERIOD_1280US, + FPS_TIME_PERIOD_2560US, + FPS_TIME_PERIOD_DEF = -1, +}; + +/* FPS Enable Source */ +enum max77663_regulator_fps_en_src { + FPS_EN_SRC_EN0, + FPS_EN_SRC_EN1, + FPS_EN_SRC_SW, + FPS_EN_SRC_RSVD, +}; + +/* FPS Source */ +enum max77663_regulator_fps_src { + FPS_SRC_0, + FPS_SRC_1, + FPS_SRC_2, + FPS_SRC_NONE, + FPS_SRC_DEF = -1, +}; + +/* + * Flags + */ +/* SD0 is controlled by EN2 */ +#define EN2_CTRL_SD0 0x01 + +/* SD Slew Rate */ +#define SD_SLEW_RATE_SLOWEST 0x02 /* 13.75mV/us */ +#define SD_SLEW_RATE_SLOW 0x04 /* 27.50mV/us */ +#define SD_SLEW_RATE_FAST 0x08 /* 55.00mV/us */ +#define SD_SLEW_RATE_FASTEST 0x10 /* 100.00mV/us */ +#define SD_SLEW_RATE_MASK 0x1E + +/* SD Forced PWM Mode */ +#define SD_FORCED_PWM_MODE 0x20 + +/* SD Failling Slew Rate Active-Discharge Mode */ +#define SD_FSRADE_DISABLE 0x40 + +struct max77663_regulator_fps_cfg { + enum max77663_regulator_fps_src src; + enum max77663_regulator_fps_en_src en_src; + enum max77663_regulator_fps_time_period time_period; +}; + +struct max77663_regulator_platform_data { + struct regulator_init_data init_data; + bool init_apply; + bool init_enable; + int init_uV; + enum max77663_regulator_fps_src fps_src; + enum max77663_regulator_fps_power_period fps_pu_period; + enum max77663_regulator_fps_power_period fps_pd_period; + + int num_fps_cfgs; + struct max77663_regulator_fps_cfg *fps_cfgs; + + unsigned int flags; +}; + +#endif /* __LINUX_REGULATOR_MAX77663_REGULATOR_H__ */ diff --git a/include/linux/regulator/max8907c-regulator.h b/include/linux/regulator/max8907c-regulator.h new file mode 100644 index 000000000000..ddc5f0a60339 --- /dev/null +++ b/include/linux/regulator/max8907c-regulator.h @@ -0,0 +1,46 @@ +/* linux/regulator/max8907c-regulator.h + * + * Functions to access MAX8907C power management chip. + * + * Copyright (C) 2010 Gyungoh Yoo <jack.yoo@maxim-ic.com> + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + */ + +#ifndef __LINUX_REGULATOR_MAX8907C_H +#define __LINUX_REGULATOR_MAX8907C_H + +/* IDs */ +#define MAX8907C_SD1 0 +#define MAX8907C_SD2 1 +#define MAX8907C_SD3 2 +#define MAX8907C_LDO1 3 +#define MAX8907C_LDO2 4 +#define MAX8907C_LDO3 5 +#define MAX8907C_LDO4 6 +#define MAX8907C_LDO5 7 +#define MAX8907C_LDO6 8 +#define MAX8907C_LDO7 9 +#define MAX8907C_LDO8 10 +#define MAX8907C_LDO9 11 +#define MAX8907C_LDO10 12 +#define MAX8907C_LDO11 13 +#define MAX8907C_LDO12 14 +#define MAX8907C_LDO13 15 +#define MAX8907C_LDO14 16 +#define MAX8907C_LDO15 17 +#define MAX8907C_LDO16 18 +#define MAX8907C_LDO17 19 +#define MAX8907C_LDO18 20 +#define MAX8907C_LDO19 21 +#define MAX8907C_LDO20 22 +#define MAX8907C_OUT5V 23 +#define MAX8907C_OUT33V 24 +#define MAX8907C_BBAT 25 +#define MAX8907C_SDBY 26 +#define MAX8907C_VRTC 27 +#define MAX8907C_WLED 27 + +#endif diff --git a/include/linux/regulator/ricoh583-regulator.h b/include/linux/regulator/ricoh583-regulator.h new file mode 100644 index 000000000000..39fdb9e56e05 --- /dev/null +++ b/include/linux/regulator/ricoh583-regulator.h @@ -0,0 +1,63 @@ +/* + * linux/regulator/ricoh583-regulator.h + * + * Interface for regulator driver for RICOH583 power management chip. + * + * Copyright (C) 2011 NVIDIA Corporation + * + * Copyright (C) 2011 RICOH COMPANY,LTD + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + * more details. + * + * You should have received a copy of the GNU General Public License along + * with this program; if not, write to the Free Software Foundation, Inc., + * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, USA. + * + */ + +#ifndef __LINUX_REGULATOR_RICOH583_H +#define __LINUX_REGULATOR_RICOH583_H + +#include <linux/regulator/machine.h> + + +#define ricoh583_rails(_name) "RICOH583_"#_name + +/* RICHOH Regulator IDs */ +enum regulator_id { + RICOH583_ID_DC0, + RICOH583_ID_DC1, + RICOH583_ID_DC2, + RICOH583_ID_DC3, + RICOH583_ID_LDO0, + RICOH583_ID_LDO1, + RICOH583_ID_LDO2, + RICOH583_ID_LDO3, + RICOH583_ID_LDO4, + RICOH583_ID_LDO5, + RICOH583_ID_LDO6, + RICOH583_ID_LDO7, + RICOH583_ID_LDO8, + RICOH583_ID_LDO9, +}; + +struct ricoh583_regulator_platform_data { + struct regulator_init_data regulator; + int init_uV; + unsigned init_enable:1; + unsigned init_apply:1; + int deepsleep_uV; + int deepsleep_slots; + unsigned long ext_pwr_req; + unsigned long flags; +}; + +#endif diff --git a/include/linux/regulator/tps6236x-regulator.h b/include/linux/regulator/tps6236x-regulator.h new file mode 100644 index 000000000000..7e8a37529665 --- /dev/null +++ b/include/linux/regulator/tps6236x-regulator.h @@ -0,0 +1,54 @@ +/* + * include/linux/regulator/tps6236x.h + * + * Interface for regulator driver for TI TPS6236x Processor core supply + * + * Copyright (C) 2011 NVIDIA Corporation + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + * more details. + * + * You should have received a copy of the GNU General Public License along + * with this program; if not, write to the Free Software Foundation, Inc., + * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, USA. + * + */ + +#ifndef __REGULATOR_TPS6236X_H +#define __REGULATOR_TPS6236X_H + +#include <linux/regulator/machine.h> + +/* + * struct tps6236x_regulator_platform_data - tps6236x regulator platform data. + * + * @reg_init_data: The regulator init data. + * @internal_pd_enable: internal pull down enable or not. + * @vsel: Select the voltage id register. + * @init_uV: initial micro volts which need to be set. + * @init_enable: Enable or do not enable the rails during initialization. + * @init_apply: Init parameter applied or not. + * @is_force_pwm: Enable force pwm or not. If not then PFM mode configuration + * will be used. + * @enable_discharge: Enable discharge the output capacitor via a typ. 300Ohm + * path + */ + +struct tps6236x_regulator_platform_data { + struct regulator_init_data reg_init_data; + int internal_pd_enable; + int vsel; + int init_uV; + unsigned init_apply:1; + bool is_force_pwm; + bool enable_discharge; +}; + +#endif /* __REGULATOR_TPS6236X_H */ diff --git a/include/linux/regulator/tps6591x-regulator.h b/include/linux/regulator/tps6591x-regulator.h new file mode 100644 index 000000000000..7f7f647906d0 --- /dev/null +++ b/include/linux/regulator/tps6591x-regulator.h @@ -0,0 +1,77 @@ +/* + * include/linux/regulator/tps6591x-regulator.h + * + * Interface for regulator driver for TI TPS6591x PMIC family + * + * Copyright (C) 2011 NVIDIA Corporation + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + * more details. + * + * You should have received a copy of the GNU General Public License along + * with this program; if not, write to the Free Software Foundation, Inc., + * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, USA. + * + */ + +#ifndef __REGULATOR_TPS6591X_H +#define __REGULATOR_TPS6591X_H + +#include <linux/regulator/machine.h> + +#define tps6591x_rails(_name) "tps6591x_"#_name + +enum { + TPS6591X_ID_VIO, + TPS6591X_ID_VDD_1, + TPS6591X_ID_VDD_2, + TPS6591X_ID_VDDCTRL, + TPS6591X_ID_LDO_1, + TPS6591X_ID_LDO_2, + TPS6591X_ID_LDO_3, + TPS6591X_ID_LDO_4, + TPS6591X_ID_LDO_5, + TPS6591X_ID_LDO_6, + TPS6591X_ID_LDO_7, + TPS6591X_ID_LDO_8, +}; + +enum tps6591x_ext_control { + EXT_CTRL_NONE = 0x0, + EXT_CTRL_EN1, + EXT_CTRL_EN2, + EXT_CTRL_SLEEP_OFF, +}; + +enum tps6591x_config_flags { + LDO_LOW_POWER_ON_SUSPEND = 0x1, +}; + +/* + * struct tps6591x_regulator_platform_data - tps6591x regulator platform data. + * + * @regulator: The regulator init data. + * @init_uV: initial micro volts which need to be set. + * @init_enable: Enable or do not enable the rails during initialization. + * @init_apply: Init parameter applied or not. + * @slew_rate_uV_per_us: Slew rate microvolt per microsec. + */ + +struct tps6591x_regulator_platform_data { + struct regulator_init_data regulator; + int init_uV; + unsigned init_enable:1; + unsigned init_apply:1; + enum tps6591x_ext_control ectrl; + int slew_rate_uV_per_us; + unsigned int flags; +}; + +#endif /* __REGULATOR_TPS6591X_H */ diff --git a/include/linux/regulator/tps80031-regulator.h b/include/linux/regulator/tps80031-regulator.h new file mode 100644 index 000000000000..1670d147fc3e --- /dev/null +++ b/include/linux/regulator/tps80031-regulator.h @@ -0,0 +1,89 @@ +/* + * include/linux/regulator/tps80031-regulator.h + * + * Interface for regulator driver for TI TPS80031 + * + * Copyright (C) 2011 NVIDIA Corporation + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + * more details. + * + * You should have received a copy of the GNU General Public License along + * with this program; if not, write to the Free Software Foundation, Inc., + * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, USA. + * + */ + +#ifndef __REGULATOR_TPS80031_H +#define __REGULATOR_TPS80031_H + +#include <linux/regulator/machine.h> + +#define tps80031_rails(_name) "tps80031_"#_name + +enum { + TPS80031_ID_VIO, + TPS80031_ID_SMPS1, + TPS80031_ID_SMPS2, + TPS80031_ID_SMPS3, + TPS80031_ID_SMPS4, + TPS80031_ID_VANA, + TPS80031_ID_LDO1, + TPS80031_ID_LDO2, + TPS80031_ID_LDO3, + TPS80031_ID_LDO4, + TPS80031_ID_LDO5, + TPS80031_ID_LDO6, + TPS80031_ID_LDO7, + TPS80031_ID_LDOLN, + TPS80031_ID_LDOUSB, + TPS80031_ID_VBUS, + TPS80031_ID_CHARGER, +}; + + +enum { + /* USBLDO input selection */ + USBLDO_INPUT_VSYS = 0x00000001, + USBLDO_INPUT_PMID = 0x00000002, + + /* LDO3 output mode */ + LDO3_OUTPUT_VIB = 0x00000004, + + /* VBUS configuration */ + VBUS_DISCHRG_EN_PDN = 0x00000004, + VBUS_SW_ONLY = 0x00000008, + VBUS_SW_N_ID = 0x00000010, +}; + +/* + * struct tps80031_regulator_platform_data - tps80031 regulator platform data. + * + * @regulator: The regulator init data. + * @init_uV: initial micro volts which need to be set. + * @init_enable: Enable or do not enable the rails during initialization. + * @init_apply: Init parameter applied or not. + * @ext_ctrl_flag: External control flag for sleep/power request control. + * @flags: Configuration flag to configure the rails. It should be ORed of + * above enums. + * @delay_us: Delay in microsecond after setting the desired voltage. + */ + +struct tps80031_regulator_platform_data { + struct regulator_init_data regulator; + int init_uV; + unsigned init_enable:1; + unsigned init_apply:1; + unsigned int ext_ctrl_flag; + unsigned int flags; + int delay_us; +}; + +#endif /* __REGULATOR_TPS80031_H */ diff --git a/include/linux/sched.h b/include/linux/sched.h index 41d0237fd449..5bb4dd2e4c59 100644 --- a/include/linux/sched.h +++ b/include/linux/sched.h @@ -1753,6 +1753,9 @@ static inline void put_task_struct(struct task_struct *t) extern void task_times(struct task_struct *p, cputime_t *ut, cputime_t *st); extern void thread_group_times(struct task_struct *p, cputime_t *ut, cputime_t *st); +extern int task_free_register(struct notifier_block *n); +extern int task_free_unregister(struct notifier_block *n); + /* * Per process flags */ diff --git a/include/linux/serial_core.h b/include/linux/serial_core.h index a5c31146a337..0d239897b2f4 100644 --- a/include/linux/serial_core.h +++ b/include/linux/serial_core.h @@ -245,6 +245,7 @@ struct uart_ops { void (*pm)(struct uart_port *, unsigned int state, unsigned int oldstate); int (*set_wake)(struct uart_port *, unsigned int state); + void (*wake_peer)(struct uart_port *); /* * Return a string describing the type of the port diff --git a/include/linux/serial_reg.h b/include/linux/serial_reg.h index c75bda37c18e..543e361b15c1 100644 --- a/include/linux/serial_reg.h +++ b/include/linux/serial_reg.h @@ -2,10 +2,10 @@ * include/linux/serial_reg.h * * Copyright (C) 1992, 1994 by Theodore Ts'o. - * - * Redistribution of this file is permitted under the terms of the GNU + * + * Redistribution of this file is permitted under the terms of the GNU * Public License (GPL) - * + * * These are the UART port assignments, expressed as offsets from the base * register. These assignments should hold for any serial port based on * a 8250, 16450, or 16550(A). @@ -86,7 +86,7 @@ #define UART_LCR 3 /* Out: Line Control Register */ /* - * Note: if the word length is 5 bits (UART_LCR_WLEN5), then setting + * Note: if the word length is 5 bits (UART_LCR_WLEN5), then setting * UART_LCR_STOP will select 1.5 stop bits, not 2 stop bits. */ #define UART_LCR_DLAB 0x80 /* Divisor latch access bit */ @@ -110,8 +110,10 @@ #define UART_MCR 4 /* Out: Modem Control Register */ #define UART_MCR_CLKSEL 0x80 /* Divide clock by 4 (TI16C752, EFR[4]=1) */ #define UART_MCR_TCRTLR 0x40 /* Access TCR/TLR (TI16C752, EFR[4]=1) */ +#define UART_MCR_HW_RTS 0x40 /* Enable hw control of RTS (Tegra UART) */ #define UART_MCR_XONANY 0x20 /* Enable Xon Any (TI16C752, EFR[4]=1) */ #define UART_MCR_AFE 0x20 /* Enable auto-RTS/CTS (TI16C550C/TI16C750) */ +#define UART_MCR_HW_CTS 0x20 /* Enable HW based CTS control (Tegra UART)*/ #define UART_MCR_LOOP 0x10 /* Enable loopback test mode */ #define UART_MCR_OUT2 0x08 /* Out2 complement */ #define UART_MCR_OUT1 0x04 /* Out1 complement */ diff --git a/include/linux/sockios.h b/include/linux/sockios.h index 7997a506ad41..f7ffe36db03c 100644 --- a/include/linux/sockios.h +++ b/include/linux/sockios.h @@ -65,6 +65,7 @@ #define SIOCDIFADDR 0x8936 /* delete PA address */ #define SIOCSIFHWBROADCAST 0x8937 /* set hardware broadcast addr */ #define SIOCGIFCOUNT 0x8938 /* get number of devices */ +#define SIOCKILLADDR 0x8939 /* kill sockets with this local addr */ #define SIOCGIFBR 0x8940 /* Bridging support */ #define SIOCSIFBR 0x8941 /* Set bridging options */ diff --git a/include/linux/spi-tegra.h b/include/linux/spi-tegra.h new file mode 100644 index 000000000000..380965005516 --- /dev/null +++ b/include/linux/spi-tegra.h @@ -0,0 +1,50 @@ +/* + * include/linux/spi-tegra.c + * + * Copyright (C) 2011 NVIDIA Corporation + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + * more details. + * + * You should have received a copy of the GNU General Public License along + * with this program; if not, write to the Free Software Foundation, Inc., + * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, USA. + */ + +#ifndef _LINUX_SPI_TEGRA_H +#define _LINUX_SPI_TEGRA_H + +#include <linux/clk.h> + +struct spi_clk_parent { + const char *name; + struct clk *parent_clk; + unsigned long fixed_clk_rate; +}; + +struct tegra_spi_platform_data { + bool is_dma_based; + int max_dma_buffer; + bool is_clkon_always; + unsigned int max_rate; + struct spi_clk_parent *parent_clk_list; + int parent_clk_count; +}; + +/* Controller data from device to pass some info like + * hw based chip select can be used or not and if yes + * then CS hold and setup time. */ +struct tegra_spi_device_controller_data { + bool is_hw_based_cs; + int cs_setup_clk_count; + int cs_hold_clk_count; +}; + +#endif /* _LINUX_SPI_TEGRA_H */ diff --git a/include/linux/switch.h b/include/linux/switch.h new file mode 100644 index 000000000000..3e4c748e343a --- /dev/null +++ b/include/linux/switch.h @@ -0,0 +1,53 @@ +/* + * Switch class driver + * + * Copyright (C) 2008 Google, Inc. + * Author: Mike Lockwood <lockwood@android.com> + * + * This software is licensed under the terms of the GNU General Public + * License version 2, as published by the Free Software Foundation, and + * may be copied, distributed, and modified under those terms. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * +*/ + +#ifndef __LINUX_SWITCH_H__ +#define __LINUX_SWITCH_H__ + +struct switch_dev { + const char *name; + struct device *dev; + int index; + int state; + + ssize_t (*print_name)(struct switch_dev *sdev, char *buf); + ssize_t (*print_state)(struct switch_dev *sdev, char *buf); +}; + +struct gpio_switch_platform_data { + const char *name; + unsigned gpio; + + /* if NULL, switch_dev.name will be printed */ + const char *name_on; + const char *name_off; + /* if NULL, "0" or "1" will be printed */ + const char *state_on; + const char *state_off; +}; + +extern int switch_dev_register(struct switch_dev *sdev); +extern void switch_dev_unregister(struct switch_dev *sdev); + +static inline int switch_get_state(struct switch_dev *sdev) +{ + return sdev->state; +} + +extern void switch_set_state(struct switch_dev *sdev, int state); + +#endif /* __LINUX_SWITCH_H__ */ diff --git a/include/linux/synaptics_i2c_rmi.h b/include/linux/synaptics_i2c_rmi.h new file mode 100644 index 000000000000..5539cc520779 --- /dev/null +++ b/include/linux/synaptics_i2c_rmi.h @@ -0,0 +1,55 @@ +/* + * include/linux/synaptics_i2c_rmi.h - platform data structure for f75375s sensor + * + * Copyright (C) 2008 Google, Inc. + * + * This software is licensed under the terms of the GNU General Public + * License version 2, as published by the Free Software Foundation, and + * may be copied, distributed, and modified under those terms. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + */ + +#ifndef _LINUX_SYNAPTICS_I2C_RMI_H +#define _LINUX_SYNAPTICS_I2C_RMI_H + +#define SYNAPTICS_I2C_RMI_NAME "synaptics-rmi-ts" + +enum { + SYNAPTICS_FLIP_X = 1UL << 0, + SYNAPTICS_FLIP_Y = 1UL << 1, + SYNAPTICS_SWAP_XY = 1UL << 2, + SYNAPTICS_SNAP_TO_INACTIVE_EDGE = 1UL << 3, +}; + +struct synaptics_i2c_rmi_platform_data { + uint32_t version; /* Use this entry for panels with */ + /* (major << 8 | minor) version or above. */ + /* If non-zero another array entry follows */ + int (*power)(int on); /* Only valid in first array entry */ + uint32_t flags; + unsigned long irqflags; + uint32_t inactive_left; /* 0x10000 = screen width */ + uint32_t inactive_right; /* 0x10000 = screen width */ + uint32_t inactive_top; /* 0x10000 = screen height */ + uint32_t inactive_bottom; /* 0x10000 = screen height */ + uint32_t snap_left_on; /* 0x10000 = screen width */ + uint32_t snap_left_off; /* 0x10000 = screen width */ + uint32_t snap_right_on; /* 0x10000 = screen width */ + uint32_t snap_right_off; /* 0x10000 = screen width */ + uint32_t snap_top_on; /* 0x10000 = screen height */ + uint32_t snap_top_off; /* 0x10000 = screen height */ + uint32_t snap_bottom_on; /* 0x10000 = screen height */ + uint32_t snap_bottom_off; /* 0x10000 = screen height */ + uint32_t fuzz_x; /* 0x10000 = screen width */ + uint32_t fuzz_y; /* 0x10000 = screen height */ + int fuzz_p; + int fuzz_w; + int8_t sensitivity_adjust; +}; + +#endif /* _LINUX_SYNAPTICS_I2C_RMI_H */ diff --git a/include/linux/tegra_audio.h b/include/linux/tegra_audio.h new file mode 100644 index 000000000000..516b5a89c4e6 --- /dev/null +++ b/include/linux/tegra_audio.h @@ -0,0 +1,78 @@ +/* include/linux/tegra_audio.h + * + * Copyright (C) 2010 Google, Inc. + * + * Author: + * Iliyan Malchev <malchev@google.com> + * + * This software is licensed under the terms of the GNU General Public + * License version 2, as published by the Free Software Foundation, and + * may be copied, distributed, and modified under those terms. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + */ + +#ifndef _TEGRA_AUDIO_H +#define _TEGRA_AUDIO_H + +#include <linux/ioctl.h> + +#define TEGRA_AUDIO_MAGIC 't' + +#define TEGRA_AUDIO_IN_START _IO(TEGRA_AUDIO_MAGIC, 0) +#define TEGRA_AUDIO_IN_STOP _IO(TEGRA_AUDIO_MAGIC, 1) + +struct tegra_audio_in_config { + int rate; + int stereo; +}; + +struct dam_srate { + unsigned int in_sample_rate; + unsigned int out_sample_rate; + unsigned int audio_bits; + unsigned int client_bits; + unsigned int audio_channels; + unsigned int client_channels; + unsigned int apbif_chan; +}; + +#define TEGRA_AUDIO_IN_SET_CONFIG _IOW(TEGRA_AUDIO_MAGIC, 2, \ + const struct tegra_audio_in_config *) +#define TEGRA_AUDIO_IN_GET_CONFIG _IOR(TEGRA_AUDIO_MAGIC, 3, \ + struct tegra_audio_in_config *) + +#define TEGRA_AUDIO_IN_SET_NUM_BUFS _IOW(TEGRA_AUDIO_MAGIC, 4, \ + const unsigned int *) +#define TEGRA_AUDIO_IN_GET_NUM_BUFS _IOW(TEGRA_AUDIO_MAGIC, 5, \ + unsigned int *) +#define TEGRA_AUDIO_OUT_SET_NUM_BUFS _IOW(TEGRA_AUDIO_MAGIC, 6, \ + const unsigned int *) +#define TEGRA_AUDIO_OUT_GET_NUM_BUFS _IOW(TEGRA_AUDIO_MAGIC, 7, \ + unsigned int *) + +#define TEGRA_AUDIO_OUT_FLUSH _IO(TEGRA_AUDIO_MAGIC, 10) + +#define TEGRA_AUDIO_BIT_FORMAT_DEFAULT 0 +#define TEGRA_AUDIO_BIT_FORMAT_DSP 1 +#define TEGRA_AUDIO_SET_BIT_FORMAT _IOW(TEGRA_AUDIO_MAGIC, 11, \ + const unsigned int *) +#define TEGRA_AUDIO_GET_BIT_FORMAT _IOR(TEGRA_AUDIO_MAGIC, 12, \ + unsigned int *) + +#define DAM_SRC_START _IOW(TEGRA_AUDIO_MAGIC, 13, struct dam_srate *) +#define DAM_SRC_STOP _IO(TEGRA_AUDIO_MAGIC, 14) +#define DAM_MIXING_START _IOW(TEGRA_AUDIO_MAGIC, 15, struct dam_srate *) +#define DAM_MIXING_STOP _IO(TEGRA_AUDIO_MAGIC, 16) +#define DAM_SET_MIXING_FLAG _IO(TEGRA_AUDIO_MAGIC, 17) + +#define I2S_START _IOW(TEGRA_AUDIO_MAGIC, 15, struct i2s_pcm_format *) +#define I2S_STOP _IOW(TEGRA_AUDIO_MAGIC, 16, struct i2s_pcm_format *) +#define I2S_LOOPBACK _IOW(TEGRA_AUDIO_MAGIC, 17, unsigned int *) +#define I2S_MODE_I2S _IOW(TEGRA_AUDIO_MAGIC, 18, unsigned int *) + +#endif/*_CPCAP_AUDIO_H*/ diff --git a/include/linux/tegra_avp.h b/include/linux/tegra_avp.h new file mode 100644 index 000000000000..9dc92f821368 --- /dev/null +++ b/include/linux/tegra_avp.h @@ -0,0 +1,44 @@ +/* + * Copyright (C) 2010 Google, Inc. + * Author: Dima Zavin <dima@android.com> + * + * This software is licensed under the terms of the GNU General Public + * License version 2, as published by the Free Software Foundation, and + * may be copied, distributed, and modified under those terms. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + */ + +#ifndef __LINUX_TEGRA_AVP_H +#define __LINUX_TEGRA_AVP_H + +#include <linux/ioctl.h> +#include <linux/types.h> + +#define TEGRA_AVP_LIB_MAX_NAME 32 +#define TEGRA_AVP_LIB_MAX_ARGS 220 /* DO NOT CHANGE THIS! */ + +struct tegra_avp_lib { + char name[TEGRA_AVP_LIB_MAX_NAME]; + void __user *args; + size_t args_len; + int greedy; + unsigned long handle; +}; + +struct tegra_avp_platform_data { + unsigned long emc_clk_rate; +}; +#define TEGRA_AVP_IOCTL_MAGIC 'r' + +#define TEGRA_AVP_IOCTL_LOAD_LIB _IOWR(TEGRA_AVP_IOCTL_MAGIC, 0x40, struct tegra_avp_lib) +#define TEGRA_AVP_IOCTL_UNLOAD_LIB _IOW(TEGRA_AVP_IOCTL_MAGIC, 0x41, unsigned long) + +#define TEGRA_AVP_IOCTL_MIN_NR _IOC_NR(TEGRA_AVP_IOCTL_LOAD_LIB) +#define TEGRA_AVP_IOCTL_MAX_NR _IOC_NR(TEGRA_AVP_IOCTL_UNLOAD_LIB) + +#endif diff --git a/include/linux/tegra_caif.h b/include/linux/tegra_caif.h new file mode 100644 index 000000000000..fed67499defc --- /dev/null +++ b/include/linux/tegra_caif.h @@ -0,0 +1,34 @@ +/* include/linux/tegra_caif.h + * + * Copyright (C) 2011 NVIDIA Corporation + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + * more details. + * + * You should have received a copy of the GNU General Public License along + * with this program; if not, write to the Free Software Foundation, Inc., + * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, USA. + */ + +#ifndef _TEGRA_CAIF_H_ +#define _TEGRA_CAIF_H_ + +/* The GPIO details needed by the rainbow caif */ +struct tegra_caif_platform_data { + int reset; + int power; + int awr; + int cwr; + int spi_int; + int spi_ss; +}; + +#endif /* _TEGRA_CAIF_H_ */ + diff --git a/include/linux/tegra_ion.h b/include/linux/tegra_ion.h new file mode 100644 index 000000000000..43d3d5a1cfdc --- /dev/null +++ b/include/linux/tegra_ion.h @@ -0,0 +1,98 @@ +/* + * include/linux/tegra_ion.h + * + * Copyright (C) 2011, NVIDIA Corporation. + * + * This software is licensed under the terms of the GNU General Public + * License version 2, as published by the Free Software Foundation, and + * may be copied, distributed, and modified under those terms. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + */ + +#include <linux/types.h> +#include <linux/ion.h> + +#if !defined(__KERNEL__) +#define __user +#endif + +#ifndef _LINUX_TEGRA_ION_H +#define _LINUX_TEGRA_ION_H + +struct tegra_ion_id_data { + struct ion_handle *handle; + unsigned long id; + size_t size; +}; + +struct tegra_ion_pin_data { + struct ion_handle **handles; /* array of handles to pin/unpin */ + unsigned long *addr; /* array pf addresses to return */ + unsigned long count; /* number of entries in handles */ +}; + +/* Cache operations. */ +enum { + TEGRA_ION_CACHE_OP_WB = 0, + TEGRA_ION_CACHE_OP_INV, + TEGRA_ION_CACHE_OP_WB_INV, +}; + +struct tegra_ion_cache_maint_data { + unsigned long addr; + struct ion_handle *handle; + size_t len; + unsigned int op; +}; + +struct tegra_ion_rw_data { + unsigned long addr; /* user pointer*/ + struct ion_handle *handle; + unsigned int offset; /* offset into handle mem */ + unsigned int elem_size; /* individual atome size */ + unsigned int mem_stride; /*delta in bytes between atoms in handle mem*/ + unsigned int user_stride; /* delta in bytes between atoms in user */ + unsigned int count; /* number of atoms to copy */ +}; + +struct tegra_ion_get_params_data { + struct ion_handle *handle; + size_t size; + unsigned int align; + unsigned int heap; + unsigned long addr; +}; + +/* Custom Ioctl's. */ +enum { + TEGRA_ION_ALLOC_FROM_ID = 0, + TEGRA_ION_GET_ID, + TEGRA_ION_PIN, + TEGRA_ION_UNPIN, + TEGRA_ION_CACHE_MAINT, + TEGRA_ION_READ, + TEGRA_ION_WRITE, + TEGRA_ION_GET_PARAM, +}; + +/* List of heaps in the system. */ +enum { + TEGRA_ION_HEAP_CARVEOUT = 0, + TEGRA_ION_HEAP_IRAM, + TEGRA_ION_HEAP_VPR, + TEGRA_ION_HEAP_IOMMU +}; + +/* additional heap types used only on tegra */ +enum { + TEGRA_ION_HEAP_TYPE_IOMMU = ION_HEAP_TYPE_CUSTOM + 1, +}; + +#define TEGRA_ION_HEAP_IOMMU_MASK (1 << TEGRA_ION_HEAP_TYPE_IOMMU) + +#endif /* _LINUX_TEGRA_ION_H */ diff --git a/include/linux/tegra_mediaserver.h b/include/linux/tegra_mediaserver.h new file mode 100644 index 000000000000..f28473baf63e --- /dev/null +++ b/include/linux/tegra_mediaserver.h @@ -0,0 +1,112 @@ +/* include/linux/tegra_mediaserver.h + * + * Media Server driver for NVIDIA Tegra SoCs + * + * Copyright (c) 2011, NVIDIA Corporation. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + * more details. + * + * You should have received a copy of the GNU General Public License along + * with this program; if not, write to the Free Software Foundation, Inc., + * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, USA. + */ + + +#ifndef _TEGRA_MEDIASERVER_H +#define _TEGRA_MEDIASERVER_H + +#include <linux/ioctl.h> + +#define TEGRA_MEDIASERVER_MAGIC 'm' +#define TEGRA_MEDIASERVER_IOCTL_ALLOC \ + _IOWR(TEGRA_MEDIASERVER_MAGIC, 0x40, \ + union tegra_mediaserver_alloc_info) + +enum tegra_mediaserver_resource_type { + TEGRA_MEDIASERVER_RESOURCE_BLOCK = 0, + TEGRA_MEDIASERVER_RESOURCE_IRAM, +}; + +enum tegra_mediaserver_block_type { + TEGRA_MEDIASERVER_BLOCK_AUDDEC = 0, + TEGRA_MEDIASERVER_BLOCK_VIDDEC, +}; + +enum tegra_mediaserver_iram_type { + TEGRA_MEDIASERVER_IRAM_SCRATCH = 0, + TEGRA_MEDIASERVER_IRAM_SHARED, +}; + + +struct tegra_mediaserver_block_info { + int nvmm_block_handle; + int avp_block_handle; + int avp_block_library_handle; + int service_handle; + int service_library_handle; +}; + +struct tegra_mediaserver_iram_info { + unsigned long rm_handle; + int physical_address; +}; + +union tegra_mediaserver_alloc_info { + struct { + int tegra_mediaserver_resource_type; + + union { + struct tegra_mediaserver_block_info block; + + struct { + int tegra_mediaserver_iram_type; + int alignment; + size_t size; + } iram; + } u; + } in; + + struct { + union { + struct { + int count; + } block; + + struct tegra_mediaserver_iram_info iram; + } u; + } out; +}; + + +#define TEGRA_MEDIASERVER_IOCTL_FREE \ + _IOR(TEGRA_MEDIASERVER_MAGIC, 0x41, union tegra_mediaserver_free_info) + +union tegra_mediaserver_free_info { + struct { + int tegra_mediaserver_resource_type; + + union { + int nvmm_block_handle; + int iram_rm_handle; + } u; + } in; +}; + + +#define TEGRA_MEDIASERVER_IOCTL_UPDATE_BLOCK_INFO \ + _IOR(TEGRA_MEDIASERVER_MAGIC, 0x45, \ + union tegra_mediaserver_update_block_info) + +union tegra_mediaserver_update_block_info { + struct tegra_mediaserver_block_info in; +}; +#endif + diff --git a/include/linux/tegra_nvavp.h b/include/linux/tegra_nvavp.h new file mode 100644 index 000000000000..32dc4c62b4bd --- /dev/null +++ b/include/linux/tegra_nvavp.h @@ -0,0 +1,84 @@ +/* + * include/linux/tegra_nvavp.h + * + * Copyright (C) 2011 NVIDIA Corp. + * + * This file is licensed under the terms of the GNU General Public License + * version 2. This program is licensed "as is" without any warranty of any + * kind, whether express or implied. + */ + +#ifndef __LINUX_TEGRA_NVAVP_H +#define __LINUX_TEGRA_NVAVP_H + +#include <linux/ioctl.h> +#include <linux/types.h> + +#define NVAVP_MAX_RELOCATION_COUNT 64 + +/* avp submit flags */ +#define NVAVP_FLAG_NONE 0x00000000 +#define NVAVP_UCODE_EXT 0x00000001 /*use external ucode provided */ + +enum { + NVAVP_MODULE_ID_AVP = 2, + NVAVP_MODULE_ID_VCP = 3, + NVAVP_MODULE_ID_BSEA = 27, + NVAVP_MODULE_ID_VDE = 28, + NVAVP_MODULE_ID_MPE = 29, + NVAVP_MODULE_ID_EMC = 75, +}; + +struct nvavp_cmdbuf { + __u32 mem; + __u32 offset; + __u32 words; +}; + +struct nvavp_reloc { + __u32 cmdbuf_mem; + __u32 cmdbuf_offset; + __u32 target; + __u32 target_offset; +}; + +struct nvavp_syncpt { + __u32 id; + __u32 value; +}; + +struct nvavp_pushbuffer_submit_hdr { + struct nvavp_cmdbuf cmdbuf; + struct nvavp_reloc *relocs; + __u32 num_relocs; + struct nvavp_syncpt *syncpt; + __u32 flags; +}; + +struct nvavp_set_nvmap_fd_args { + __u32 fd; +}; + +struct nvavp_clock_args { + __u32 id; + __u32 rate; +}; + +#define NVAVP_IOCTL_MAGIC 'n' + +#define NVAVP_IOCTL_SET_NVMAP_FD _IOW(NVAVP_IOCTL_MAGIC, 0x60, \ + struct nvavp_set_nvmap_fd_args) +#define NVAVP_IOCTL_GET_SYNCPOINT_ID _IOR(NVAVP_IOCTL_MAGIC, 0x61, \ + __u32) +#define NVAVP_IOCTL_PUSH_BUFFER_SUBMIT _IOWR(NVAVP_IOCTL_MAGIC, 0x63, \ + struct nvavp_pushbuffer_submit_hdr) +#define NVAVP_IOCTL_SET_CLOCK _IOWR(NVAVP_IOCTL_MAGIC, 0x64, \ + struct nvavp_clock_args) +#define NVAVP_IOCTL_GET_CLOCK _IOR(NVAVP_IOCTL_MAGIC, 0x65, \ + struct nvavp_clock_args) + + +#define NVAVP_IOCTL_MIN_NR _IOC_NR(NVAVP_IOCTL_SET_NVMAP_FD) +#define NVAVP_IOCTL_MAX_NR _IOC_NR(NVAVP_IOCTL_GET_CLOCK) + +#endif /* __LINUX_TEGRA_NVAVP_H */ diff --git a/include/linux/tegra_overlay.h b/include/linux/tegra_overlay.h new file mode 100644 index 000000000000..2a6025afdad7 --- /dev/null +++ b/include/linux/tegra_overlay.h @@ -0,0 +1,79 @@ +/* + * Copyright (C) 2010 NVIDIA Corporation + * Author: Dan Willemsen <dwillemsen@nvidia.com> + * + * This software is licensed under the terms of the GNU General Public + * License version 2, as published by the Free Software Foundation, and + * may be copied, distributed, and modified under those terms. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + */ + +#ifndef __LINUX_TEGRA_OVERLAY_H +#define __LINUX_TEGRA_OVERLAY_H + +#include <linux/ioctl.h> +#include <linux/types.h> +#include <video/tegrafb.h> + +#define TEGRA_FB_WIN_BLEND_NONE 0 +#define TEGRA_FB_WIN_BLEND_PREMULT 1 +#define TEGRA_FB_WIN_BLEND_COVERAGE 2 + +#define TEGRA_FB_WIN_FLAG_INVERT_H (1 << 0) +#define TEGRA_FB_WIN_FLAG_INVERT_V (1 << 1) +#define TEGRA_FB_WIN_FLAG_TILED (1 << 2) + +/* set index to -1 to ignore window data */ +struct tegra_overlay_windowattr { + __s32 index; + __u32 buff_id; + __u32 blend; + __u32 offset; + __u32 offset_u; + __u32 offset_v; + __u32 stride; + __u32 stride_uv; + __u32 pixformat; + __u32 x; + __u32 y; + __u32 w; + __u32 h; + __u32 out_x; + __u32 out_y; + __u32 out_w; + __u32 out_h; + __u32 z; + __u32 pre_syncpt_id; + __u32 pre_syncpt_val; + __u32 hfilter; + __u32 vfilter; + __u32 do_not_use__tiled; /* compatibility */ + __u32 flags; +}; + +#define TEGRA_OVERLAY_FLIP_FLAG_BLEND_REORDER (1 << 0) +#define TEGRA_FB_FLIP_N_WINDOWS 3 + +struct tegra_overlay_flip_args { + struct tegra_overlay_windowattr win[TEGRA_FB_FLIP_N_WINDOWS]; + __u32 post_syncpt_id; + __u32 post_syncpt_val; + __u32 flags; +}; + +#define TEGRA_OVERLAY_IOCTL_MAGIC 'O' + +#define TEGRA_OVERLAY_IOCTL_OPEN_WINDOW _IOWR(TEGRA_OVERLAY_IOCTL_MAGIC, 0x40, __u32) +#define TEGRA_OVERLAY_IOCTL_CLOSE_WINDOW _IOW(TEGRA_OVERLAY_IOCTL_MAGIC, 0x41, __u32) +#define TEGRA_OVERLAY_IOCTL_FLIP _IOW(TEGRA_OVERLAY_IOCTL_MAGIC, 0x42, struct tegra_overlay_flip_args) +#define TEGRA_OVERLAY_IOCTL_SET_NVMAP_FD _IOW(TEGRA_OVERLAY_IOCTL_MAGIC, 0x43, __u32) + +#define TEGRA_OVERLAY_IOCTL_MIN_NR _IOC_NR(TEGRA_OVERLAY_IOCTL_OPEN_WINDOW) +#define TEGRA_OVERLAY_IOCTL_MAX_NR _IOC_NR(TEGRA_OVERLAY_IOCTL_SET_NVMAP_FD) + +#endif diff --git a/include/linux/tegra_pwm_bl.h b/include/linux/tegra_pwm_bl.h new file mode 100644 index 000000000000..71a81f2eda88 --- /dev/null +++ b/include/linux/tegra_pwm_bl.h @@ -0,0 +1,31 @@ +/* Tegra PWM backlight data * + * + * Copyright (C) 2011 NVIDIA Corporation + * Author: Renuka Apte <rapte@nvidia.com> + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + * + */ + +#ifndef TEGRA_PWM_BL_H +#define TEGRA_PWM_BL_H + +#include <linux/backlight.h> + +struct platform_tegra_pwm_backlight_data { + int which_dc; + int which_pwm; + void (*switch_to_sfio)(int); + int gpio_conf_to_sfio; + unsigned int dft_brightness; + unsigned int max_brightness; + unsigned int period; + unsigned int clk_div; + unsigned int clk_select; + int (*notify)(struct device *dev, int brightness); + int (*check_fb)(struct device *dev, struct fb_info *info); +}; + +#endif /* TERGA_PWM_BL_H */ diff --git a/include/linux/tegra_rpc.h b/include/linux/tegra_rpc.h new file mode 100644 index 000000000000..16e6367cf569 --- /dev/null +++ b/include/linux/tegra_rpc.h @@ -0,0 +1,47 @@ +/* + * Copyright (C) 2010 Google, Inc. + * + * Author: + * Dima Zavin <dima@android.com> + * + * Based on original code from NVIDIA, and a partial rewrite by: + * Gary King <gking@nvidia.com> + * + * This software is licensed under the terms of the GNU General Public + * License version 2, as published by the Free Software Foundation, and + * may be copied, distributed, and modified under those terms. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + */ + +#ifndef __LINUX_TEGRA_RPC_H +#define __LINUX_TEGRA_RPC_H + +#define TEGRA_RPC_MAX_MSG_LEN 256 + +/* Note: the actual size of the name in the protocol message is 16 bytes, + * but that is because the name there is not NUL terminated, only NUL + * padded. */ +#define TEGRA_RPC_MAX_NAME_LEN 17 + +struct tegra_rpc_port_desc { + char name[TEGRA_RPC_MAX_NAME_LEN]; + int notify_fd; /* fd representing a trpc_sema to signal when a + * message has been received */ +}; + +#define TEGRA_RPC_IOCTL_MAGIC 'r' + +#define TEGRA_RPC_IOCTL_PORT_CREATE _IOW(TEGRA_RPC_IOCTL_MAGIC, 0x20, struct tegra_rpc_port_desc) +#define TEGRA_RPC_IOCTL_PORT_GET_NAME _IOR(TEGRA_RPC_IOCTL_MAGIC, 0x21, char *) +#define TEGRA_RPC_IOCTL_PORT_CONNECT _IOR(TEGRA_RPC_IOCTL_MAGIC, 0x22, long) +#define TEGRA_RPC_IOCTL_PORT_LISTEN _IOR(TEGRA_RPC_IOCTL_MAGIC, 0x23, long) + +#define TEGRA_RPC_IOCTL_MIN_NR _IOC_NR(TEGRA_RPC_IOCTL_PORT_CREATE) +#define TEGRA_RPC_IOCTL_MAX_NR _IOC_NR(TEGRA_RPC_IOCTL_PORT_LISTEN) + +#endif diff --git a/include/linux/tegra_sema.h b/include/linux/tegra_sema.h new file mode 100644 index 000000000000..7b423b6cb5c4 --- /dev/null +++ b/include/linux/tegra_sema.h @@ -0,0 +1,34 @@ +/* + * Copyright (C) 2010 Google, Inc. + * + * Author: + * Dima Zavin <dima@android.com> + * + * This software is licensed under the terms of the GNU General Public + * License version 2, as published by the Free Software Foundation, and + * may be copied, distributed, and modified under those terms. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + */ + +#ifndef __LINUX_TEGRA_SEMA_H +#define __LINUX_TEGRA_SEMA_H + +/* this shares the magic with the tegra RPC and AVP drivers. + * See include/linux/tegra_avp.h and include/linux/tegra_rpc.h */ +#define TEGRA_SEMA_IOCTL_MAGIC 'r' + +/* If IOCTL_WAIT is interrupted by a signal and the timeout was not -1, + * then the value pointed to by the argument will be updated with the amount + * of time remaining for the wait. */ +#define TEGRA_SEMA_IOCTL_WAIT _IOW(TEGRA_SEMA_IOCTL_MAGIC, 0x30, long *) +#define TEGRA_SEMA_IOCTL_SIGNAL _IO(TEGRA_SEMA_IOCTL_MAGIC, 0x31) + +#define TEGRA_SEMA_IOCTL_MIN_NR _IOC_NR(TEGRA_SEMA_IOCTL_WAIT) +#define TEGRA_SEMA_IOCTL_MAX_NR _IOC_NR(TEGRA_SEMA_IOCTL_SIGNAL) + +#endif diff --git a/include/linux/tegra_spdif.h b/include/linux/tegra_spdif.h new file mode 100644 index 000000000000..8d7f6457a0d1 --- /dev/null +++ b/include/linux/tegra_spdif.h @@ -0,0 +1,56 @@ +/* include/linux/tegra_spdif.h + * + * SPDIF audio driver for NVIDIA Tegra SoCs + * + * Copyright (c) 2008-2009, NVIDIA Corporation. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + * more details. + * + * You should have received a copy of the GNU General Public License along + * with this program; if not, write to the Free Software Foundation, Inc., + * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, USA. + */ + +#ifndef _TEGRA_SPDIF_H +#define _TEGRA_SPDIF_H + +#include <linux/ioctl.h> + +#define TEGRA_SPDIF_MAGIC 's' + + + +struct tegra_audio_buf_config { + unsigned size; /* order */ + unsigned threshold; /* order */ + unsigned chunk; /* order */ +}; + + + +#define TEGRA_AUDIO_OUT_SET_BUF_CONFIG _IOW(TEGRA_SPDIF_MAGIC, 0, \ + const struct tegra_audio_buf_config *) +#define TEGRA_AUDIO_OUT_GET_BUF_CONFIG _IOR(TEGRA_SPDIF_MAGIC, 1, \ + struct tegra_audio_buf_config *) + +#define TEGRA_AUDIO_OUT_GET_ERROR_COUNT _IOR(TEGRA_SPDIF_MAGIC, 2, \ + unsigned *) + +struct tegra_audio_out_preload { + void *data; + size_t len; + size_t len_written; +}; + +#define TEGRA_AUDIO_OUT_PRELOAD_FIFO _IOWR(TEGRA_SPDIF_MAGIC, 3, \ + struct tegra_audio_out_preload *) + +#endif/*_TEGRA_SPDIF_H*/ diff --git a/include/linux/tegra_uart.h b/include/linux/tegra_uart.h new file mode 100644 index 000000000000..3d35e217cbca --- /dev/null +++ b/include/linux/tegra_uart.h @@ -0,0 +1,43 @@ +/* include/linux/tegra_uart.h + * + * Copyright (C) 2011 NVIDIA Corporation + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + * more details. + * + * You should have received a copy of the GNU General Public License along + * with this program; if not, write to the Free Software Foundation, Inc., + * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, USA. + */ + +#ifndef _TEGRA_UART_H_ +#define _TEGRA_UART_H_ + +#include <linux/clk.h> + +struct uart_clk_parent { + const char *name; + struct clk *parent_clk; + unsigned long fixed_clk_rate; +}; + +struct tegra_uart_platform_data { + void (*wake_peer)(struct uart_port *); + struct uart_clk_parent *parent_clk_list; + int parent_clk_count; +}; + +int tegra_uart_is_tx_empty(struct uart_port *); +void tegra_uart_request_clock_on(struct uart_port *); +void tegra_uart_set_mctrl(struct uart_port *, unsigned int); +void tegra_uart_request_clock_off(struct uart_port *uport); + +#endif /* _TEGRA_UART_H_ */ + diff --git a/include/linux/tps80031-charger.h b/include/linux/tps80031-charger.h new file mode 100644 index 000000000000..26c228edc306 --- /dev/null +++ b/include/linux/tps80031-charger.h @@ -0,0 +1,62 @@ +/* + * include/linux/tps80031-charger.h + * + * Battery charger driver interface for TI TPS80031 PMIC + * + * Copyright (C) 2011 NVIDIA Corporation + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + * more details. + * + * You should have received a copy of the GNU General Public License along + * with this program; if not, write to the Free Software Foundation, Inc., + * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, USA. + * + */ + +#ifndef __LINUX_TPS80031_CHARGER_H +#define __LINUX_TPS80031_CHARGER_H + +#include <linux/regulator/machine.h> + +enum charging_states { + charging_state_idle, + charging_state_charging_in_progress, + charging_state_charging_completed, + charging_state_charging_stopped, +}; + +/** + * Callback type definition which is called when any state changed in the + * charging. + */ +typedef void (*charging_callback_t)(enum charging_states state, void *args); + +struct tps80031_charger_platform_data { + int regulator_id; + int max_charge_volt_mV; + int max_charge_current_mA; + int charging_term_current_mA; + int refresh_time; + int irq_base; + int watch_time_sec; + struct regulator_consumer_supply *consumer_supplies; + int num_consumer_supplies; + int (*board_init)(void *board_data); + void *board_data; +}; + +/** + * Register the callback function for the client. This callback gets called + * when there is any change in the chanrging states. + */ +extern int register_charging_state_callback(charging_callback_t cb, void *args); + +#endif /*__LINUX_TPS80031_CHARGER_H */ diff --git a/include/linux/tracedump.h b/include/linux/tracedump.h new file mode 100644 index 000000000000..9e86946e354e --- /dev/null +++ b/include/linux/tracedump.h @@ -0,0 +1,43 @@ +/* + * include/linux/tracedump.h + * + * Copyright (c) 2011, NVIDIA CORPORATION. All rights reserved. + * + * This program is free software; you can redistribute it and/or modify it + * under the terms and conditions of the GNU General Public License, + * version 2, as published by the Free Software Foundation. + * + * This program is distributed in the hope it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + * more details. + * + * You should have received a copy of the GNU General Public License along with + * this program; if not, write to the Free Software Foundation, Inc., + * 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA. + * + */ + +#ifndef _LINUX_KERNEL_TRACEDUMP_H +#define _LINUX_KERNEL_TRACEDUMP_H + +/* tracedump + * This module provides additional mechanisms for retreiving tracing data. + * For details on configurations, parameters and usage, see tracedump.txt. + */ + +#define TD_NO_PRINT 0 +#define TD_PRINT_CONSOLE 1 +#define TD_PRINT_USER 2 + +/* Dump the tracer to console */ +int tracedump_dump(size_t max_out); + +/* Dumping functions */ +int tracedump_init(void); +ssize_t tracedump_all(int print_to); +ssize_t tracedump_next(size_t max_out, int print_to); +int tracedump_reset(void); +int tracedump_deinit(void); + +#endif /* _LINUX_KERNEL_TRACEDUMP_H */ diff --git a/include/linux/tracelevel.h b/include/linux/tracelevel.h new file mode 100644 index 000000000000..ac3351c6ed85 --- /dev/null +++ b/include/linux/tracelevel.h @@ -0,0 +1,42 @@ +/* + * include/linux/tracelevel.c + * + * Copyright (c) 2011, NVIDIA CORPORATION. All rights reserved. + * + * This program is free software; you can redistribute it and/or modify it + * under the terms and conditions of the GNU General Public License, + * version 2, as published by the Free Software Foundation. + * + * This program is distributed in the hope it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + * more details. + * + * You should have received a copy of the GNU General Public License along with + * this program; if not, write to the Free Software Foundation, Inc., + * 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA. + * + */ + +#ifndef _TRACELEVEL_H +#define _TRACELEVEL_H + +/* tracelevel allows a subsystem author to add priorities to + * trace_events. For usage details, see tracelevel.txt. + */ + +#define TRACELEVEL_ERR 3 +#define TRACELEVEL_WARN 2 +#define TRACELEVEL_INFO 1 +#define TRACELEVEL_DEBUG 0 + +#define TRACELEVEL_MAX TRACELEVEL_ERR +#define TRACELEVEL_DEFAULT TRACELEVEL_ERR + +int __tracelevel_register(char *name, unsigned int level); +int tracelevel_set_level(int level); + +#define tracelevel_register(name, level) \ + __tracelevel_register(#name, level) + +#endif /* _TRACELEVEL_H */ diff --git a/include/linux/tty.h b/include/linux/tty.h index d553ea4fe094..969daca21076 100644 --- a/include/linux/tty.h +++ b/include/linux/tty.h @@ -295,7 +295,7 @@ struct tty_struct { void *driver_data; struct list_head tty_files; -#define N_TTY_BUF_SIZE 4096 +#define N_TTY_BUF_SIZE 32768 /* * The following is data for the N_TTY line discipline. For diff --git a/include/linux/uid_stat.h b/include/linux/uid_stat.h new file mode 100644 index 000000000000..6bd6c4e52d17 --- /dev/null +++ b/include/linux/uid_stat.h @@ -0,0 +1,29 @@ +/* include/linux/uid_stat.h + * + * Copyright (C) 2008-2009 Google, Inc. + * + * This software is licensed under the terms of the GNU General Public + * License version 2, as published by the Free Software Foundation, and + * may be copied, distributed, and modified under those terms. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + */ + +#ifndef __uid_stat_h +#define __uid_stat_h + +/* Contains definitions for resource tracking per uid. */ + +#ifdef CONFIG_UID_STAT +int uid_stat_tcp_snd(uid_t uid, int size); +int uid_stat_tcp_rcv(uid_t uid, int size); +#else +#define uid_stat_tcp_snd(uid, size) do {} while (0); +#define uid_stat_tcp_rcv(uid, size) do {} while (0); +#endif + +#endif /* _LINUX_UID_STAT_H */ diff --git a/include/linux/usb/composite.h b/include/linux/usb/composite.h index a316fba73518..6938a8608cf1 100644 --- a/include/linux/usb/composite.h +++ b/include/linux/usb/composite.h @@ -242,6 +242,9 @@ int usb_add_config(struct usb_composite_dev *, struct usb_configuration *, int (*)(struct usb_configuration *)); +int usb_remove_config(struct usb_composite_dev *, + struct usb_configuration *); + /** * struct usb_composite_driver - groups configurations into a gadget * @name: For diagnostics, identifies the driver. diff --git a/include/linux/usb/f_accessory.h b/include/linux/usb/f_accessory.h new file mode 100644 index 000000000000..5b2dcf9728e1 --- /dev/null +++ b/include/linux/usb/f_accessory.h @@ -0,0 +1,83 @@ +/* + * Gadget Function Driver for Android USB accessories + * + * Copyright (C) 2011 Google, Inc. + * Author: Mike Lockwood <lockwood@android.com> + * + * This software is licensed under the terms of the GNU General Public + * License version 2, as published by the Free Software Foundation, and + * may be copied, distributed, and modified under those terms. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + */ + +#ifndef __LINUX_USB_F_ACCESSORY_H +#define __LINUX_USB_F_ACCESSORY_H + +/* Use Google Vendor ID when in accessory mode */ +#define USB_ACCESSORY_VENDOR_ID 0x18D1 + + +/* Product ID to use when in accessory mode */ +#define USB_ACCESSORY_PRODUCT_ID 0x2D00 + +/* Product ID to use when in accessory mode and adb is enabled */ +#define USB_ACCESSORY_ADB_PRODUCT_ID 0x2D01 + +/* Indexes for strings sent by the host via ACCESSORY_SEND_STRING */ +#define ACCESSORY_STRING_MANUFACTURER 0 +#define ACCESSORY_STRING_MODEL 1 +#define ACCESSORY_STRING_DESCRIPTION 2 +#define ACCESSORY_STRING_VERSION 3 +#define ACCESSORY_STRING_URI 4 +#define ACCESSORY_STRING_SERIAL 5 + +/* Control request for retrieving device's protocol version (currently 1) + * + * requestType: USB_DIR_IN | USB_TYPE_VENDOR + * request: ACCESSORY_GET_PROTOCOL + * value: 0 + * index: 0 + * data version number (16 bits little endian) + */ +#define ACCESSORY_GET_PROTOCOL 51 + +/* Control request for host to send a string to the device + * + * requestType: USB_DIR_OUT | USB_TYPE_VENDOR + * request: ACCESSORY_SEND_STRING + * value: 0 + * index: string ID + * data zero terminated UTF8 string + * + * The device can later retrieve these strings via the + * ACCESSORY_GET_STRING_* ioctls + */ +#define ACCESSORY_SEND_STRING 52 + +/* Control request for starting device in accessory mode. + * The host sends this after setting all its strings to the device. + * + * requestType: USB_DIR_OUT | USB_TYPE_VENDOR + * request: ACCESSORY_START + * value: 0 + * index: 0 + * data none + */ +#define ACCESSORY_START 53 + +/* ioctls for retrieving strings set by the host */ +#define ACCESSORY_GET_STRING_MANUFACTURER _IOW('M', 1, char[256]) +#define ACCESSORY_GET_STRING_MODEL _IOW('M', 2, char[256]) +#define ACCESSORY_GET_STRING_DESCRIPTION _IOW('M', 3, char[256]) +#define ACCESSORY_GET_STRING_VERSION _IOW('M', 4, char[256]) +#define ACCESSORY_GET_STRING_URI _IOW('M', 5, char[256]) +#define ACCESSORY_GET_STRING_SERIAL _IOW('M', 6, char[256]) +/* returns 1 if there is a start request pending */ +#define ACCESSORY_IS_START_REQUESTED _IO('M', 7) + +#endif /* __LINUX_USB_F_ACCESSORY_H */ diff --git a/include/linux/usb/f_mtp.h b/include/linux/usb/f_mtp.h new file mode 100644 index 000000000000..7422b17c6eb1 --- /dev/null +++ b/include/linux/usb/f_mtp.h @@ -0,0 +1,75 @@ +/* + * Gadget Function Driver for MTP + * + * Copyright (C) 2010 Google, Inc. + * Author: Mike Lockwood <lockwood@android.com> + * + * This software is licensed under the terms of the GNU General Public + * License version 2, as published by the Free Software Foundation, and + * may be copied, distributed, and modified under those terms. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + */ + +#ifndef __LINUX_USB_F_MTP_H +#define __LINUX_USB_F_MTP_H + +#include <linux/ioctl.h> + +#ifdef __KERNEL__ + +struct mtp_data_header { + /* length of packet, including this header */ + uint32_t length; + /* container type (2 for data packet) */ + uint16_t type; + /* MTP command code */ + uint16_t command; + /* MTP transaction ID */ + uint32_t transaction_id; +}; + +#endif /* __KERNEL__ */ + +struct mtp_file_range { + /* file descriptor for file to transfer */ + int fd; + /* offset in file for start of transfer */ + loff_t offset; + /* number of bytes to transfer */ + int64_t length; + /* MTP command ID for data header, + * used only for MTP_SEND_FILE_WITH_HEADER + */ + uint16_t command; + /* MTP transaction ID for data header, + * used only for MTP_SEND_FILE_WITH_HEADER + */ + uint32_t transaction_id; +}; + +struct mtp_event { + /* size of the event */ + size_t length; + /* event data to send */ + void *data; +}; + +/* Sends the specified file range to the host */ +#define MTP_SEND_FILE _IOW('M', 0, struct mtp_file_range) +/* Receives data from the host and writes it to a file. + * The file is created if it does not exist. + */ +#define MTP_RECEIVE_FILE _IOW('M', 1, struct mtp_file_range) +/* Sends an event to the host via the interrupt endpoint */ +#define MTP_SEND_EVENT _IOW('M', 3, struct mtp_event) +/* Sends the specified file range to the host, + * with a 12 byte MTP data packet header at the beginning. + */ +#define MTP_SEND_FILE_WITH_HEADER _IOW('M', 4, struct mtp_file_range) + +#endif /* __LINUX_USB_F_MTP_H */ diff --git a/include/linux/usb/otg_id.h b/include/linux/usb/otg_id.h new file mode 100644 index 000000000000..f9f5189a73b7 --- /dev/null +++ b/include/linux/usb/otg_id.h @@ -0,0 +1,58 @@ +/* + * Copyright (C) 2011 Google, Inc. + * + * Author: + * Colin Cross <ccross@android.com> + * + * This software is licensed under the terms of the GNU General Public + * License version 2, as published by the Free Software Foundation, and + * may be copied, distributed, and modified under those terms. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + */ + +#ifndef __LINUX_USB_OTG_ID_H +#define __LINUX_USB_OTG_ID_H + +#include <linux/notifier.h> +#include <linux/plist.h> + +/** + * otg_id_notifier_block + * + * @priority: Order the notifications will be called in. Higher numbers + * get called first. + * @detect: Called during otg_id_notify. Return OTG_ID_HANDLED if the USB cable + * has been identified + * @proxy_wait: Called during otg_id_notify if a previous handler returns + * OTG_ID_PROXY_WAIT. This should wait on ID change then call otg_id_notify. + * This is used when a handler knows what's connected but can't detect + * the change itself. + * @cancel: Called after detect has returned OTG_ID_HANDLED to ask it to + * release detection resources to allow a new identification to occur. + */ + +struct otg_id_notifier_block { + int priority; + int (*detect)(struct otg_id_notifier_block *otg_id_nb); + int (*proxy_wait)(struct otg_id_notifier_block *otg_id_nb); + void (*cancel)(struct otg_id_notifier_block *otg_id_nb); + struct plist_node p; +}; + +#define OTG_ID_PROXY_WAIT 2 +#define OTG_ID_HANDLED 1 +#define OTG_ID_UNHANDLED 0 + +int otg_id_register_notifier(struct otg_id_notifier_block *otg_id_nb); +void otg_id_unregister_notifier(struct otg_id_notifier_block *otg_id_nb); + +void otg_id_notify(void); +int otg_id_suspend(void); +void otg_id_resume(void); + +#endif /* __LINUX_USB_OTG_ID_H */ diff --git a/include/linux/wakelock.h b/include/linux/wakelock.h new file mode 100644 index 000000000000..a096d24ada1d --- /dev/null +++ b/include/linux/wakelock.h @@ -0,0 +1,91 @@ +/* include/linux/wakelock.h + * + * Copyright (C) 2007-2008 Google, Inc. + * + * This software is licensed under the terms of the GNU General Public + * License version 2, as published by the Free Software Foundation, and + * may be copied, distributed, and modified under those terms. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + */ + +#ifndef _LINUX_WAKELOCK_H +#define _LINUX_WAKELOCK_H + +#include <linux/list.h> +#include <linux/ktime.h> + +/* A wake_lock prevents the system from entering suspend or other low power + * states when active. If the type is set to WAKE_LOCK_SUSPEND, the wake_lock + * prevents a full system suspend. If the type is WAKE_LOCK_IDLE, low power + * states that cause large interrupt latencies or that disable a set of + * interrupts will not entered from idle until the wake_locks are released. + */ + +enum { + WAKE_LOCK_SUSPEND, /* Prevent suspend */ + WAKE_LOCK_IDLE, /* Prevent low power idle */ + WAKE_LOCK_TYPE_COUNT +}; + +struct wake_lock { +#ifdef CONFIG_HAS_WAKELOCK + struct list_head link; + int flags; + const char *name; + unsigned long expires; +#ifdef CONFIG_WAKELOCK_STAT + struct { + int count; + int expire_count; + int wakeup_count; + ktime_t total_time; + ktime_t prevent_suspend_time; + ktime_t max_time; + ktime_t last_time; + } stat; +#endif +#endif +}; + +#ifdef CONFIG_HAS_WAKELOCK + +void wake_lock_init(struct wake_lock *lock, int type, const char *name); +void wake_lock_destroy(struct wake_lock *lock); +void wake_lock(struct wake_lock *lock); +void wake_lock_timeout(struct wake_lock *lock, long timeout); +void wake_unlock(struct wake_lock *lock); + +/* wake_lock_active returns a non-zero value if the wake_lock is currently + * locked. If the wake_lock has a timeout, it does not check the timeout + * but if the timeout had aready been checked it will return 0. + */ +int wake_lock_active(struct wake_lock *lock); + +/* has_wake_lock returns 0 if no wake locks of the specified type are active, + * and non-zero if one or more wake locks are held. Specifically it returns + * -1 if one or more wake locks with no timeout are active or the + * number of jiffies until all active wake locks time out. + */ +long has_wake_lock(int type); + +#else + +static inline void wake_lock_init(struct wake_lock *lock, int type, + const char *name) {} +static inline void wake_lock_destroy(struct wake_lock *lock) {} +static inline void wake_lock(struct wake_lock *lock) {} +static inline void wake_lock_timeout(struct wake_lock *lock, long timeout) {} +static inline void wake_unlock(struct wake_lock *lock) {} + +static inline int wake_lock_active(struct wake_lock *lock) { return 0; } +static inline long has_wake_lock(int type) { return 0; } + +#endif + +#endif + diff --git a/include/linux/wifi_tiwlan.h b/include/linux/wifi_tiwlan.h new file mode 100644 index 000000000000..f07e0679fb82 --- /dev/null +++ b/include/linux/wifi_tiwlan.h @@ -0,0 +1,27 @@ +/* include/linux/wifi_tiwlan.h + * + * Copyright (C) 2008 Google, Inc. + * + * This software is licensed under the terms of the GNU General Public + * License version 2, as published by the Free Software Foundation, and + * may be copied, distributed, and modified under those terms. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + */ +#ifndef _LINUX_WIFI_TIWLAN_H_ +#define _LINUX_WIFI_TIWLAN_H_ + +#include <linux/wlan_plat.h> + +#define WMPA_NUMBER_OF_SECTIONS 3 +#define WMPA_NUMBER_OF_BUFFERS 160 +#define WMPA_SECTION_HEADER 24 +#define WMPA_SECTION_SIZE_0 (WMPA_NUMBER_OF_BUFFERS * 64) +#define WMPA_SECTION_SIZE_1 (WMPA_NUMBER_OF_BUFFERS * 256) +#define WMPA_SECTION_SIZE_2 (WMPA_NUMBER_OF_BUFFERS * 2048) + +#endif diff --git a/include/linux/wl127x-rfkill.h b/include/linux/wl127x-rfkill.h new file mode 100644 index 000000000000..9057ec63d5d3 --- /dev/null +++ b/include/linux/wl127x-rfkill.h @@ -0,0 +1,35 @@ +/* + * Bluetooth TI wl127x rfkill power control via GPIO + * + * Copyright (C) 2009 Motorola, Inc. + * Copyright (C) 2008 Texas Instruments + * Initial code: Pavan Savoy <pavan.savoy@gmail.com> (wl127x_power.c) + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA + * + */ + +#ifndef _LINUX_WL127X_RFKILL_H +#define _LINUX_WL127X_RFKILL_H + +#include <linux/rfkill.h> + +struct wl127x_rfkill_platform_data { + int nshutdown_gpio; + + struct rfkill *rfkill; /* for driver only */ +}; + +#endif diff --git a/include/linux/wlan_plat.h b/include/linux/wlan_plat.h new file mode 100644 index 000000000000..40ec3482d1ef --- /dev/null +++ b/include/linux/wlan_plat.h @@ -0,0 +1,27 @@ +/* include/linux/wlan_plat.h + * + * Copyright (C) 2010 Google, Inc. + * + * This software is licensed under the terms of the GNU General Public + * License version 2, as published by the Free Software Foundation, and + * may be copied, distributed, and modified under those terms. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + */ +#ifndef _LINUX_WLAN_PLAT_H_ +#define _LINUX_WLAN_PLAT_H_ + +struct wifi_platform_data { + int (*set_power)(int val); + int (*set_reset)(int val); + int (*set_carddetect)(int val); + void *(*mem_prealloc)(int section, unsigned long size); + int (*get_mac_addr)(unsigned char *buf); + void *(*get_country_code)(char *ccode); +}; + +#endif diff --git a/include/media/ad5820.h b/include/media/ad5820.h new file mode 100644 index 000000000000..c3e710113402 --- /dev/null +++ b/include/media/ad5820.h @@ -0,0 +1,41 @@ +/* + * Copyright (C) 2010-2011 NVIDIA Corporation. + * + * Contributors: + * Sachin Nikam <snikam@nvidia.com> + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA + * 02111-1307, USA + */ + +#ifndef __AD5820_H__ +#define __AD5820_H__ + +#include <linux/ioctl.h> /* For IOCTL macros */ + +#define AD5820_IOCTL_GET_CONFIG _IOR('o', 1, struct ad5820_config) +#define AD5820_IOCTL_SET_POSITION _IOW('o', 2, u32) + +struct ad5820_config { + __u32 settle_time; + __u32 actuator_range; + __u32 pos_low; + __u32 pos_high; + float focal_length; + float fnumber; + float max_aperture; +}; + +#endif /* __AD5820_H__ */ + diff --git a/include/media/ar0832_main.h b/include/media/ar0832_main.h new file mode 100644 index 000000000000..f5e3713b46fb --- /dev/null +++ b/include/media/ar0832_main.h @@ -0,0 +1,106 @@ +/* +* ar0832_main.h +* +* Copyright (c) 2011, NVIDIA, All Rights Reserved. +* +* This file is licensed under the terms of the GNU General Public License +* version 2. This program is licensed "as is" without any warranty of any +* kind, whether express or implied. +*/ + +#ifndef __AR0832_MAIN_H__ +#define __AR0832_MAIN_H__ + +#include <linux/ioctl.h> /* For IOCTL macros */ + +#define AR0832_IOCTL_SET_MODE _IOW('o', 0x01, struct ar0832_mode) +#define AR0832_IOCTL_SET_FRAME_LENGTH _IOW('o', 0x02, __u32) +#define AR0832_IOCTL_SET_COARSE_TIME _IOW('o', 0x03, __u32) +#define AR0832_IOCTL_SET_GAIN _IOW('o', 0x04, __u16) +#define AR0832_IOCTL_GET_STATUS _IOR('o', 0x05, __u8) +#define AR0832_IOCTL_GET_OTP _IOR('o', 0x06, struct ar0832_otp_data) +#define AR0832_IOCTL_TEST_PATTERN _IOW('o', 0x07, enum ar0832_test_pattern) +#define AR0832_IOCTL_SET_POWER_ON _IOW('o', 0x08, struct ar0832_mode) +#define AR0832_IOCTL_SET_SENSOR_REGION _IOW('o', 0x09, struct ar0832_stereo_region) + +#define AR0832_FOCUSER_IOCTL_GET_CONFIG _IOR('o', 0x10, struct ar0832_focuser_config) +#define AR0832_FOCUSER_IOCTL_SET_POSITION _IOW('o', 0x11, __u32) + +#define AR0832_IOCTL_GET_SENSOR_ID _IOR('o', 0x12, __u16) + +#define AR0832_SENSOR_ID_8141 0x1006 +#define AR0832_SENSOR_ID_8140 0x3006 + +enum ar0832_test_pattern { + TEST_PATTERN_NONE, + TEST_PATTERN_COLORBARS, + TEST_PATTERN_CHECKERBOARD +}; + +struct ar0832_otp_data { + /* Only the first 5 bytes are actually used. */ + __u8 sensor_serial_num[6]; + __u8 part_num[8]; + __u8 lens_id[1]; + __u8 manufacture_id[2]; + __u8 factory_id[2]; + __u8 manufacture_date[9]; + __u8 manufacture_line[2]; + + __u32 module_serial_num; + __u8 focuser_liftoff[2]; + __u8 focuser_macro[2]; + __u8 reserved1[12]; + __u8 shutter_cal[16]; + __u8 reserved2[183]; + + /* Big-endian. CRC16 over 0x00-0x41 (inclusive) */ + __u16 crc; + __u8 reserved3[3]; + __u8 auto_load[2]; +} __attribute__ ((packed)); + +struct ar0832_mode { + int xres; + int yres; + __u32 frame_length; + __u32 coarse_time; + __u16 gain; + int stereo; +}; + +struct ar0832_point{ + int x; + int y; +}; + +struct ar0832_reg { + __u16 addr; + __u16 val; +}; + +struct ar0832_stereo_region { + int camera_index; + struct ar0832_point image_start; + struct ar0832_point image_end; +}; + +struct ar0832_focuser_config { + __u32 settle_time; + __u32 actuator_range; + __u32 pos_low; + __u32 pos_high; + __u32 focal_length; + __u32 fnumber; + __u32 max_aperture; +}; + +#ifdef __KERNEL__ +struct ar0832_platform_data { + int (*power_on)(int is_stereo); + int (*power_off)(int is_stereo); + char *id; +}; +#endif /* __KERNEL__ */ + +#endif diff --git a/include/media/nvc.h b/include/media/nvc.h new file mode 100644 index 000000000000..c1be3473ecf9 --- /dev/null +++ b/include/media/nvc.h @@ -0,0 +1,146 @@ +/* Copyright (C) 2011 NVIDIA Corporation. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA + * 02111-1307, USA + */ + +#ifndef __NVC_H__ +#define __NVC_H__ + +#include <linux/ioctl.h> + +struct nvc_param { + int param; + __u32 sizeofvalue; + void *p_value; +} __packed; + +#define NVC_PARAM_EXPOSURE 0 +#define NVC_PARAM_GAIN 1 +#define NVC_PARAM_FRAMERATE 2 +#define NVC_PARAM_MAX_FRAMERATE 3 +#define NVC_PARAM_INPUT_CLOCK 4 +#define NVC_PARAM_LOCUS 5 +#define NVC_PARAM_FLASH_CAPS 6 +#define NVC_PARAM_FLASH_LEVEL 7 +#define NVC_PARAM_FLASH_PIN_STATE 8 +#define NVC_PARAM_TORCH_CAPS 9 +#define NVC_PARAM_TORCH_LEVEL 10 +#define NVC_PARAM_FOCAL_LEN 11 +#define NVC_PARAM_MAX_APERTURE 12 +#define NVC_PARAM_FNUMBER 13 +#define NVC_PARAM_EXPOSURE_LIMITS 14 +#define NVC_PARAM_GAIN_LIMITS 15 +#define NVC_PARAM_FRAMERATE_LIMITS 16 +#define NVC_PARAM_FRAME_RATES 17 +#define NVC_PARAM_EXP_LATCH_TIME 19 +#define NVC_PARAM_REGION_USED 20 +#define NVC_PARAM_SELF_TEST 23 +#define NVC_PARAM_STS 24 +#define NVC_PARAM_TESTMODE 25 +#define NVC_PARAM_EXPECTED_VALUES 26 +#define NVC_PARAM_RESET 27 +#define NVC_PARAM_OPTIMIZE_RES 28 +#define NVC_PARAM_LINES_PER_SEC 30 +#define NVC_PARAM_CAPS 31 +#define NVC_PARAM_STEREO_CAP 33 +#define NVC_PARAM_FOCUS_STEREO 34 +#define NVC_PARAM_STEREO 35 +#define NVC_PARAM_INHERENT_GAIN 36 +#define NVC_PARAM_VIEW_ANGLE_H 37 +#define NVC_PARAM_VIEW_ANGLE_V 38 +#define NVC_PARAM_DEV_ID 46 +#define NVC_PARAM_TEST_PATTERN 0x10000002 +#define NVC_PARAM_SENSOR_TYPE 0x10000006 +#define NVC_PARAM_I2C 1001 + +/* sync off */ +#define NVC_SYNC_OFF 0 +/* use only this device (the one receiving the call) */ +#define NVC_SYNC_MASTER 1 +/* use only the synced device (the "other" device) */ +#define NVC_SYNC_SLAVE 2 +/* use both synced devices at the same time */ +#define NVC_SYNC_STEREO 3 + +#define NVC_RESET_HARD 0 +#define NVC_RESET_SOFT 1 + +#define NVC_IOCTL_PWR_WR _IOW('o', 102, int) +#define NVC_IOCTL_PWR_RD _IOW('o', 103, int) +#define NVC_IOCTL_PARAM_WR _IOW('o', 104, struct nvc_param) +#define NVC_IOCTL_PARAM_RD _IOWR('o', 105, struct nvc_param) + + +#ifdef __KERNEL__ + +#include <linux/regulator/consumer.h> + +/* The NVC_CFG_ defines are for the .cfg entry in the + * platform data structure. + */ +/* Device not registered if not found */ +#define NVC_CFG_NODEV (1 << 0) +/* Don't return errors */ +#define NVC_CFG_NOERR (1 << 1) +/* Always go to _PWR_STDBY instead of _PWR_OFF */ +#define NVC_CFG_OFF2STDBY (1 << 2) +/* Init device at sys boot */ +#define NVC_CFG_BOOT_INIT (1 << 3) +/* Sync mode uses an I2C MUX to send at same time */ +#define NVC_CFG_SYNC_I2C_MUX (1 << 4) + +/* Expected higher level power calls are: + * 1 = OFF + * 2 = STANDBY + * 3 = ON + * These will be multiplied by 2 before given to the driver's PM code that + * uses the _PWR_ defines. This allows us to insert defines to give more power + * granularity and still remain linear with regards to the power usage and + * full power state transition latency for easy implementation of PM + * algorithms. + * The PM actions: + * _PWR_ERR = Non-valid state. + * _PWR_OFF_DELAYED = _PWR_OFF is called after a period of time. + * _PWR_OFF = Device, regulators, clocks, etc is turned off. The longest + * transition time to _PWR_ON is from this state. + * _PWR_STDBY_OFF = Device is useless but powered. No communication possible. + * Device does not retain programming. Main purpose is for + * faster return to _PWR_ON without regulator delays. + * _PWR_STDBY = Device is in standby. Device retains programming. + * _PWR_COMM = Device is powered enough to communicate with the device. + * _PWR_ON = Device is at full power with active output. + * + * The kernel drivers treat these calls as guaranteed level of service. + */ + +#define NVC_PWR_ERR 0 +#define NVC_PWR_OFF_DELAYED 1 /* obsolete - never used */ +#define NVC_PWR_OFF_FORCE 1 +#define NVC_PWR_OFF 2 +#define NVC_PWR_STDBY_OFF 3 +#define NVC_PWR_STDBY 4 +#define NVC_PWR_COMM 5 +#define NVC_PWR_ON 6 + +struct nvc_regulator { + bool vreg_flag; + struct regulator *vreg; + const char *vreg_name; +}; + +#endif /* __KERNEL__ */ + +#endif /* __NVC_H__ */ + diff --git a/include/media/nvc_focus.h b/include/media/nvc_focus.h new file mode 100644 index 000000000000..fd83258abab3 --- /dev/null +++ b/include/media/nvc_focus.h @@ -0,0 +1,48 @@ +/* Copyright (C) 2011 NVIDIA Corporation. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA + * 02111-1307, USA + */ + +#ifndef __NVC_FOCUS_H__ +#define __NVC_FOCUS_H__ + +enum nvc_focus_sts { + NVC_FOCUS_STS_UNKNOWN = 1, + NVC_FOCUS_STS_NO_DEVICE, + NVC_FOCUS_STS_INITIALIZING, + NVC_FOCUS_STS_INIT_ERR, + NVC_FOCUS_STS_WAIT_FOR_MOVE_END, + NVC_FOCUS_STS_WAIT_FOR_SETTLE, + NVC_FOCUS_STS_LENS_SETTLED, + NVC_FOCUS_STS_FORCE32 = 0x7FFFFFFF +}; + +struct nvc_focus_nvc { + __u32 focal_length; + __u32 fnumber; + __u32 max_aperature; +} __packed; + +struct nvc_focus_cap { + __u32 version; + __u32 actuator_range; + __u32 settle_time; + __u32 focus_macro; + __u32 focus_hyper; + __u32 focus_infinity; +} __packed; + +#endif /* __NVC_FOCUS_H__ */ + diff --git a/include/media/nvc_torch.h b/include/media/nvc_torch.h new file mode 100644 index 000000000000..7c88bc75af05 --- /dev/null +++ b/include/media/nvc_torch.h @@ -0,0 +1,43 @@ +/* Copyright (C) 2011 NVIDIA Corporation. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA + * 02111-1307, USA + */ + +#ifndef __NVC_TORCH_H__ +#define __NVC_TORCH_H__ + +struct nvc_torch_level_info { + __s32 guidenum; + __u32 sustaintime; + __s32 rechargefactor; +} __packed; + +struct nvc_torch_pin_state { + __u16 mask; + __u16 values; +} __packed; + +struct nvc_torch_flash_capabilities { + __u32 numberoflevels; + struct nvc_torch_level_info levels[]; +} __packed; + +struct nvc_torch_torch_capabilities { + __u32 numberoflevels; + __s32 guidenum[]; +} __packed; + +#endif /* __NVC_TORCH_H__ */ + diff --git a/include/media/ov14810.h b/include/media/ov14810.h new file mode 100644 index 000000000000..67a864959186 --- /dev/null +++ b/include/media/ov14810.h @@ -0,0 +1,47 @@ +/* + * Copyright (C) 2011 NVIDIA Corporation. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA + * 02111-1307, USA + */ + +#ifndef __OV14810_H__ +#define __OV14810_H__ + +#include <linux/ioctl.h> /* For IOCTL macros */ + +#define OV14810_IOCTL_SET_MODE _IOW('o', 1, struct ov14810_mode) +#define OV14810_IOCTL_SET_FRAME_LENGTH _IOW('o', 2, __u32) +#define OV14810_IOCTL_SET_COARSE_TIME _IOW('o', 3, __u32) +#define OV14810_IOCTL_SET_GAIN _IOW('o', 4, __u16) +#define OV14810_IOCTL_GET_STATUS _IOR('o', 5, __u8) +#define OV14810_IOCTL_SET_CAMERA_MODE _IOW('o', 10, __u32) +#define OV14810_IOCTL_SYNC_SENSORS _IOW('o', 11, __u32) + +struct ov14810_mode { + int xres; + int yres; + __u32 frame_length; + __u32 coarse_time; + __u16 gain; +}; +#ifdef __KERNEL__ +struct ov14810_platform_data { + int (*power_on)(void); + int (*power_off)(void); + void (*synchronize_sensors)(void); +}; +#endif /* __KERNEL__ */ + +#endif /* __OV14810_H__ */ diff --git a/include/media/ov2710.h b/include/media/ov2710.h new file mode 100644 index 000000000000..e3d43056d700 --- /dev/null +++ b/include/media/ov2710.h @@ -0,0 +1,47 @@ +/* + * Copyright (C) 2010 Motorola, Inc. + * Copyright (C) 2011 NVIDIA Corporation. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA + * 02111-1307, USA + */ + +#ifndef __OV2710_H__ +#define __OV2710_H__ + +#include <linux/ioctl.h> /* For IOCTL macros */ + +#define OV2710_IOCTL_SET_MODE _IOW('o', 1, struct ov2710_mode) +#define OV2710_IOCTL_SET_FRAME_LENGTH _IOW('o', 2, __u32) +#define OV2710_IOCTL_SET_COARSE_TIME _IOW('o', 3, __u32) +#define OV2710_IOCTL_SET_GAIN _IOW('o', 4, __u16) +#define OV2710_IOCTL_GET_STATUS _IOR('o', 5, __u8) + +struct ov2710_mode { + int xres; + int yres; + __u32 frame_length; + __u32 coarse_time; + __u16 gain; +}; +#ifdef __KERNEL__ +struct ov2710_platform_data { + int (*power_on)(void); + int (*power_off)(void); + +}; +#endif /* __KERNEL__ */ + +#endif /* __OV2710_H__ */ + diff --git a/include/media/ov5650.h b/include/media/ov5650.h new file mode 100644 index 000000000000..00efcec61a5f --- /dev/null +++ b/include/media/ov5650.h @@ -0,0 +1,83 @@ +/* + * Copyright (C) 2010 Motorola, Inc. + * Copyright (C) 2011 NVIDIA Corporation. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA + * 02111-1307, USA + */ + +#ifndef __OV5650_H__ +#define __OV5650_H__ + +#include <linux/ioctl.h> /* For IOCTL macros */ + +#define OV5650_IOCTL_SET_MODE _IOW('o', 1, struct ov5650_mode) +#define OV5650_IOCTL_SET_FRAME_LENGTH _IOW('o', 2, __u32) +#define OV5650_IOCTL_SET_COARSE_TIME _IOW('o', 3, __u32) +#define OV5650_IOCTL_SET_GAIN _IOW('o', 4, __u16) +#define OV5650_IOCTL_GET_STATUS _IOR('o', 5, __u8) +#define OV5650_IOCTL_SET_BINNING _IOW('o', 6, __u8) +#define OV5650_IOCTL_TEST_PATTERN _IOW('o', 7, enum ov5650_test_pattern) +#define OV5650_IOCTL_SET_CAMERA_MODE _IOW('o', 10, __u32) +#define OV5650_IOCTL_SYNC_SENSORS _IOW('o', 11, __u32) + +/* OV5650 registers */ +#define OV5650_SRM_GRUP_ACCESS (0x3212) +#define OV5650_ARRAY_CONTROL_01 (0x3621) +#define OV5650_ANALOG_CONTROL_D (0x370D) +#define OV5650_TIMING_TC_REG_18 (0x3818) +#define OV5650_TIMING_CONTROL_HS_HIGH (0x3800) +#define OV5650_TIMING_CONTROL_HS_LOW (0x3801) +#define OV5650_TIMING_CONTROL_VS_HIGH (0x3802) +#define OV5650_TIMING_CONTROL_VS_LOW (0x3803) +#define OV5650_TIMING_HW_HIGH (0x3804) +#define OV5650_TIMING_HW_LOW (0x3805) +#define OV5650_TIMING_VH_HIGH (0x3806) +#define OV5650_TIMING_VH_LOW (0x3807) +#define OV5650_TIMING_TC_REG_18 (0x3818) +#define OV5650_TIMING_HREFST_MAN_HIGH (0x3824) +#define OV5650_TIMING_HREFST_MAN_LOW (0x3825) +#define OV5650_H_BINNING_BIT (1 << 7) +#define OV5650_H_SUBSAMPLING_BIT (1 << 6) +#define OV5650_V_BINNING_BIT (1 << 6) +#define OV5650_V_SUBSAMPLING_BIT (1 << 0) +#define OV5650_GROUP_HOLD_BIT (1 << 7) +#define OV5650_GROUP_LAUNCH_BIT (1 << 5) +#define OV5650_GROUP_HOLD_END_BIT (1 << 4) +#define OV5650_GROUP_ID(id) (id) + +enum ov5650_test_pattern { + TEST_PATTERN_NONE, + TEST_PATTERN_COLORBARS, + TEST_PATTERN_CHECKERBOARD +}; + +struct ov5650_mode { + int xres; + int yres; + __u32 frame_length; + __u32 coarse_time; + __u16 gain; +}; + +#ifdef __KERNEL__ +struct ov5650_platform_data { + int (*power_on)(void); + int (*power_off)(void); + void (*synchronize_sensors)(void); +}; +#endif /* __KERNEL__ */ + +#endif /* __OV5650_H__ */ + diff --git a/include/media/ov9726.h b/include/media/ov9726.h new file mode 100644 index 000000000000..b1e759ba583c --- /dev/null +++ b/include/media/ov9726.h @@ -0,0 +1,62 @@ +/* +* ov9726.h +* +* Copyright (c) 2011, NVIDIA, All Rights Reserved. +* +* This file is licensed under the terms of the GNU General Public License +* version 2. This program is licensed "as is" without any warranty of any +* kind, whether express or implied. +*/ + +#ifndef __OV9726_H__ +#define __OV9726_H__ + +#include <linux/ioctl.h> + +#define OV9726_I2C_ADDR 0x20 + +#define OV9726_IOCTL_SET_MODE _IOW('o', 1, struct ov9726_mode) +#define OV9726_IOCTL_SET_FRAME_LENGTH _IOW('o', 2, __u32) +#define OV9726_IOCTL_SET_COARSE_TIME _IOW('o', 3, __u32) +#define OV9726_IOCTL_SET_GAIN _IOW('o', 4, __u16) +#define OV9726_IOCTL_GET_STATUS _IOR('o', 5, __u8) + +struct ov9726_mode { + int mode_id; + int xres; + int yres; + __u32 frame_length; + __u32 coarse_time; + __u16 gain; +}; + +struct ov9726_reg { + __u16 addr; + __u16 val; +}; + +#ifdef __KERNEL__ +#define OV9726_REG_FRAME_LENGTH_HI 0x340 +#define OV9726_REG_FRAME_LENGTH_LO 0x341 +#define OV9726_REG_COARSE_TIME_HI 0x202 +#define OV9726_REG_COARSE_TIME_LO 0x203 +#define OV9726_REG_GAIN_HI 0x204 +#define OV9726_REG_GAIN_LO 0x205 + +#define OV9726_MAX_RETRIES 3 + +#define OV9726_TABLE_WAIT_MS 0 +#define OV9726_TABLE_END 1 + +struct ov9726_platform_data { + int (*power_on)(void); + int (*power_off)(void); + unsigned gpio_rst; + bool rst_low_active; + unsigned gpio_pwdn; + bool pwdn_low_active; +}; +#endif /* __KERNEL__ */ + +#endif /* __OV9726_H__ */ + diff --git a/include/media/sh532u.h b/include/media/sh532u.h new file mode 100644 index 000000000000..19da2070b70f --- /dev/null +++ b/include/media/sh532u.h @@ -0,0 +1,319 @@ +/* + * Copyright (C) 2011 NVIDIA Corporation. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA + * 02111-1307, USA + */ + +#ifndef __SH532U_H__ +#define __SH532U_H__ + +#include <media/nvc_focus.h> + + +struct sh532u_platform_data { + int cfg; + int num; + int sync; + const char *dev_name; + struct nvc_focus_nvc (*nvc); + struct nvc_focus_cap (*cap); + struct sh532u_pdata_info (*info); + __u8 i2c_addr_rom; + unsigned gpio_reset; +/* Due to a Linux limitation, a GPIO is defined to "enable" the device. This + * workaround is for when the device's power GPIO's are behind an I2C expander. + * The Linux limitation doesn't allow the I2C GPIO expander to be ready for + * use when this device is probed. + */ + unsigned gpio_en; +}; + +struct sh532u_pdata_info { + __s16 pos_low; + __s16 pos_high; + __s16 limit_low; + __s16 limit_high; + int move_timeoutms; + __u32 focus_hyper_ratio; + __u32 focus_hyper_div; +}; + + +/* Register Definition : Sany Driver IC */ +/* EEPROM addresses */ +#define addrHallOffset 0x10 +#define addrHallBias 0x11 +#define addrInf1 0x12 +#define addrMac1 0x13 +#define addrLoopGainH 0x14 +#define addrLoopGainL 0x15 +#define addrInf2 0x16 +#define addrMac2 0x17 + +#define addrInf1_H 0x20 /* bottom mechanical limit of HVCA */ +#define addrInf1_L 0x21 +#define addrMac1_H 0x22 /* top mechanical limit of HVCA */ +#define addrMac1_L 0x23 +#define addrInf2_H 0x24 /* lens position when object is ?120cm */ +#define addrInf2_L 0x25 +#define addrMac2_H 0x26 /* lens position when object is ?10cm */ +#define addrMac2_L 0x27 +#define addrDacDeltaUp_H 0x28 /* difference between face up and down */ +#define addrDacDeltaUp_L 0x29 +#define addrAFoffset_H 0x2A /* best focus position subtract value */ +#define addrAFoffset_L 0x2B + +/* Convergence Judgement */ +#define INI_MSSET_211 0x00 +#define CHTGOKN_TIME 0x80 +#define CHTGOKN_WAIT 1 +#define CHTGOKN_TIMEOUT 50 +#define CHTGSTOKN_TOMEOUT 15 + +/* StepMove */ +#define STMV_SIZE 0x0180 + +#define STMCHTG_ON 0x08 +#define STMSV_ON 0x04 +#define STMLFF_ON 0x02 +#define STMVEN_ON 0x01 +#define STMCHTG_OFF 0x00 +#define STMSV_OFF 0x00 +#define STMLFF_OFF 0x00 +#define STMVEN_OFF 0x00 + +#define STMCHTG_SET STMCHTG_ON +#define STMSV_SET STMSV_ON +#define STMLFF_SET STMLFF_OFF + +#define CHTGST_ON 0x01 +#define DEFAULT_DADAT 0x8040 + +/* Delay RAM 00h ~ 3Fh */ +#define ADHXI_211H 0x00 +#define ADHXI_211L 0x01 +#define PIDZO_211H 0x02 +#define PIDZO_211L 0x03 +#define RZ_211H 0x04 +#define RZ_211L 0x05 +#define DZ1_211H 0x06 +#define DZ1_211L 0x07 +#define DZ2_211H 0x08 +#define DZ2_211L 0x09 +#define UZ1_211H 0x0A +#define UZ1_211L 0x0B +#define UZ2_211H 0x0C +#define UZ2_211L 0x0D +#define IZ1_211H 0x0E +#define IZ1_211L 0x0F +#define IZ2_211H 0x10 +#define IZ2_211L 0x11 +#define MS1Z01_211H 0x12 +#define MS1Z01_211L 0x13 +#define MS1Z11_211H 0x14 +#define MS1Z11_211L 0x15 +#define MS1Z12_211H 0x16 +#define MS1Z12_211L 0x17 +#define MS1Z22_211H 0x18 +#define MS1Z22_211L 0x19 +#define MS2Z01_211H 0x1A +#define MS2Z01_211L 0x1B +#define MS2Z11_211H 0x1C +#define MS2Z11_211L 0x1D +#define MS2Z12_211H 0x1E +#define MS2Z12_211L 0x1F +#define MS2Z22_211H 0x20 +#define MS2Z22_211L 0x21 +#define MS2Z23_211H 0x22 +#define MS2Z23_211L 0x23 +#define OZ1_211H 0x24 +#define OZ1_211L 0x25 +#define OZ2_211H 0x26 +#define OZ2_211L 0x27 +#define DAHLXO_211H 0x28 +#define DAHLXO_211L 0x29 +#define OZ3_211H 0x2A +#define OZ3_211L 0x2B +#define OZ4_211H 0x2C +#define OZ4_211L 0x2D +#define OZ5_211H 0x2E +#define OZ5_211L 0x2F +#define oe_211H 0x30 +#define oe_211L 0x31 +#define MSR1CMAX_211H 0x32 +#define MSR1CMAX_211L 0x33 +#define MSR1CMIN_211H 0x34 +#define MSR1CMIN_211L 0x35 +#define MSR2CMAX_211H 0x36 +#define MSR2CMAX_211L 0x37 +#define MSR2CMIN_211H 0x38 +#define MSR2CMIN_211L 0x39 +#define OFFSET_211H 0x3A +#define OFFSET_211L 0x3B +#define ADOFFSET_211H 0x3C +#define ADOFFSET_211L 0x3D +#define EZ_211H 0x3E +#define EZ_211L 0x3F + +/* Coefficient RAM 40h ~ 7Fh */ +#define ag_211H 0x40 +#define ag_211L 0x41 +#define da_211H 0x42 +#define da_211L 0x43 +#define db_211H 0x44 +#define db_211L 0x45 +#define dc_211H 0x46 +#define dc_211L 0x47 +#define dg_211H 0x48 +#define dg_211L 0x49 +#define pg_211H 0x4A +#define pg_211L 0x4B +#define gain1_211H 0x4C +#define gain1_211L 0x4D +#define gain2_211H 0x4E +#define gain2_211L 0x4F +#define ua_211H 0x50 +#define ua_211L 0x51 +#define uc_211H 0x52 +#define uc_211L 0x53 +#define ia_211H 0x54 +#define ia_211L 0x55 +#define ib_211H 0x56 +#define ib_211L 0x57 +#define i_c_211H 0x58 +#define i_c_211L 0x59 +#define ms11a_211H 0x5A +#define ms11a_211L 0x5B +#define ms11c_211H 0x5C +#define ms11c_211L 0x5D +#define ms12a_211H 0x5E +#define ms12a_211L 0x5F +#define ms12c_211H 0x60 +#define ms12c_211L 0x61 +#define ms21a_211H 0x62 +#define ms21a_211L 0x63 +#define ms21b_211H 0x64 +#define ms21b_211L 0x65 +#define ms21c_211H 0x66 +#define ms21c_211L 0x67 +#define ms22a_211H 0x68 +#define ms22a_211L 0x69 +#define ms22c_211H 0x6A +#define ms22c_211L 0x6B +#define ms22d_211H 0x6C +#define ms22d_211L 0x6D +#define ms22e_211H 0x6E +#define ms22e_211L 0x6F +#define ms23p_211H 0x70 +#define ms23p_211L 0x71 +#define oa_211H 0x72 +#define oa_211L 0x73 +#define oc_211H 0x74 +#define oc_211L 0x75 +#define PX12_211H 0x76 +#define PX12_211L 0x77 +#define PX3_211H 0x78 +#define PX3_211L 0x79 +#define MS2X_211H 0x7A +#define MS2X_211L 0x7B +#define CHTGX_211H 0x7C +#define CHTGX_211L 0x7D +#define CHTGN_211H 0x7E +#define CHTGN_211L 0x7F + +/* Register 80h ~ 9F */ +#define CLKSEL_211 0x80 +#define ADSET_211 0x81 +#define PWMSEL_211 0x82 +#define SWTCH_211 0x83 +#define STBY_211 0x84 +#define CLR_211 0x85 +#define DSSEL_211 0x86 +#define ENBL_211 0x87 +#define ANA1_211 0x88 +#define STMVEN_211 0x8A +#define STPT_211 0x8B +#define SWFC_211 0x8C +#define SWEN_211 0x8D +#define MSNUM_211 0x8E +#define MSSET_211 0x8F +#define DLYMON_211 0x90 +#define MONA_211 0x91 +#define PWMLIMIT_211 0x92 +#define PINSEL_211 0x93 +#define PWMSEL2_211 0x94 +#define SFTRST_211 0x95 +#define TEST_211 0x96 +#define PWMZONE2_211 0x97 +#define PWMZONE1_211 0x98 +#define PWMZONE0_211 0x99 +#define ZONE3_211 0x9A +#define ZONE2_211 0x9B +#define ZONE1_211 0x9C +#define ZONE0_211 0x9D +#define GCTIM_211 0x9E +#define GCTIM_211NU 0x9F +#define STMINT_211 0xA0 +#define STMVENDH_211 0xA1 +#define STMVENDL_211 0xA2 +#define MSNUMR_211 0xA3 +#define ANA2_211 0xA4 + +/* Device ID of HVCA Drive IC */ +#define HVCA_DEVICE_ID 0xE4 + +/* Device ID of E2P ROM */ +#define EEP_DEVICE_ID 0xA0 +#define EEP_PAGE0 0x00 +#define EEP_PAGE1 0x02 +#define EEP_PAGE2 0x04 +#define EEP_PAGE3 0x06 +/* E2P ROM has 1023 bytes. So there are 4 pages memory */ +/* E2PROM Device ID = 1 0 1 0 0 P0 P1 0 */ +/* +P0 P1 +0 0 : Page 0 +0 1 : Page 1 +1 0 : Page 2 +1 1 : Page 3 +*/ +/* Page 0: address 0x000~0x0FF, E2PROM Device ID = E2P_DEVICE_ID|E2P_PAGE0 */ +/* Page 1: address 0x100~0x1FF, E2PROM Device ID = E2P_DEVICE_ID|E2P_PAGE1 */ +/* Page 2: address 0x200~0x2FF, E2PROM Device ID = E2P_DEVICE_ID|E2P_PAGE2 */ +/* Page 3: address 0x300~0x3FF, E2PROM Device ID = E2P_DEVICE_ID|E2P_PAGE3 */ +/* +*/ + +/* E2P data type define of HVCA Initial Value Section */ +#define DIRECT_MODE 0x00 +#define INDIRECT_EEPROM 0x10 +#define INDIRECT_HVCA 0x20 +#define MASK_AND 0x70 +#define MASK_OR 0x80 + +#define DATA_1BYTE 0x01 +#define DATA_2BYTE 0x02 + +#define START_ADDR 0x0030 +#define END_ADDR 0x01BF + +/*Macro define*/ +#if !defined(abs) +#define abs(a) (((a) > 0) ? (a) : -(a)) +#endif + +#endif +/* __SH532U_H__ */ + diff --git a/include/media/soc380.h b/include/media/soc380.h new file mode 100644 index 000000000000..254625f74f82 --- /dev/null +++ b/include/media/soc380.h @@ -0,0 +1,59 @@ +/* + * Copyright (c) 2011, NVIDIA CORPORATION, All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are + * met: + * + * Redistributions of source code must retain the above copyright notice, + * this list of conditions and the following disclaimer. + * + * Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * + * Neither the name of NVIDIA CORPORATION nor the names of its contributors + * may be used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS + * IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED + * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A + * PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT + * HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, + * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED + * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR + * PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF + * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING + * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS + * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +#ifndef __SOC380_H__ +#define __SOC380_H__ + +#include <linux/ioctl.h> /* For IOCTL macros */ + +#define SOC380_IOCTL_SET_MODE _IOW('o', 1, struct soc380_mode) +#define SOC380_IOCTL_GET_STATUS _IOR('o', 2, struct soc380_status) + +struct soc380_mode { + int xres; + int yres; +}; + +struct soc380_status { + int data; + int status; +}; + +#ifdef __KERNEL__ +struct soc380_platform_data { + int (*power_on)(void); + int (*power_off)(void); + +}; +#endif /* __KERNEL__ */ + +#endif /* __SOC380_H__ */ + diff --git a/include/media/ssl3250a.h b/include/media/ssl3250a.h new file mode 100644 index 000000000000..c4e802fa2efc --- /dev/null +++ b/include/media/ssl3250a.h @@ -0,0 +1,38 @@ +/* Copyright (C) 2011 NVIDIA Corporation. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA + * 02111-1307, USA + */ + +#ifndef __SSL3250A_H__ +#define __SSL3250A_H__ + +#include <media/nvc_torch.h> + +#define SSL3250A_MAX_TORCH_LEVEL 11 +#define SSL3250A_MAX_FLASH_LEVEL 20 + +struct ssl3250a_platform_data { + unsigned cfg; /* use the NVC_CFG_ defines */ + unsigned num; /* see implementation notes in driver */ + unsigned sync; /* see implementation notes in driver */ + const char *dev_name; /* see implementation notes in driver */ + struct nvc_torch_pin_state (*pinstate); /* see notes in driver */ + unsigned max_amp_torch; /* maximum torch value allowed */ + unsigned max_amp_flash; /* maximum flash value allowed */ + unsigned gpio_act; /* GPIO connected to the ACT signal */ +}; + +#endif /* __SSL3250A_H__ */ + diff --git a/include/media/tegra_camera.h b/include/media/tegra_camera.h new file mode 100644 index 000000000000..d7d08bd9a99b --- /dev/null +++ b/include/media/tegra_camera.h @@ -0,0 +1,55 @@ +/* + * include/linux/tegra_camera.h + * + * Copyright (C) 2010 Google, Inc. + * + * This software is licensed under the terms of the GNU General Public + * License version 2, as published by the Free Software Foundation, and + * may be copied, distributed, and modified under those terms. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + */ +#ifndef TEGRA_CAMERA_H +#define TEGRA_CAMERA_H + +/* this is to enable VI pattern generator (Null Sensor) */ +#define TEGRA_CAMERA_ENABLE_PD2VI_CLK 0x1 + +enum { + TEGRA_CAMERA_MODULE_ISP = 0, + TEGRA_CAMERA_MODULE_VI, + TEGRA_CAMERA_MODULE_CSI, +}; + +enum { + TEGRA_CAMERA_VI_CLK, + TEGRA_CAMERA_VI_SENSOR_CLK, +}; + +struct tegra_camera_clk_info { + uint id; + uint clk_id; + unsigned long rate; + uint flag; /* to inform if any special bits need to enabled/disabled */ +}; + +enum StereoCameraMode { + Main = 0x0, /* Sets the default camera to Main */ + StereoCameraMode_Left = 0x01, /* the left camera is on. */ + StereoCameraMode_Right = 0x02, /* the right camera is on. */ + StereoCameraMode_Stereo = 0x03, /* both cameras are on. */ + StereoCameraMode_Force32 = 0x7FFFFFFF +}; + + +#define TEGRA_CAMERA_IOCTL_ENABLE _IOWR('i', 1, uint) +#define TEGRA_CAMERA_IOCTL_DISABLE _IOWR('i', 2, uint) +#define TEGRA_CAMERA_IOCTL_CLK_SET_RATE \ + _IOWR('i', 3, struct tegra_camera_clk_info) +#define TEGRA_CAMERA_IOCTL_RESET _IOWR('i', 4, uint) + +#endif diff --git a/include/media/tps61050.h b/include/media/tps61050.h new file mode 100644 index 000000000000..1c289eb3616e --- /dev/null +++ b/include/media/tps61050.h @@ -0,0 +1,36 @@ +/* Copyright (C) 2011 NVIDIA Corporation. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA + * 02111-1307, USA + */ + +#ifndef __TPS61050_H__ +#define __TPS61050_H__ + +#include <media/nvc_torch.h> + +#define TPS61050_MAX_TORCH_LEVEL 7 +#define TPS61050_MAX_FLASH_LEVEL 8 + +struct tps61050_platform_data { + unsigned cfg; /* use the NVC_CFG_ defines */ + unsigned num; /* see implementation notes in driver */ + unsigned sync; /* see implementation notes in driver */ + const char *dev_name; /* see implementation notes in driver */ + struct nvc_torch_pin_state (*pinstate); /* see notes in driver */ + unsigned max_amp_torch; /* see implementation notes in driver */ + unsigned max_amp_flash; /* see implementation notes in driver */ +}; + +#endif /* __TPS61050_H__ */ diff --git a/include/net/activity_stats.h b/include/net/activity_stats.h new file mode 100644 index 000000000000..10e4c1506eeb --- /dev/null +++ b/include/net/activity_stats.h @@ -0,0 +1,25 @@ +/* + * Copyright (C) 2010 Google, Inc. + * + * This software is licensed under the terms of the GNU General Public + * License version 2, as published by the Free Software Foundation, and + * may be copied, distributed, and modified under those terms. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * Author: Mike Chan (mike@android.com) + */ + +#ifndef __activity_stats_h +#define __activity_stats_h + +#ifdef CONFIG_NET_ACTIVITY_STATS +void activity_stats_update(void); +#else +#define activity_stats_update(void) {} +#endif + +#endif /* _NET_ACTIVITY_STATS_H */ diff --git a/include/net/addrconf.h b/include/net/addrconf.h index 582e4ae70753..cbc6bb0a6838 100644 --- a/include/net/addrconf.h +++ b/include/net/addrconf.h @@ -8,7 +8,7 @@ #define TEMP_VALID_LIFETIME (7*86400) #define TEMP_PREFERRED_LIFETIME (86400) -#define REGEN_MAX_RETRY (5) +#define REGEN_MAX_RETRY (3) #define MAX_DESYNC_FACTOR (600) #define ADDR_CHECK_FREQUENCY (120*HZ) diff --git a/include/net/bluetooth/hci.h b/include/net/bluetooth/hci.h index be30aabe7b88..915d7ae527b3 100644 --- a/include/net/bluetooth/hci.h +++ b/include/net/bluetooth/hci.h @@ -37,6 +37,7 @@ #define HCI_DEV_DOWN 4 #define HCI_DEV_SUSPEND 5 #define HCI_DEV_RESUME 6 +#define HCI_DEV_WRITE 7 /* HCI notify events */ #define HCI_NOTIFY_CONN_ADD 1 @@ -157,8 +158,10 @@ enum { #define ESCO_2EV5 0x0100 #define ESCO_3EV5 0x0200 -#define SCO_ESCO_MASK (ESCO_HV1 | ESCO_HV2 | ESCO_HV3) -#define EDR_ESCO_MASK (ESCO_2EV3 | ESCO_3EV3 | ESCO_2EV5 | ESCO_3EV5) +#define SCO_ESCO_MASK (ESCO_HV1 | ESCO_HV2 | ESCO_HV3) +#define EDR_ESCO_MASK (ESCO_2EV3 | ESCO_3EV3 | ESCO_2EV5 | ESCO_3EV5) +#define ALL_ESCO_MASK (SCO_ESCO_MASK | ESCO_EV3 | ESCO_EV4 | ESCO_EV5 | \ + EDR_ESCO_MASK) /* ACL flags */ #define ACL_START_NO_FLUSH 0x00 @@ -1261,6 +1264,9 @@ struct hci_conn_info { __u8 out; __u16 state; __u32 link_mode; + __u32 mtu; + __u32 cnt; + __u32 pkts; }; struct hci_dev_req { diff --git a/include/net/bluetooth/hci_core.h b/include/net/bluetooth/hci_core.h index 8f441b8b2963..626f8b0a6791 100644 --- a/include/net/bluetooth/hci_core.h +++ b/include/net/bluetooth/hci_core.h @@ -446,12 +446,14 @@ void hci_add_sco(struct hci_conn *conn, __u16 handle); void hci_setup_sync(struct hci_conn *conn, __u16 handle); void hci_sco_setup(struct hci_conn *conn, __u8 status); -struct hci_conn *hci_conn_add(struct hci_dev *hdev, int type, bdaddr_t *dst); +struct hci_conn *hci_conn_add(struct hci_dev *hdev, int type, + __u16 pkt_type, bdaddr_t *dst); int hci_conn_del(struct hci_conn *conn); void hci_conn_hash_flush(struct hci_dev *hdev); void hci_conn_check_pending(struct hci_dev *hdev); -struct hci_conn *hci_connect(struct hci_dev *hdev, int type, bdaddr_t *dst, +struct hci_conn *hci_connect(struct hci_dev *hdev, int type, + __u16 pkt_type, bdaddr_t *dst, __u8 sec_level, __u8 auth_type); int hci_conn_check_link_mode(struct hci_conn *conn); int hci_conn_check_secure(struct hci_conn *conn, __u8 sec_level); @@ -480,7 +482,7 @@ static inline void hci_conn_put(struct hci_conn *conn) if (conn->state == BT_CONNECTED) { timeo = msecs_to_jiffies(conn->disc_timeout); if (!conn->out) - timeo *= 2; + timeo *= 20; } else { timeo = msecs_to_jiffies(10); } diff --git a/include/net/bluetooth/sco.h b/include/net/bluetooth/sco.h index 1e35c43657c8..6d1857ab8e5f 100644 --- a/include/net/bluetooth/sco.h +++ b/include/net/bluetooth/sco.h @@ -37,6 +37,7 @@ struct sockaddr_sco { sa_family_t sco_family; bdaddr_t sco_bdaddr; + __u16 sco_pkt_type; }; /* SCO socket options */ @@ -72,7 +73,8 @@ struct sco_conn { struct sco_pinfo { struct bt_sock bt; - __u32 flags; + __u16 pkt_type; + struct sco_conn *conn; }; diff --git a/include/net/if_inet6.h b/include/net/if_inet6.h index 11cf373970a9..51a7031b4aa3 100644 --- a/include/net/if_inet6.h +++ b/include/net/if_inet6.h @@ -41,6 +41,7 @@ struct inet6_ifaddr { struct in6_addr addr; __u32 prefix_len; + /* In seconds, relative to tstamp. Expiry is at tstamp + HZ * lft. */ __u32 valid_lft; __u32 prefered_lft; atomic_t refcnt; diff --git a/include/net/tcp.h b/include/net/tcp.h index acc620a4a45f..4fcd77af4055 100644 --- a/include/net/tcp.h +++ b/include/net/tcp.h @@ -1431,6 +1431,8 @@ extern struct sk_buff **tcp4_gro_receive(struct sk_buff **head, extern int tcp_gro_complete(struct sk_buff *skb); extern int tcp4_gro_complete(struct sk_buff *skb); +extern int tcp_nuke_addr(struct net *net, struct sockaddr *addr); + #ifdef CONFIG_PROC_FS extern int tcp4_proc_init(void); extern void tcp4_proc_exit(void); diff --git a/include/sound/max98088.h b/include/sound/max98088.h index c3ba8239182d..9b4fceb360ac 100644 --- a/include/sound/max98088.h +++ b/include/sound/max98088.h @@ -31,6 +31,10 @@ struct max98088_pdata { struct max98088_eq_cfg *eq_cfg; unsigned int eq_cfgcnt; + /* has to be one of 25,50,100 or 200 ms + as per the data sheet */ + unsigned int debounce_time_ms; + /* Receiver output can be configured as power amplifier or LINE out */ /* Set receiver_mode to: * 0 = amplifier output, or diff --git a/include/sound/tlv320aic326x.h b/include/sound/tlv320aic326x.h new file mode 100644 index 000000000000..97e5841f9044 --- /dev/null +++ b/include/sound/tlv320aic326x.h @@ -0,0 +1,23 @@ +/* + * Platform data for Texas Instruments TLV320AIC326x codec + * + * Copyright 2010 TI Products + * + * This program is free software; you can redistribute it and/or modify it + * under the terms of the GNU General Public License as published by the + * Free Software Foundation; either version 2 of the License, or (at your + * option) any later version. + * + */ +#ifndef __LINUX_SND_TLV320AIC326x_H__ +#define __LINUX_SND_TLV320AIC326x_H__ + +/* codec platform data */ +struct aic326x_pdata { + + /* has to be one of 16,32,64,128,256,512 ms + as per the data sheet */ + unsigned int debounce_time_ms; +}; + +#endif diff --git a/include/trace/events/nvhost.h b/include/trace/events/nvhost.h new file mode 100644 index 000000000000..6c266b9f2ea4 --- /dev/null +++ b/include/trace/events/nvhost.h @@ -0,0 +1,411 @@ +/* + * include/trace/events/nvhost.h + * + * Nvhost event logging to ftrace. + * + * Copyright (c) 2010-2011, NVIDIA Corporation. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + * more details. + * + * You should have received a copy of the GNU General Public License along + * with this program; if not, write to the Free Software Foundation, Inc., + * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, USA. + */ + +#undef TRACE_SYSTEM +#define TRACE_SYSTEM nvhost + +#if !defined(_TRACE_NVHOST_H) || defined(TRACE_HEADER_MULTI_READ) +#define _TRACE_NVHOST_H + +#include <linux/ktime.h> +#include <linux/tracepoint.h> + +DECLARE_EVENT_CLASS(nvhost, + TP_PROTO(const char *name), + TP_ARGS(name), + TP_STRUCT__entry(__field(const char *, name)), + TP_fast_assign(__entry->name = name;), + TP_printk("name=%s", __entry->name) +); + +DEFINE_EVENT(nvhost, nvhost_channel_open, + TP_PROTO(const char *name), + TP_ARGS(name) +); + +DEFINE_EVENT(nvhost, nvhost_channel_release, + TP_PROTO(const char *name), + TP_ARGS(name) +); + +DEFINE_EVENT(nvhost, nvhost_ioctl_channel_flush, + TP_PROTO(const char *name), + TP_ARGS(name) +); + +TRACE_EVENT(nvhost_channel_write_submit, + TP_PROTO(const char *name, ssize_t count, u32 cmdbufs, u32 relocs, + u32 syncpt_id, u32 syncpt_incrs), + + TP_ARGS(name, count, cmdbufs, relocs, syncpt_id, syncpt_incrs), + + TP_STRUCT__entry( + __field(const char *, name) + __field(ssize_t, count) + __field(u32, cmdbufs) + __field(u32, relocs) + __field(u32, syncpt_id) + __field(u32, syncpt_incrs) + ), + + TP_fast_assign( + __entry->name = name; + __entry->count = count; + __entry->cmdbufs = cmdbufs; + __entry->relocs = relocs; + __entry->syncpt_id = syncpt_id; + __entry->syncpt_incrs = syncpt_incrs; + ), + + TP_printk("name=%s, count=%d, cmdbufs=%u, relocs=%u, syncpt_id=%u, syncpt_incrs=%u", + __entry->name, __entry->count, __entry->cmdbufs, __entry->relocs, + __entry->syncpt_id, __entry->syncpt_incrs) +); + +TRACE_EVENT(nvhost_ioctl_channel_submit, + TP_PROTO(const char *name, u32 version, u32 cmdbufs, u32 relocs, + u32 waitchks, u32 syncpt_id, u32 syncpt_incrs), + + TP_ARGS(name, version, cmdbufs, relocs, waitchks, + syncpt_id, syncpt_incrs), + + TP_STRUCT__entry( + __field(const char *, name) + __field(u32, version) + __field(u32, cmdbufs) + __field(u32, relocs) + __field(u32, waitchks) + __field(u32, syncpt_id) + __field(u32, syncpt_incrs) + ), + + TP_fast_assign( + __entry->name = name; + __entry->version = version; + __entry->cmdbufs = cmdbufs; + __entry->relocs = relocs; + __entry->waitchks = waitchks; + __entry->syncpt_id = syncpt_id; + __entry->syncpt_incrs = syncpt_incrs; + ), + + TP_printk("name=%s, version=%u, cmdbufs=%u, relocs=%u, waitchks=%u, syncpt_id=%u, syncpt_incrs=%u", + __entry->name, __entry->version, __entry->cmdbufs, __entry->relocs, + __entry->waitchks, __entry->syncpt_id, __entry->syncpt_incrs) +); + +TRACE_EVENT(nvhost_channel_write_cmdbuf, + TP_PROTO(const char *name, u32 mem_id, + u32 words, u32 offset), + + TP_ARGS(name, mem_id, words, offset), + + TP_STRUCT__entry( + __field(const char *, name) + __field(u32, mem_id) + __field(u32, words) + __field(u32, offset) + ), + + TP_fast_assign( + __entry->name = name; + __entry->mem_id = mem_id; + __entry->words = words; + __entry->offset = offset; + ), + + TP_printk("name=%s, mem_id=%08x, words=%u, offset=%d", + __entry->name, __entry->mem_id, + __entry->words, __entry->offset) +); + +TRACE_EVENT(nvhost_channel_write_cmdbuf_data, + TP_PROTO(const char *name, u32 mem_id, + u32 words, u32 offset, void *cmdbuf), + + TP_ARGS(name, mem_id, words, offset, cmdbuf), + + TP_STRUCT__entry( + __field(const char *, name) + __field(u32, mem_id) + __field(u32, words) + __field(u32, offset) + __field(bool, cmdbuf) + __dynamic_array(u32, cmdbuf, words) + ), + + TP_fast_assign( + if (cmdbuf) { + memcpy(__get_dynamic_array(cmdbuf), cmdbuf+offset, + words * sizeof(u32)); + } + __entry->cmdbuf = cmdbuf; + __entry->name = name; + __entry->mem_id = mem_id; + __entry->words = words; + __entry->offset = offset; + ), + + TP_printk("name=%s, mem_id=%08x, words=%u, offset=%d, contents=[%s]", + __entry->name, __entry->mem_id, + __entry->words, __entry->offset, + __print_hex(__get_dynamic_array(cmdbuf), + __entry->cmdbuf ? __entry->words * 4 : 0)) +); + +TRACE_EVENT(nvhost_channel_write_reloc, + TP_PROTO(const char *name), + + TP_ARGS(name), + + TP_STRUCT__entry( + __field(const char *, name) + ), + + TP_fast_assign( + __entry->name = name; + ), + + TP_printk("name=%s", + __entry->name) +); + +TRACE_EVENT(nvhost_channel_write_waitchks, + TP_PROTO(const char *name, u32 waitchks, u32 waitmask), + + TP_ARGS(name, waitchks, waitmask), + + TP_STRUCT__entry( + __field(const char *, name) + __field(u32, waitchks) + __field(u32, waitmask) + ), + + TP_fast_assign( + __entry->name = name; + __entry->waitchks = waitchks; + __entry->waitmask = waitmask; + ), + + TP_printk("name=%s, waitchks=%u, waitmask=%08x", + __entry->name, __entry->waitchks, __entry->waitmask) +); + +TRACE_EVENT(nvhost_channel_context_switch, + TP_PROTO(const char *name, void *old_ctx, void *new_ctx), + + TP_ARGS(name, old_ctx, new_ctx), + + TP_STRUCT__entry( + __field(const char *, name) + __field(void*, old_ctx) + __field(void*, new_ctx) + ), + + TP_fast_assign( + __entry->name = name; + __entry->old_ctx = old_ctx; + __entry->new_ctx = new_ctx; + ), + + TP_printk("name=%s, old=%p, new=%p", + __entry->name, __entry->old_ctx, __entry->new_ctx) +); + +TRACE_EVENT(nvhost_ctrlopen, + TP_PROTO(const char *name), + TP_ARGS(name), + TP_STRUCT__entry( + __field(const char *, name) + ), + TP_fast_assign( + __entry->name = name + ), + TP_printk("name=%s", __entry->name) +); + +TRACE_EVENT(nvhost_ctrlrelease, + TP_PROTO(const char *name), + TP_ARGS(name), + TP_STRUCT__entry( + __field(const char *, name) + ), + TP_fast_assign( + __entry->name = name + ), + TP_printk("name=%s", __entry->name) +); + +TRACE_EVENT(nvhost_ioctl_ctrl_module_mutex, + TP_PROTO(u32 lock, u32 id), + + TP_ARGS(lock, id), + + TP_STRUCT__entry( + __field(u32, lock); + __field(u32, id); + ), + + TP_fast_assign( + __entry->lock = lock; + __entry->id = id; + ), + + TP_printk("lock=%u, id=%d", + __entry->lock, __entry->id) + ); + +TRACE_EVENT(nvhost_ioctl_ctrl_syncpt_incr, + TP_PROTO(u32 id), + + TP_ARGS(id), + + TP_STRUCT__entry( + __field(u32, id); + ), + + TP_fast_assign( + __entry->id = id; + ), + + TP_printk("id=%d", __entry->id) +); + +TRACE_EVENT(nvhost_ioctl_ctrl_syncpt_read, + TP_PROTO(u32 id), + + TP_ARGS(id), + + TP_STRUCT__entry( + __field(u32, id); + ), + + TP_fast_assign( + __entry->id = id; + ), + + TP_printk("id=%d", __entry->id) +); + +TRACE_EVENT(nvhost_ioctl_ctrl_syncpt_wait, + TP_PROTO(u32 id, u32 threshold, s32 timeout), + + TP_ARGS(id, threshold, timeout), + + TP_STRUCT__entry( + __field(u32, id) + __field(u32, threshold) + __field(s32, timeout) + ), + + TP_fast_assign( + __entry->id = id; + __entry->threshold = threshold; + __entry->timeout = timeout; + ), + + TP_printk("id=%u, threshold=%u, timeout=%d", + __entry->id, __entry->threshold, __entry->timeout) +); + +TRACE_EVENT(nvhost_ioctl_ctrl_module_regrdwr, + TP_PROTO(u32 id, u32 num_offsets, bool write), + + TP_ARGS(id, num_offsets, write), + + TP_STRUCT__entry( + __field(u32, id) + __field(u32, num_offsets) + __field(bool, write) + ), + + TP_fast_assign( + __entry->id = id; + __entry->num_offsets = num_offsets; + __entry->write = write; + ), + + TP_printk("id=%u, num_offsets=%u, write=%d", + __entry->id, __entry->num_offsets, __entry->write) +); + +TRACE_EVENT(nvhost_channel_submitted, + TP_PROTO(const char *name, u32 syncpt_base, u32 syncpt_max), + + TP_ARGS(name, syncpt_base, syncpt_max), + + TP_STRUCT__entry( + __field(const char *, name) + __field(u32, syncpt_base) + __field(u32, syncpt_max) + ), + + TP_fast_assign( + __entry->name = name; + __entry->syncpt_base = syncpt_base; + __entry->syncpt_max = syncpt_max; + ), + + TP_printk("name=%s, syncpt_base=%d, syncpt_max=%d", + __entry->name, __entry->syncpt_base, __entry->syncpt_max) +); + +TRACE_EVENT(nvhost_channel_submit_complete, + TP_PROTO(const char *name, int count), + + TP_ARGS(name, count), + + TP_STRUCT__entry( + __field(const char *, name) + __field(int, count) + ), + + TP_fast_assign( + __entry->name = name; + __entry->count = count; + ), + + TP_printk("name=%s, count=%d", __entry->name, __entry->count) +); + +TRACE_EVENT(nvhost_wait_cdma, + TP_PROTO(const char *name, u32 eventid), + + TP_ARGS(name, eventid), + + TP_STRUCT__entry( + __field(const char *, name) + __field(u32, eventid) + ), + + TP_fast_assign( + __entry->name = name; + __entry->eventid = eventid; + ), + + TP_printk("name=%s, event=%d", __entry->name, __entry->eventid) +); + +#endif /* _TRACE_NVHOST_H */ + +/* This part must be outside protection */ +#include <trace/define_trace.h> diff --git a/include/video/nvhdcp.h b/include/video/nvhdcp.h new file mode 100644 index 000000000000..f282ff8caa99 --- /dev/null +++ b/include/video/nvhdcp.h @@ -0,0 +1,91 @@ +/* + * include/video/nvhdcp.h + * + * Copyright (c) 2010-2011, NVIDIA Corporation. + * + * This software is licensed under the terms of the GNU General Public + * License version 2, as published by the Free Software Foundation, and + * may be copied, distributed, and modified under those terms. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + */ + +#ifndef _LINUX_NVHDCP_H_ +#define _LINUX_NVHDCP_H_ + +#include <linux/fb.h> +#include <linux/types.h> +#include <asm/ioctl.h> + +/* maximum receivers and repeaters connected at a time */ +#define TEGRA_NVHDCP_MAX_DEVS 127 + +/* values for value_flags */ +#define TEGRA_NVHDCP_FLAG_AN 0x0001 +#define TEGRA_NVHDCP_FLAG_AKSV 0x0002 +#define TEGRA_NVHDCP_FLAG_BKSV 0x0004 +#define TEGRA_NVHDCP_FLAG_BSTATUS 0x0008 /* repeater status */ +#define TEGRA_NVHDCP_FLAG_CN 0x0010 /* c_n */ +#define TEGRA_NVHDCP_FLAG_CKSV 0x0020 /* c_ksv */ +#define TEGRA_NVHDCP_FLAG_DKSV 0x0040 /* d_ksv */ +#define TEGRA_NVHDCP_FLAG_KP 0x0080 /* k_prime */ +#define TEGRA_NVHDCP_FLAG_S 0x0100 /* hdcp_status */ +#define TEGRA_NVHDCP_FLAG_CS 0x0200 /* connection state */ +#define TEGRA_NVHDCP_FLAG_V 0x0400 +#define TEGRA_NVHDCP_FLAG_MP 0x0800 +#define TEGRA_NVHDCP_FLAG_BKSVLIST 0x1000 + +/* values for packet_results */ +#define TEGRA_NVHDCP_RESULT_SUCCESS 0 +#define TEGRA_NVHDCP_RESULT_UNSUCCESSFUL 1 +#define TEGRA_NVHDCP_RESULT_PENDING 0x103 +#define TEGRA_NVHDCP_RESULT_LINK_FAILED 0xc0000013 +/* TODO: replace with -EINVAL */ +#define TEGRA_NVHDCP_RESULT_INVALID_PARAMETER 0xc000000d +#define TEGRA_NVHDCP_RESULT_INVALID_PARAMETER_MIX 0xc0000030 +/* TODO: replace with -ENOMEM */ +#define TEGRA_NVHDCP_RESULT_NO_MEMORY 0xc0000017 + +struct tegra_nvhdcp_packet { + __u32 value_flags; // (IN/OUT) + __u32 packet_results; // (OUT) + + __u64 c_n; // (IN) upstream exchange number + __u64 c_ksv; // (IN) + + __u32 b_status; // (OUT) link/repeater status + __u64 hdcp_status; // (OUT) READ_S + __u64 cs; // (OUT) Connection State + + __u64 k_prime; // (OUT) + __u64 a_n; // (OUT) + __u64 a_ksv; // (OUT) + __u64 b_ksv; // (OUT) + __u64 d_ksv; // (OUT) + __u8 v_prime[20]; // (OUT) 160-bit + __u64 m_prime; // (OUT) + + // (OUT) Valid KSVs in the bKsvList. Maximum is 127 devices + __u32 num_bksv_list; + + // (OUT) Up to 127 receivers & repeaters + __u64 bksv_list[TEGRA_NVHDCP_MAX_DEVS]; +}; + +/* parameters to TEGRAIO_NVHDCP_SET_POLICY */ +#define TEGRA_NVHDCP_POLICY_ON_DEMAND 0 +#define TEGRA_NVHDCP_POLICY_ALWAYS_ON 1 + +/* ioctls */ +#define TEGRAIO_NVHDCP_ON _IO('F', 0x70) +#define TEGRAIO_NVHDCP_OFF _IO('F', 0x71) +#define TEGRAIO_NVHDCP_SET_POLICY _IOW('F', 0x72, __u32) +#define TEGRAIO_NVHDCP_READ_M _IOWR('F', 0x73, struct tegra_nvhdcp_packet) +#define TEGRAIO_NVHDCP_READ_S _IOWR('F', 0x74, struct tegra_nvhdcp_packet) +#define TEGRAIO_NVHDCP_RENEGOTIATE _IO('F', 0x75) + +#endif diff --git a/include/video/tegra_dc_ext.h b/include/video/tegra_dc_ext.h new file mode 100644 index 000000000000..7f504be1346a --- /dev/null +++ b/include/video/tegra_dc_ext.h @@ -0,0 +1,309 @@ +/* + * Copyright (C) 2011, NVIDIA Corporation + * + * Author: Robert Morell <rmorell@nvidia.com> + * Some code based on fbdev extensions written by: + * Erik Gilling <konkers@android.com> + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + * more details. + */ + +#ifndef __TEGRA_DC_EXT_H +#define __TEGRA_DC_EXT_H + +#include <linux/types.h> +#include <linux/ioctl.h> +#if defined(__KERNEL__) +# include <linux/time.h> +#else +# include <time.h> +# include <unistd.h> +#endif + +#define TEGRA_DC_EXT_FMT_P1 0 +#define TEGRA_DC_EXT_FMT_P2 1 +#define TEGRA_DC_EXT_FMT_P4 2 +#define TEGRA_DC_EXT_FMT_P8 3 +#define TEGRA_DC_EXT_FMT_B4G4R4A4 4 +#define TEGRA_DC_EXT_FMT_B5G5R5A 5 +#define TEGRA_DC_EXT_FMT_B5G6R5 6 +#define TEGRA_DC_EXT_FMT_AB5G5R5 7 +#define TEGRA_DC_EXT_FMT_B8G8R8A8 12 +#define TEGRA_DC_EXT_FMT_R8G8B8A8 13 +#define TEGRA_DC_EXT_FMT_B6x2G6x2R6x2A8 14 +#define TEGRA_DC_EXT_FMT_R6x2G6x2B6x2A8 15 +#define TEGRA_DC_EXT_FMT_YCbCr422 16 +#define TEGRA_DC_EXT_FMT_YUV422 17 +#define TEGRA_DC_EXT_FMT_YCbCr420P 18 +#define TEGRA_DC_EXT_FMT_YUV420P 19 +#define TEGRA_DC_EXT_FMT_YCbCr422P 20 +#define TEGRA_DC_EXT_FMT_YUV422P 21 +#define TEGRA_DC_EXT_FMT_YCbCr422R 22 +#define TEGRA_DC_EXT_FMT_YUV422R 23 +#define TEGRA_DC_EXT_FMT_YCbCr422RA 24 +#define TEGRA_DC_EXT_FMT_YUV422RA 25 + +#define TEGRA_DC_EXT_BLEND_NONE 0 +#define TEGRA_DC_EXT_BLEND_PREMULT 1 +#define TEGRA_DC_EXT_BLEND_COVERAGE 2 + +#define TEGRA_DC_EXT_FLIP_FLAG_INVERT_H (1 << 0) +#define TEGRA_DC_EXT_FLIP_FLAG_INVERT_V (1 << 1) +#define TEGRA_DC_EXT_FLIP_FLAG_TILED (1 << 2) + +struct tegra_dc_ext_flip_windowattr { + __s32 index; + __u32 buff_id; + __u32 blend; + __u32 offset; + __u32 offset_u; + __u32 offset_v; + __u32 stride; + __u32 stride_uv; + __u32 pixformat; + /* + * x, y, w, h are fixed-point: 20 bits of integer (MSB) and 12 bits of + * fractional (LSB) + */ + __u32 x; + __u32 y; + __u32 w; + __u32 h; + __u32 out_x; + __u32 out_y; + __u32 out_w; + __u32 out_h; + __u32 z; + __u32 swap_interval; + struct timespec timestamp; + __u32 pre_syncpt_id; + __u32 pre_syncpt_val; + /* These two are optional; if zero, U and V are taken from buff_id */ + __u32 buff_id_u; + __u32 buff_id_v; + __u32 flags; + /* Leave some wiggle room for future expansion */ + __u32 pad[5]; +}; + +#define TEGRA_DC_EXT_FLIP_N_WINDOWS 3 + +struct tegra_dc_ext_flip { + struct tegra_dc_ext_flip_windowattr win[TEGRA_DC_EXT_FLIP_N_WINDOWS]; + __u32 post_syncpt_id; + __u32 post_syncpt_val; +}; + +/* + * Cursor image format: + * - Tegra hardware supports two colors: foreground and background, specified + * by the client in RGB8. + * - The image should be specified as two 1bpp bitmaps immediately following + * each other in memory. Each pixel in the final cursor will be constructed + * from the bitmaps with the following logic: + * bitmap1 bitmap0 + * (mask) (color) + * 1 0 transparent + * 1 1 inverted + * 0 0 background color + * 0 1 foreground color + * - Exactly one of the SIZE flags must be specified. + */ +#define TEGRA_DC_EXT_CURSOR_IMAGE_FLAGS_SIZE_32x32 1 +#define TEGRA_DC_EXT_CURSOR_IMAGE_FLAGS_SIZE_64x64 2 +struct tegra_dc_ext_cursor_image { + struct { + __u8 r; + __u8 g; + __u8 b; + } foreground, background; + __u32 buff_id; + __u32 flags; +}; + +/* Possible flags for struct nvdc_cursor's flags field */ +#define TEGRA_DC_EXT_CURSOR_FLAGS_VISIBLE 1 + +struct tegra_dc_ext_cursor { + __s16 x; + __s16 y; + __u32 flags; +}; + +/* + * Color conversion is performed as follows: + * + * r = sat(kyrgb * sat(y + yof) + kur * u + kvr * v) + * g = sat(kyrgb * sat(y + yof) + kug * u + kvg * v) + * b = sat(kyrgb * sat(y + yof) + kub * u + kvb * v) + * + * Coefficients should be specified as fixed-point values; the exact format + * varies for each coefficient. + * The format for each coefficient is listed below with the syntax: + * - A "s." prefix means that the coefficient has a sign bit (twos complement). + * - The first number is the number of bits in the integer component (not + * including the optional sign bit). + * - The second number is the number of bits in the fractional component. + * + * All three fields should be tightly packed, justified to the LSB of the + * 16-bit value. For example, the "s.2.8" value should be packed as: + * (MSB) 5 bits of 0, 1 bit of sign, 2 bits of integer, 8 bits of frac (LSB) + */ +struct tegra_dc_ext_csc { + __u32 win_index; + __u16 yof; /* s.7.0 */ + __u16 kyrgb; /* 2.8 */ + __u16 kur; /* s.2.8 */ + __u16 kvr; /* s.2.8 */ + __u16 kug; /* s.1.8 */ + __u16 kvg; /* s.1.8 */ + __u16 kub; /* s.2.8 */ + __u16 kvb; /* s.2.8 */ +}; + +/* + * RGB Lookup table + * + * In true-color and YUV modes this is used for post-CSC RGB->RGB lookup, i.e. + * gamma-correction. In palette-indexed RGB modes, this table designates the + * mode's color palette. + * + * To convert 8-bit per channel RGB values to 16-bit, duplicate the 8 bits + * in low and high byte, e.g. r=r|(r<<8) + * + * To just update flags, set len to 0. + * + * Current Tegra DC hardware supports 8-bit per channel to 8-bit per channel, + * and each hardware window (overlay) uses its own lookup table. + * + */ +struct tegra_dc_ext_lut { + __u32 win_index; /* window index to set lut for */ + __u32 flags; /* Flag bitmask, see TEGRA_DC_EXT_LUT_FLAGS_* */ + __u32 start; /* start index to update lut from */ + __u32 len; /* number of valid lut entries */ + __u16 *r; /* array of 16-bit red values, 0 to reset */ + __u16 *g; /* array of 16-bit green values, 0 to reset */ + __u16 *b; /* array of 16-bit blue values, 0 to reset */ +}; + +/* tegra_dc_ext_lut.flags - override global fb device lookup table. + * Default behaviour is double-lookup. + */ +#define TEGRA_DC_EXT_LUT_FLAGS_FBOVERRIDE 0x01 + +#define TEGRA_DC_EXT_FLAGS_ENABLED 1 +struct tegra_dc_ext_status { + __u32 flags; + /* Leave some wiggle room for future expansion */ + __u32 pad[3]; +}; + +#define TEGRA_DC_EXT_SET_NVMAP_FD \ + _IOW('D', 0x00, __s32) + +#define TEGRA_DC_EXT_GET_WINDOW \ + _IOW('D', 0x01, __u32) +#define TEGRA_DC_EXT_PUT_WINDOW \ + _IOW('D', 0x02, __u32) + +#define TEGRA_DC_EXT_FLIP \ + _IOWR('D', 0x03, struct tegra_dc_ext_flip) + +#define TEGRA_DC_EXT_GET_CURSOR \ + _IO('D', 0x04) +#define TEGRA_DC_EXT_PUT_CURSOR \ + _IO('D', 0x05) +#define TEGRA_DC_EXT_SET_CURSOR_IMAGE \ + _IOW('D', 0x06, struct tegra_dc_ext_cursor_image) +#define TEGRA_DC_EXT_SET_CURSOR \ + _IOW('D', 0x07, struct tegra_dc_ext_cursor) + +#define TEGRA_DC_EXT_SET_CSC \ + _IOW('D', 0x08, struct tegra_dc_ext_csc) + +#define TEGRA_DC_EXT_GET_STATUS \ + _IOR('D', 0x09, struct tegra_dc_ext_status) + +/* + * Returns the auto-incrementing vblank syncpoint for the head associated with + * this device node + */ +#define TEGRA_DC_EXT_GET_VBLANK_SYNCPT \ + _IOR('D', 0x09, __u32) + +#define TEGRA_DC_EXT_SET_LUT \ + _IOW('D', 0x0A, struct tegra_dc_ext_lut) + +enum tegra_dc_ext_control_output_type { + TEGRA_DC_EXT_DSI, + TEGRA_DC_EXT_LVDS, + TEGRA_DC_EXT_VGA, + TEGRA_DC_EXT_HDMI, + TEGRA_DC_EXT_DVI, +}; + +/* + * Get the properties for a given output. + * + * handle (in): Which output to query + * type (out): Describes the type of the output + * connected (out): Non-zero iff the output is currently connected + * associated_head (out): The head number that the output is currently + * bound to. -1 iff the output is not associated with any head. + * head_mask (out): Bitmask of which heads the output may be bound to (some + * outputs are permanently bound to a single head). + */ +struct tegra_dc_ext_control_output_properties { + __u32 handle; + enum tegra_dc_ext_control_output_type type; + __u32 connected; + __s32 associated_head; + __u32 head_mask; +}; + +/* + * This allows userspace to query the raw EDID data for the specified output + * handle. + * + * Here, the size parameter is both an input and an output: + * 1. Userspace passes in the size of the buffer allocated for data. + * 2. If size is too small, the call fails with the error EFBIG; otherwise, the + * raw EDID data is written to the buffer pointed to by data. In both + * cases, size will be filled in with the size of the data. + */ +struct tegra_dc_ext_control_output_edid { + __u32 handle; + __u32 size; + void *data; +}; + +struct tegra_dc_ext_event { + __u32 type; + ssize_t data_size; + char data[0]; +}; + +#define TEGRA_DC_EXT_EVENT_HOTPLUG 0x1 +struct tegra_dc_ext_control_event_hotplug { + __u32 handle; +}; + +#define TEGRA_DC_EXT_CONTROL_GET_NUM_OUTPUTS \ + _IOR('C', 0x00, __u32) +#define TEGRA_DC_EXT_CONTROL_GET_OUTPUT_PROPERTIES \ + _IOWR('C', 0x01, struct tegra_dc_ext_control_output_properties) +#define TEGRA_DC_EXT_CONTROL_GET_OUTPUT_EDID \ + _IOWR('C', 0x02, struct tegra_dc_ext_control_output_edid) +#define TEGRA_DC_EXT_CONTROL_SET_EVENT_MASK \ + _IOW('C', 0x03, __u32) + +#endif /* __TEGRA_DC_EXT_H */ diff --git a/include/video/tegrafb.h b/include/video/tegrafb.h new file mode 100644 index 000000000000..919661b1a8e0 --- /dev/null +++ b/include/video/tegrafb.h @@ -0,0 +1,32 @@ +/* + * include/video/tegrafb.h + * + * Copyright (C) 2010 Google, Inc. + * Author: Erik Gilling <konkers@android.com> + * + * This software is licensed under the terms of the GNU General Public + * License version 2, as published by the Free Software Foundation, and + * may be copied, distributed, and modified under those terms. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + */ + +#ifndef _LINUX_TEGRAFB_H_ +#define _LINUX_TEGRAFB_H_ + +#include <linux/fb.h> +#include <linux/types.h> +#include <linux/ioctl.h> + +struct tegra_fb_modedb { + struct fb_var_screeninfo *modedb; + __u32 modedb_len; +}; + +#define FBIO_TEGRA_GET_MODEDB _IOWR('F', 0x42, struct tegra_fb_modedb) + +#endif |