diff options
Diffstat (limited to 'sound/soc/codecs/tlv320aic326x.h')
| -rw-r--r-- | sound/soc/codecs/tlv320aic326x.h | 35 |
1 files changed, 31 insertions, 4 deletions
diff --git a/sound/soc/codecs/tlv320aic326x.h b/sound/soc/codecs/tlv320aic326x.h index 259ecb110787..d81b34f8eb34 100644 --- a/sound/soc/codecs/tlv320aic326x.h +++ b/sound/soc/codecs/tlv320aic326x.h @@ -2,7 +2,7 @@ * linux/sound/soc/codecs/tlv320aic3262.h * * - * Copyright (C) 2011 Mistral Solutions Pvt Ltd. + * Copyright (C) 2012 Texas Instruments, Inc. * * This package is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License version 2 as @@ -13,7 +13,7 @@ * WARRANTIES OF MERCHANTIBILITY AND FITNESS FOR A PARTICULAR PURPOSE. * * History: - * Rev 0.1 ASoC driver support Mistral 20-01-2011 + * Rev 0.1 ASoC driver support 20-01-2011 * * The AIC3262 ASoC driver is ported for the codec AIC3262. * @@ -40,6 +40,10 @@ result some issue with cache. Common code doesnot support page, so fix that before commenting this line*/ #define LOCAL_REG_ACCESS 1 +/* Macro to enable the inclusion of tiload kernel driver */ +#define AIC3262_TiLoad + + /* Macro enables or disables support for miniDSP in the driver */ /* Enable the AIC3262_TiLoad macro first before enabling these macros */ #define CONFIG_MINI_DSP @@ -63,7 +67,7 @@ page, so fix that before commenting this line*/ #define AIC3262_MULTI_I2S 1 /* Driver Debug Messages Enabled */ -/*#define DEBUG*/ +//#define DEBUG #ifdef DEBUG #define DBG(x...) printk(x) @@ -115,6 +119,7 @@ page, so fix that before commenting this line*/ /* Total number of ASI Ports */ #define MAX_ASI_COUNT 3 + /* AIC3262 register space */ /* Updated from 256 to support Page 3 registers */ #define AIC3262_CACHEREGNUM 1024 @@ -246,7 +251,10 @@ page, so fix that before commenting this line*/ #define INT1_SEL_L (PAGE_1 + 34) #define RAMP_CNTL_R1 (PAGE_1 + 36) #define RAMP_CNTL_R2 (PAGE_1 + 37) -#define INT1_SEL_RM (PAGE_1 + 39) +//#define INT1_SEL_RM (PAGE_1 + 39) +#define IN1L_SEL_RM (PAGE_1 + 39) +#define IN1R_SEL_RM (PAGE_1 + 39) + #define REC_AMP_CNTL_R5 (PAGE_1 + 40) #define RAMPR_VOL (PAGE_1 + 41) #define RAMP_TIME_CNTL (PAGE_1 + 42) @@ -304,6 +312,7 @@ page, so fix that before commenting this line*/ #define ASI3_ADC_INPUT_CNTL (PAGE_4 + 39) #define ASI3_DAC_OUT_CNTL (PAGE_4 + 40) #define ASI3_BWCLK_CNTL_REG (PAGE_4 + 42) +#define ASI3_BCLK_N_CNTL (PAGE_4 + 43) #define ASI3_BCLK_N (PAGE_4 + 44) #define ASI3_WCLK_N (PAGE_4 + 45) #define ASI3_BWCLK_OUT_CNTL (PAGE_4 + 46) @@ -413,12 +422,21 @@ enum ASI_DAC_OUTPUT_OPTION { DAC_PATH_RIGHT, /* 02 DAC Datapath Right Data */ }; +#define AIC3262_READ_COMMAND_WORD(addr) ((1 << 15) | (addr << 5)) +#define AIC3262_WRITE_COMMAND_WORD(addr) ((0 << 15) | (addr << 5)) + /* Shift the above options by so many bits */ #define AIC3262_ASI_LDAC_PATH_SHIFT 6 #define AIC3262_ASI_LDAC_PATH_MASK (BIT5 | BIT4) #define AIC3262_ASI_RDAC_PATH_SHIFT 4 #define AIC3262_ASI_RDAC_PATH_MASK (BIT7 | BIT6) + +#define DAC_LR_MUTE_MASK 0xc +#define DAC_LR_MUTE 0xc +#define ENABLE_CLK_MASK 0x80 +#define ENABLE_CLK 0x80 + /* ASI specific ADC Input Control Options */ enum ASI_ADC_INPUT_OPTION { ADC_PATH_OFF = 0, /* 00 ASI Digital Output Disabled */ @@ -509,6 +527,7 @@ struct aic3262_asi_data { struct aic3262_priv { enum snd_soc_control_type control_type; struct aic326x_pdata *pdata; + struct snd_soc_codec codec; u32 sysclk; s32 master; u8 book_no; @@ -524,6 +543,14 @@ struct aic3262_priv { u8 dac_clkin_option; u8 adc_clkin_option; int irq; + u8 dac_reg; + u8 adc_gain; + u8 hpl; + u8 hpr; + u8 rec_amp; + u8 rampr; + u8 spk_amp; + struct spi_device *spi; struct snd_soc_jack *headset_jack; #if defined(LOCAL_REG_ACCESS) void *control_data; |