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This patch adds optional UHS support for the 8-bit MMC controller.
Please note that this requires V1.1A or later module hardware plus the
pull-up resistors on the data as well as the command signal lines of
your carrier board need to be removed (e.g. R46 to R54 on our Apalis
Evaluation Board V1.1A). If those pre-requisites are met support can be
enabled using the following kernel command line parameter:
mmc_uhs=1
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Certain low-speed USB devices were not detected correctly when plugged
into a running system.
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The pixel clock polarity setting was wrong: The kernel display flags
are rather somewhat confusing: The flags specify the edge where the
data should be driven by the controller (and hence not sampled by the
display!).
Please note that we don't change the default pixel clock polarity.
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Our move to modedb lead to the HDMI display controller always being
enabled (unless forced off by vidargs). This patch makes sure it gets
disabled upon boot disconnected as well as upon later disconnect.
Note: This also fixes DVFS on Colibri T30 in the sense that it will
again stay at 400 MHz EMC as long as no DVI-D aka HDMI display is
connected during boot.
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As stated by the eMMC 5.0 specification, a chip should not be rejected
only because of the revision stated in the EXT_CSD_REV field of the
EXT_CSD register.
Remove the control on this value, the control of the CSD_STRUCTURE field
should be sufficient to reject future incompatible changes.
Signed-off-by: Romain Izard <romain.izard.pro@gmail.com>
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
(cherry picked from commit 03a59437ef6b6ad7fb0165cb9b96c08d6bf057fc)
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With the new eMMC5.1 spec, there is a new EXT_CSD register with
the revision number(EXT_CSD_REV) 7. This patch updates the check
for ext-csd.rev number as 7.
Signed-off-by: Alim Akhtar <alim.akhtar@samsung.com>
Signed-off-by: Yuvaraj Kumar C D <yuvaraj.cd@samsung.com>
Reviewed-by: Doug Anderson <dianders@chromium.org>
Signed-off-by: Chris Ball <cjb@laptop.org>
(cherry picked from commit 6636bad839d9936e73e48c4841eda83a58fcdb53)
Conflicts:
drivers/mmc/core/mmc.c
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Both the Apalis EvalBoard as well as Ixora allow their LTC2954
pushbutton on/off controller to optionally initiate orderly shutdown
via GPIO interrupt on GPIO5 upon short power button press (short here
meaning really short unless C137 resp. C35 is assembled). For this to
work the following wiring is required:
Apalis EvalBoard V1.1a X61-4 to X2-6
Ixora V1.0a X5-4 to X27-17
For systemd/logind to actually use this as a power-switch a custom udev
rule /etc/udev/rules.d/70-power-switch-apalis_t30.rules as follows is
required:
# Specific rule for apalis_t30:
#
# Apalis T30's power button is not part of the kernel acpi subsystem.
# Let's manually add the power-switch tag to control its behaviour with
# systemd/logind
ACTION=="remove", GOTO="power_apalis_t30_end"
SUBSYSTEM=="input", KERNEL=="event1", TAG+="power-switch"
LABEL="power_apalis_t30_end"
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Both the Apalis EvalBoard as well as Ixora allow their LTC2954
pushbutton on/off controller to optionally be forced off by using a
GPIO. This patch implements this upon poweroff/shutdown using Apalis
GPIO6 which happens to be internally pulled-up upon power-on reset
(otherwise we would immediately get powered off again). For this to
work the following wiring is required:
Apalis EvalBoard V1.1a X2-A5 to X61-5
Ixora V1.0a X27-18 to X5-5
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The wake-up-key (formerly power-key) on MXM3 pin 37 aka WAKE1_MICO is
actually active-low due to the EvalBoard v1.1a having 4.7 K pull-up.
This patch fixes this.
While at it also get rid of the custom wakeup_key handling blindly
copied from T20 as non of the other T30 boards do this and it anyway
might only be required for LP0 which we anyway do not support so far.
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This commit, updates the driver to work faster with 32-Lead and 40-Lead
versions of adv7180 chip. Output pin VS/FIELD is now configured as
VSYNC.
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This patch fixes a clock related audio hub driver lock-up observed when
booting with mainline U-Boot which we are in the process of migrating
to now.
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Newer eMMC standards use CMD23 for multi-block transfer. These
command has the advantage that only one command is necessary, no
stop command after the transfer is required. The kernel already
supports this command, but we need to enable the capability on
the host level.
Tests verified that the MMC code detects that SD-card do not
support CMD23 and hence don't use that command.
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While in list_for_each_entry() of yaffs_flush_inodes, the fs code
can delete inodes. This leads to an endless loop which causes a
softlockup. Typically this happend in sync_supers when creating
and deleting files while under CPU load.
This fix checks whether we get twice the same inode. If this is
true, we just retry again.
This is an alternative fix to the proposed fix Jisheng Zhang:
yaffs: fix softlockup cauesed by inode deleted when scanning s_inodes list
http://www.aleph1.co.uk/lurker/message/20110831.075307.3cfeacdf.fr.html
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The fsync function in the fs.h header file in our kernel version has
two additional function introduced by this commit:
02c24a82187d5a628c68edfe71ae60dc135cd178
fs: push i_mutex and filemap_write_and_wait down into ->fsync() handlers
Update the function prototype for YAFFS2 too to avoid missinterpreted
datasync parameter and to avoid warnings.
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Since commit e5d80e82e32e (ASoC: sgtl5000: Convert to use regmap directly) a
kernel oops is observed after a suspend/resume sequence.
The kernel oops happens inside sgtl5000_restore_regs() as codec->reg_cache is no
longer a valid pointer.
Add the remaining register entries into sgtl5000_reg_defaults[] and remove
sgtl5000_restore_regs() completely, which allows suspend/resume to work fine and
make the code simpler.
Tested on a im53-qsb board.
Reported-by: Shawn Guo <shawn.guo@freescale.com>
Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
Tested-by: Shawn Guo <shawn.guo@freescale.com>
Signed-off-by: Mark Brown <broonie@linaro.org>
(cherry picked from commit 29aa37cddfb9b721013ff28608200d73a9426368)
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Powering down PLL before switching to a mode that does not use it
is a bad idea. It would cause the SGTL5000 be without internal
clock supply, especially on the I2C interface, which would make
subsequent access to it fail.
Thus, in case of not using PLL any longer, first set the mode
control, then power down PLL.
Signed-off-by: Oskar Schirmer <oskar@scara.com>
Signed-off-by: Mark Brown <broonie@linaro.org>
(cherry picked from commit e06e4c2d530fd4995c41083009647263ccd77d3b)
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The SGTL5000 Capture Attenuate Switch (or "ADC Volume Range Reduction"
as it is called in the manual) is single bit only.
Signed-off-by: Lothar Waßmann <LW@KARO-electronics.de>
Reviewed-by: Fabio Estevam <fabio.estevam@freescale.com>
Signed-off-by: Mark Brown <broonie@linaro.org>
(cherry picked from commit 65f2b226763bc348a9b9145aa5e17e7e3f6d8c35)
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When a sound capture/playback is terminated while a playback/capture
is running, power_vag_event() will clear SGTL5000_CHIP_ANA_POWER in
the SND_SOC_DAPM_PRE_PMD event, thus muting the respective other
channel.
Don't clear SGTL5000_CHIP_ANA_POWER when both DAC and ADC are active
to prevent this.
Signed-off-by: Lothar Waßmann <LW@KARO-electronics.de>
Reviewed-by: Fabio Estevam <fabio.estevam@freescale.com>
Signed-off-by: Mark Brown <broonie@linaro.org>
(cherry picked from commit f091f3f07328f75d20a2a5970d1f8b58d95fc990)
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According to the sgtl5000 reference manual, the default value of CHIP_SSS_CTRL
is 0x10.
Reported-by: Oskar Schirmer <oskar@scara.com>
Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
Signed-off-by: Mark Brown <broonie@linaro.org>
Cc: stable@vger.kernel.org
(cherry picked from commit 016fcab8ff46fca29375d484226ec91932aa4a07)
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The VAG_POWER must be enabled after all other bits in CHIP_ANA_POWER
and disabled before any other bit in CHIP_ANA_POWER. See the SGTL5000
datasheet (Table 31, BIT 7, page 42-43). Failing to follow this order
will result in ugly loud "POP" noise at the end of playback.
To achieve such order, use the _PRE and _POST DAPM widgets to trigger
the power_vag_event, where the event type check has to be fixed
accordingly as well.
Signed-off-by: Marek Vasut <marex@denx.de>
Signed-off-by: Mark Brown <broonie@linaro.org>
(cherry picked from commit dd4d2d6dfb49e8916064f2cb07f0ad7b32a82fb7)
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After a 'reboot' command in Linux or after pressing the system's reset button
the sgtl5000 driver fails to probe:
sgtl5000 0-000a: Device with ID register ffff is not a sgtl5000
sgtl5000 0-000a: ASoC: failed to probe CODEC -19
imx-sgtl5000 sound.12: ASoC: failed to instantiate card -19
imx-sgtl5000 sound.12: snd_soc_register_card failed (-19)
sgtl5000 codec does not have a reset line, nor a reset command in software, so
after a system reset the codec does not contain the default register values
from sgtl5000_reg_defaults[] anymore, as these are only valid after a
power-on-reset cycle.
Fix this issue by explicitly reading all the reset register values from
sgtl5000_reg_defaults[] and writing them back into sgtl5000 to ensure a sane
state.
Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
Tested-by: Eric Nelson <eric.nelson@boundarydevices.com>
Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
(cherry picked from commit af8ee11209e749c75eabf32b2a4ca631f396acf8)
Conflicts:
sound/soc/codecs/sgtl5000.c
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Do not disable and re-enable clocks after deasserting
PCIE, AFI and PCIEX resets. Deasserting the resets should
be followed by programming the PCIE.
Bug 1521306
Change-Id: Idc43bc9b21cac3818852ed059fe512f4cd75b748
Signed-off-by: Shreshtha SAHU <ssahu@nvidia.com>
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Signed-off-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
Signed-off-by: Mauro Carvalho Chehab <mchehab@redhat.com>
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The whole rounding stuff really depends on a specific resolution.
This reverts commit 4dd83942b418b937e3da02746baabf63f37fe682.
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Force round down in division calculating required logo height as
preceding code did round up as follows:
logo_lines = DIV_ROUND_UP(logo_height, vc->vc_font.height);
Which resulted in no boot-logo shown at all due to not enough lines
being available.
Additionally disable cursor for custom boot logo.
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Using this unconditionally cuts the birds feet (;-p).
This reverts commit 491f263ebfb338c59abfbde6d4e0e7256a0150fa.
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Commit 455bd4c430b0 ("ARM: 7668/1: fix memset-related crashes caused by
recent GCC (4.7.2) optimizations") attempted to fix a compliance issue
with the memset return value. However the memset itself became broken
by that patch for misaligned pointers.
This fixes the above by branching over the entry code from the
misaligned fixup code to avoid reloading the original pointer.
Also, because the function entry alignment is wrong in the Thumb mode
compilation, that fixup code is moved to the end.
While at it, the entry instructions are slightly reworked to help dual
issue pipelines.
Signed-off-by: Nicolas Pitre <nico@linaro.org>
Tested-by: Alexander Holler <holler@ahsoftware.de>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
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optimizations
Recent GCC versions (e.g. GCC-4.7.2) perform optimizations based on
assumptions about the implementation of memset and similar functions.
The current ARM optimized memset code does not return the value of
its first argument, as is usually expected from standard implementations.
For instance in the following function:
void debug_mutex_lock_common(struct mutex *lock, struct mutex_waiter *waiter)
{
memset(waiter, MUTEX_DEBUG_INIT, sizeof(*waiter));
waiter->magic = waiter;
INIT_LIST_HEAD(&waiter->list);
}
compiled as:
800554d0 <debug_mutex_lock_common>:
800554d0: e92d4008 push {r3, lr}
800554d4: e1a00001 mov r0, r1
800554d8: e3a02010 mov r2, #16 ; 0x10
800554dc: e3a01011 mov r1, #17 ; 0x11
800554e0: eb04426e bl 80165ea0 <memset>
800554e4: e1a03000 mov r3, r0
800554e8: e583000c str r0, [r3, #12]
800554ec: e5830000 str r0, [r3]
800554f0: e5830004 str r0, [r3, #4]
800554f4: e8bd8008 pop {r3, pc}
GCC assumes memset returns the value of pointer 'waiter' in register r0; causing
register/memory corruptions.
This patch fixes the return value of the assembly version of memset.
It adds a 'mov' instruction and merges an additional load+store into
existing load/store instructions.
For ease of review, here is a breakdown of the patch into 4 simple steps:
Step 1
======
Perform the following substitutions:
ip -> r8, then
r0 -> ip,
and insert 'mov ip, r0' as the first statement of the function.
At this point, we have a memset() implementation returning the proper result,
but corrupting r8 on some paths (the ones that were using ip).
Step 2
======
Make sure r8 is saved and restored when (! CALGN(1)+0) == 1:
save r8:
- str lr, [sp, #-4]!
+ stmfd sp!, {r8, lr}
and restore r8 on both exit paths:
- ldmeqfd sp!, {pc} @ Now <64 bytes to go.
+ ldmeqfd sp!, {r8, pc} @ Now <64 bytes to go.
(...)
tst r2, #16
stmneia ip!, {r1, r3, r8, lr}
- ldr lr, [sp], #4
+ ldmfd sp!, {r8, lr}
Step 3
======
Make sure r8 is saved and restored when (! CALGN(1)+0) == 0:
save r8:
- stmfd sp!, {r4-r7, lr}
+ stmfd sp!, {r4-r8, lr}
and restore r8 on both exit paths:
bgt 3b
- ldmeqfd sp!, {r4-r7, pc}
+ ldmeqfd sp!, {r4-r8, pc}
(...)
tst r2, #16
stmneia ip!, {r4-r7}
- ldmfd sp!, {r4-r7, lr}
+ ldmfd sp!, {r4-r8, lr}
Step 4
======
Rewrite register list "r4-r7, r8" as "r4-r8".
Signed-off-by: Ivan Djelic <ivan.djelic@parrot.com>
Reviewed-by: Nicolas Pitre <nico@linaro.org>
Signed-off-by: Dirk Behme <dirk.behme@gmail.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
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Enable VLAN networking functionality.
While at it also enable some more kernel modules for Apalis T30 PCIe
based devices like the Intel E1000E NICs, Intel IWLAGN Wi-Fi cards,
PCIe serial cards and XHCI based USB 3.0 controllers.
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This reverts commit f162e88fc6aac0fef03c49c1ac596995a03ff134.
Somehow NVIDIA's media player does not like it to be fixed as
it starts stuttering like crazy at times.
Still keep the dangerous time out handling clean-up.
While at it get rid of the excessive dev_info() logging as well.
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These 2 syncronize_rcu()s make attaching a task to a cgroup
quite slow, and it can't be ignored in some situations.
A real case from Colin Cross: Android uses cgroups heavily to
manage thread priorities, putting threads in a background group
with reduced cpu.shares when they are not visible to the user,
and in a foreground group when they are. Some RPCs from foreground
threads to background threads will temporarily move the background
thread into the foreground group for the duration of the RPC.
This results in many calls to cgroup_attach_task.
In cgroup_attach_task() it's task->cgroups that is protected by RCU,
and put_css_set() calls kfree_rcu() to free it.
If we remove this synchronize_rcu(), there can be threads in RCU-read
sections accessing their old cgroup via current->cgroups with
concurrent rmdir operation, but this is safe.
# time for ((i=0; i<50; i++)) { echo $$ > /mnt/sub/tasks; echo $$ > /mnt/tasks; }
real 0m2.524s
user 0m0.008s
sys 0m0.004s
With this patch:
real 0m0.004s
user 0m0.004s
sys 0m0.000s
tj: These synchronize_rcu()s are utterly confused. synchornize_rcu()
necessarily has to come between two operations to guarantee that
the changes made by the former operation are visible to all rcu
readers before proceeding to the latter operation. Here,
synchornize_rcu() are at the end of attach operations with nothing
beyond it. Its only effect would be delaying completion of
write(2) to sysfs tasks/procs files until all rcu readers see the
change, which doesn't mean anything.
Signed-off-by: Li Zefan <lizefan@huawei.com>
Signed-off-by: Tejun Heo <tj@kernel.org>
Reported-by: Colin Cross <ccross@google.com>
Conflicts:
kernel/cgroup.c
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Use HDA HDMI audio now on Colibri T30 as well allowing for up to 7.1
multi-channel playback. Split board sound initialisation between Apalis
and Colibri T30 in order to distinguish better between default SPDIF
being supported out-of-the-box on Apalis vs. this being an optional
feature for the Colibri. Therefore remove SPDIF for the Colibri T30.
While at it add csus clock required for vi_sensor camera master clock
on Apalis T30 and clk_out_2/extern2 for Colibri T30, fix debug UART1
initialisation, get rid of spurious CONFIG_SND_USB enable and further
clean-up both board platform data files.
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Hack HDA driver to make it the 2nd rather than the first sound card as
the first one should be the SGTL5000 which is always present on our T30
modules. Especially on Ixora where there is no HDA codec on the carrier
board HDA being the first sound card does not make much sense even more
though as there was no primary device (e.g. device=hw:0,0).
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Enable CONFIG_FHANDLE required for systemd >= 209 according to
lists.freedesktop.org/archives/systemd-devel/2014-February/017362.html
While at it put them all 3 on par concerning ARM Errata configuration.
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Fix issue with slow SPDIF clock by just doubling desired rate prior to
doing any further calculations on it.
BTW: A proper fix might involve overall clock doubler configuration.
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Fix (Colibri) resp. introduce (Apalis) SPI device controller data to
properly use HW based chip select with one clock of setup and hold time
each for both MCP2515 CAN controller(s) as well as spidev.
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This works around a issue we see when using eMMC 4.5 on tegra
SDHCI host controller.
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The 1.8V quirk also affected the internal eMMC which disabled newer
modes such as SDR50, SDR104 and DDR50. This in turn lead to an
out of spec usage since the clock was still 50MHz.
By creating a no_1v8 field in the platform data we can now enable
this work around on a per-instance basis. Hence we enable the
quirk only on the controllers which are connected to the external
SD-slots.
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PCIe Reset line must be asserted for at least 100us after clock is enabled.
PEX 2 Controller Register fix, offsets are not at constant intervals.
Bug 1521306
Reviewed-on: http://git-master/r/225399
(cherry picked from commit df0760bf515236bed2e87e590509642ab72a01b5)
Change-Id: I7b44ea51e7e02f2bca93cfc75ed85e01ab91fe03
Signed-off-by: Shreshtha Sahu <ssahu@nvidia.com>
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Force round down in division calculating required logo height as
preceding code did round up as follows:
logo_lines = DIV_ROUND_UP(logo_height, vc->vc_font.height);
Which resulted in no boot-logo shown at all due to not enough lines
being available.
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The AC97 sampling rate is really fixed to 48 kHz at all times.
While at it clean-up dangerous time out handling.
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This commit resolves an issue of non-working vi camera driver
on Colibri T20 occured after a l4t-r16-r4 merge.
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Add SPI controller platform data required for use of hardware chip
selects.
While at it pull-up SPI chip select pin due to NVIDIA's designers
taking the term chip select a little too personal: they indeed only
select a chip otherwise all the chip select pins are just left
floating!
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The MCP2515 on the Colibri EvalBoard V3.1a actually uses regular system
reset aka RESET_OUT# on SODIMM 87 to reset the MCP2515.
Therefore clean-up resp. remove any MECS Tellurium legacy in that
respect.
While at it adjust copyright year, re-order some include, clean-up some
struct spacing, re-order clocks and improve some comments.
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Don't initialize the whole display controller (dc) when framebuffer
mode is set to off.
This avoids creation of the /dev/tegra_dc_x device. The tegra X
driver requires for each tegra_dc_x device an framebuffer device
with the same id. This patch avoids creation of both, which makes
the tegra X driver load correctly.
Note: Turning off tegrafb0 still leads to kernel crash due to
hard coded device enumeration.
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