Age | Commit message (Collapse) | Author |
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1. Blank BG during video play on FG:
./mxc_v4l2_output.out -iw 320 -ih 240 -ow 1024 -oh 768 -d 3 qvga.yuv
echo 1 > /sys/class/graphics/fb0/blank
echo 0 > /sys/class/graphics/fb0/blank
2. The same input and output (ic_bypass):
./mxc_v4l2_output.out -iw 320 -ih 240 -ow 320 -oh 240 -d 3 qvga.yuv
echo 1 > /sys/class/graphics/fb0/blank
echo 0 > /sys/class/graphics/fb0/blank
Signed-off-by: Jason Chen <b02280@freescale.com>
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To use manually buffer select instead of channel link, which resolve fb
blank during v4l2 running issue.
Signed-off-by: Jason Chen <b02280@freescale.com>
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[imx23] Addition of FIQ system for chip errata and bo's
Signed-off-by: Robert Lee <robert.lee@freescale.com>
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[imx23] Addition of FIQ system for chip errata and bo's
Signed-off-by: Robert Lee <robert.lee@freescale.com>
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Increase VPU IRAM size to support decoder
Signed-off-by: Sammy He <r62914@freescale.com>
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mx51: add mem resources in platform device for gpu2d and gpu3d registers.
Signed-off-by: Wu Guoxing <b02248@freescale.com>
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UBO and VBO are 22-bit in CPMEM. When processing a high resolution
frame in YUV format, the value of UV-offset may overflow, but the
driver keeps silent.
Signed-off-by: Liu Ying <b17645@freescale.com>
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FEC driver of 2.6.31 kernel remove pin iomux config and PHY reset,
which is in fec_gpio_active() needed for i.MX25 and i.MX35.
Signed-off-by: Li Jun <r65092@freescale.com>
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Use DP to do CSC for preview on DPFG instead of using IC channel
so that we can get better performance. This change can make us
get rid of IC channel bandwidth limitation when using IC channel
to do upsizing from low resolution to high resolution and CSC.
This change doesn't touch V4L2 overlay for DPBG, because using DP
to do CSC will change the pixel format for DPBG(usually for GUI).
This change doesn't touch V4L2 capture, because users rarely do
upsizing with high multiple in this case.
Signed-off-by: Liu Ying <b17645@freescale.com>
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Support YUYV and UYVY input pixel format for mxc V4L2 output.
Signed-off-by: Liu Ying <b17645@freescale.com>
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u-boot set wrong standby contorl for regulators,
while kernel doesn't set standby controls which
cuase system can't wakeup from suspend mode.
Signed-off-by: Wallace Wang <r59996@freescale.com>
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Added the polled read and write functions for the debug UART port.
Signed-off-by: Patrick Turley <patrick.turley@freescale.com>
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The UV offset is set wrongly when idmac does cropping.
This patch changes to get the UV offset from user in this case now.
Signed-off-by: Liu Ying <b17645@freescale.com>
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Uniform handling NFC INT bit clearance, the INT bit
will be unformed cleared in the wait_op_done function
after any NFC operation.
Signed-off-by:Jason Liu <r64343@freescale.com>
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use level irq for pmic event handling to avoid
potential pmic event lost
Signed-off-by: Zhou Jingyu <Jingyu.Zhou@freescale.com>
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when Cropping happen, for display 5(tvout), fb setting still need keep
as org.
Signed-off-by: Jason Chen <b02280@freescale.com>
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fix the bug that causes the driver to enable the lcd controller twice,
which will request lcd pins twice.
Signed-off-by: Robby Cai <R63905@freescale.com>
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Some kernel resource can be accessed in interrupt handler and user
controlled V4L2 ioctrls, so there is a race condition which makes
the kernel malfunction potentially.
Signed-off-by: Liu Ying <b17645@freescale.com>
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dmfc setting should be restored after system resume.
Signed-off-by: Jason Chen <b02280@freescale.com>
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fix can not goto standby when using ethernet
Signed-off-by: Zhou Jingyu <Jingyu.Zhou@freescale.com>
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Reserve 3M for bootloader since new nand block size is 512K byte.
Signed-off-by: Wallace Wang <r59996@freescale.com>
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Reserve more size to bootloader since new nand block size is 512K byte.
Signed-off-by: Sammy He <r62914@freescale.com>
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Update NFC INT wait timeout value to 1s.
1s should be enough for all platforms.
If INT bit not set for 1s timeout value, this
should be high potential of IC issues.
Signed-off-by:Jason Liu <r64343@freescale.com>
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Miss clear BYPASS_CPU bit for CLKSEQ. CPU and HClk frequency will low than
24Mhz, so there are not enough bandwidth to support LCD refresh
Signed-off-by: Frank Li <Frank.Li@freescale.com>
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Do not disable the eSDHC clk on MX35 3DS board,
since SYSTEM can't boot up after the reset key
is pressed when the SD/MMC boot mode is used.
The root cause is that the ROM code don't ensure
the SD/MMC clk is running when boot system.
Signed-off-by: Richard Zhu <r65037@freescale.com>
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Modify MXCFB_SET_LOC_ALPHA ioctrl to support DP local alpha with
alpha value contained in pixel.
Signed-off-by: Liu Ying <b17645@freescale.com>
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if unblank to blank tve fb too quickly, system will hang. It's caused by
unprotected tve register access.
Signed-off-by: Jason Chen <b02280@freescale.com>
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Support NV12 output pixel format for still capture.
Signed-off-by: Liu Ying <b17645@freescale.com>
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Resolve the line-in record problem.
Signed-off-by: Lionel Xu <r63889@freescale.com>
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1.arrange display port according to choice of different display device
2.for ipu_disp.c: not round pixel clock to even for tvout.
3.cmdline "hdtv" enable 720P, "hdtv=2" enable 720P as primary.
Signed-off-by: Jason Chen <b02280@freescale.com>
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To support 720p output for ipu lib.
Signed-off-by: Jason Chen <b02280@freescale.com>
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Improved the GPMI driver's use of information from the device identification
database.
Signed-off-by: Patrick Turley <patrick.turley@freescale.com>
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add dmfc size control for dynamic change and _setup.
DMFC_NORMAL: segment 0,1 for DC, 4,5 for DP-BG, 6,7 for DP-FG.
DMFC_HIGH_RESOLUTION_DC: segment 0~3 for DC, 4,5 for DP-BG, 6,7 for DP-FG.
DMFC_HIGH_RESOLUTION_DP: segment 0,1 for DC, 2~5 for DP-BG, 6,7 for DP-FG.
DMFC_HIGH_RESOLUTION_ONLY_DP: segment 0~3 for DP-BG, 4~7 for DP-FG.
IPU diplay driver will try to enlarge its related DMFC segment size
when it meet high resolution condition, but if dmfc is already in high
resolution setting, dmfc will not change.That said, first request wins.
For cmdline setting, "dmfc=1" is DMFC_HIGH_RESOLUTION_DC, "dmfc=2"
is DMFC_HIGH_RESOLUTION_DP, "dmfc=3" is
DMFC_HIGH_RESOLUTION_ONLY_DP.
NOTE: DMFC_HIGH_RESOLUTION_ONLY_DP only can be set by cmdline.
Signed-off-by: Jason Chen <b02280@freescale.com>
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Setting "video=mxcfb:800x600-16@60" in the exec command makes video not play
correctly, IPU didn't play video when panel blank line where lower then minimum
required by IPU
Signed-off-by: Ran Ferderber r53561@freescale.com
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1.GPMI NAND flash scan scheme can overcome the shortcomings
of MTD NAND community code.
2.Put it to the common NAND directory can benifit I.MX NAND
driver besides GPMI NAND driver.
3.Fix the section mismatch build warnings on ALL platforms.
4.Fix the kbuild build errors of I.MX platforms.
Signed-off-by:Jason Liu <r64343@freescale.com>
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fixed by setting AUTO_RESTART bit in HW_RTC_PERSISTENT0 register.
Signed-off-by: Robby Cai <R63905@freescale.com>
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Disable lcdif controller when suspend or screen blanked.
By doing so, can set CPU freq to 64000Khz (ENGR00119096)
Signed-off-by: Robby Cai <R63905@freescale.com>
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USB initialization set power status register to wrong status.
Cause power state change dead loop.
Remove EA code using debug register to control HW_POWER_STS bit.
That is not perfered.
Signed-off-by: Frank Li <Frank.Li@freescale.com>
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Change -march=armv7-a to -march=armv7a
Revert "ENGR00116759 iMX51: Fix compile error when using gcc4.3.3"
This reverts commit 39b2ec2cfc591472db51c75944d8462255e9cf4d.
Signed-off-by: Alan Tull <r80115@freescale.com>
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pll_set_rate function should only wait for PLL relock if PLL is enabled.
Also add a timeout to the infinte loop.
Signed-off-by: Ranjani Vaidyanathan-RA5478 <Ranjani.Vaidyanathan@freescale.com>
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1. Add wait timeout support to void dead loop in NAND driver,
2. Try best to use IRQ mode instead of POLLING mode
Signed-off-by:Jason Liu <r64343@freescale.com>
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Use fbi screen_base as virtual addr instead of phys_to_virtual.
Signed-off-by: Jason Chen <b02280@freescale.com>
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Fix SATA drive failure on Ubuntu 9.10
BugLink: https://bugs.launchpad.net/bugs/431963
Signed-off-by: Dinh Nguyen <r00091@freescale.com>
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MX23: Correct VDDD value for CPU frequency 360 MHz.
Signed-off-by: Nancy Chen <Nancy.Chen@freescale.com>
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DVFS-PER needs to make sure that the pixel clock divider is an
even integer.
Added support for pixel clock being sourced from an external clock (PLL3)
Signed-off-by: Ranjani Vaidyanathan-RA5478 <Ranjani.Vaidyanathan@freescale.com>
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Added clock nodes for pixel clocks so that their rates and
parents can be easily tracked.
Signed-off-by: Rob Herring <r.herring@freescale.com>
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Write bootstream to kernel by kobs with BCH ECC.
Using the same combined Metadata & Block 0 BCH layout
with ROM code.
Page size 2048B; spare area 64B => ECC8, N=3, B0=512B, M=10B
Page size 4096B; spare area 128B => ECC8, N=7, B0=512B, M=10B
Page size 4096B; spare area 218B => ECC16, N=7, B0=512B, M=10B
Signed-off-by:Jason Liu <r64343@freescale.com>
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use PXP_NEXT register to implement double buffering schema.
Signed-off-by: Robby Cai <R63905@freescale.com>
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When bluetooth handsfree is enabled, sgtl5000 and bt
sound cards are both opened. BT sound card playback
can't use IRAM as sgtl5000 has used IRAM. The bt audio
platform data - ext_ram is not set when kernel porting
to 2.6.31.
Signed-off-by: Wallace Wang <r59996@freescale.com>
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enable wake up from USB 5V
Signed-off-by: Zhou Jingyu <Jingyu.Zhou@freescale.com>
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