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update the TIAIC326x driver for voice call
Change-Id: I1443b462b5b7e049fe4cbf39215aea6eeb955500
Reviewed-on: http://git-master/r/88012
Tested-by: Nikesh Oswal <noswal@nvidia.com>
Reviewed-by: Scott Peterson <speterson@nvidia.com>
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After flight mode on/off, EHCI phy power and modem power on sequences
not correct. For first enumeration HSIC phy should be power and then
modem needs to be powered before sending any hub events. Also
corrected initial state for ipc_ap_wake_state.
Bug 946027
Change-Id: I84edbebaa408fd6830adc09ebd0c67cb288a2626
Signed-off-by: Seshendra Gadagottu <sgadagottu@nvidia.com>
Reviewed-on: http://git-master/r/86297
(cherry picked from commit 700c7bc52b26b370ff2449a9a9f91b22188a9aee)
Reviewed-on: http://git-master/r/88008
Reviewed-by: Simone Willett <swillett@nvidia.com>
Tested-by: Simone Willett <swillett@nvidia.com>
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Remove unnecessary 100ms delay for primary panel since
this is needed for HDMI type only.
Bug 940012
Change-Id: Id27966fb28faa73ade3a868a9f89cadbde76e227
Signed-off-by: Min-wuk Lee <mlee@nvidia.com>
Reviewed-on: http://git-master/r/87613
Reviewed-by: Simone Willett <swillett@nvidia.com>
Tested-by: Simone Willett <swillett@nvidia.com>
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Can't use NR_CPUS on non-SMP systems. Just use the maximum.
Change-Id: I00b455adf950869146dfcd176efe4abdbe7aa24e
Signed-off-by: Scott Williams <scwilliams@nvidia.com>
Reviewed-on: http://git-master/r/87416
Reviewed-by: Aleksandr Frid <afrid@nvidia.com>
Reviewed-by: Varun Wadekar <vwadekar@nvidia.com>
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The returned capabilities bitfield is initially 0 (no caps).
bug 942631
Change-Id: Ia7496981e525526147ecebe67b09dc877d3e0c17
Reviewed-on: http://git-master/r/87088
Tested-by: Adam Cheney <acheney@nvidia.com>
Reviewed-by: Robert Morell <rmorell@nvidia.com>
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Change-Id: I8a5329284008c03705273dfa49042fc0e07b4b3d
Signed-off-by: Mark Stadler <mastadler@nvidia.com>
Reviewed-on: http://git-master/r/87068
Reviewed-by: Simone Willett <swillett@nvidia.com>
Tested-by: Simone Willett <swillett@nvidia.com>
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emc was not inited for kai in main.
Change-Id: I0562ff8fffdc8a9aa8622925aa18d0d4cedb5567
Signed-off-by: Kerwin Wan <kerwinw@nvidia.com>
Reviewed-on: http://git-master/r/86738
Reviewed-by: Simone Willett <swillett@nvidia.com>
Tested-by: Simone Willett <swillett@nvidia.com>
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Add lock to prevent race condition between cancellation of old delayed
work and schedule of new delayed work.
Bug 936337
Change-Id: I52df82e92279163841546127c72be9879ef810d0
Signed-off-by: Kevin Huang <kevinh@nvidia.com>
Reviewed-on: http://git-master/r/86730
Reviewed-by: Simone Willett <swillett@nvidia.com>
Tested-by: Simone Willett <swillett@nvidia.com>
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emc registry entries @ 12.75 MHz for kai
Change-Id: Id68a6368d8f41d537eb52ca3ac8e9b816ee4015f
Signed-off-by: Kerwin Wan <kerwinw@nvidia.com>
Reviewed-on: http://git-master/r/86698
Reviewed-by: Prashant Gaikwad <pgaikwad@nvidia.com>
Reviewed-by: Dan Willemsen <dwillemsen@nvidia.com>
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On secondary CPUs, the Timer Control Register is not reset
to a sane value before the timer is registered, and the TRM
doesn't seem to indicate any reset value either. In some cases,
the kernel will take an interrupt too early, depending on what
junk was present in the registers at reset time.
The fix is to set the Timer Control Register to 0 before
registering the clock_event_device and enabling the interrupt.
Problem seen on VE (Cortex A5) and Tegra.
Signed-off-by: Marc Zyngier <(address hidden)>
Change-Id: I52695f4f9a5c5e3a8973da7668b3b1352e60a80f
Reviewed-on: http://git-master/r/83085
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Prashant Gaikwad <pgaikwad@nvidia.com>
Reviewed-by: Aleksandr Frid <afrid@nvidia.com>
Tested-by: Prashant Gaikwad <pgaikwad@nvidia.com>
Reviewed-by: Scott Williams <scwilliams@nvidia.com>
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Bug 924470
Change-Id: I55310652512bf87ab5fc83479a18a4c685958884
Signed-off-by: Pritesh Raithatha <praithatha@nvidia.com>
Reviewed-on: http://git-master/r/88327
Reviewed-by: Varun Wadekar <vwadekar@nvidia.com>
Reviewed-by: Sachin Nikam <snikam@nvidia.com>
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1) configure pinmux
2) create pn544_i2c_platform_data
3) register i2c device info using i2c_register_board_info
Bug 949128
Change-Id: I62c82d338724c4f012ac98d7ec61ec9aae1afae5
Signed-off-by: Rakesh Goyal <rgoyal@nvidia.com>
Reviewed-on: http://git-master/r/88288
Reviewed-by: Simone Willett <swillett@nvidia.com>
Tested-by: Simone Willett <swillett@nvidia.com>
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Adding support for the open source gpio on which client
can specify the open source property through GPIO flag
GPIOF_OPEN_SOURCE at the time of gpio request.
The open source pins are normally pulled low and it
cannot be driven to output with value of 0 and so
when client request for setting the pin to LOW, the
gpio will be set to input direction to make pin in tristate
and hence PULL-DOWN on pins will make the state to LOW.
The open source pin can be driven to HIGH by setting output
with value of 1.
Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
Reviwed-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
Acked-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
cherry-picked from mainline commit
25553ff0756c59b617af6bdd280c94e943164184
Change-Id: I3062a5dec7bf745b624d9a147f79d3830927325b
Reviewed-on: http://git-master/r/88265
Reviewed-by: Laxman Dewangan <ldewangan@nvidia.com>
Tested-by: Laxman Dewangan <ldewangan@nvidia.com>
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Adding support for the open drain gpio on which client
can specify the open drain property through GPIO flag
GPIOF_OPEN_DRAIN at the time of gpio request.
The open drain pins are normally pulled high and it
cannot be driven to output with value of 1 and so
when client request for setting the pin to HIGH, the
gpio will be set to input direction to make pin in tristate
and hence PULL-UP on pins will make the state to HIGH.
The open drain pin can be driven to LOW by setting output
with value of 0.
Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
Reviwed-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
Acked-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
Cherry-picked from mainline
aca5ce14eb773a75e5d935968b2e390dc5bd29c3
Change-Id: I097caebcc7cf6fb1497bb0395320dfc061bb6277
Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
Reviewed-on: http://git-master/r/88264
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nvhost_job uses kzalloc to hold meta data. Convert
it to vzalloc to avoid large physically contiguous
allocations at runtime.
Change-Id: I13d7e7d60e93354fcf69e5478437fa206b880dcc
Signed-off-by: Donghan Ryu <dryu@nvidia.com>
Reviewed-on: http://git-master/r/87967
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>
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Implement the complete debug arch v7 save/restore sequence
as required by the ARM Architectural Reference Manual.
Change-Id: Ia346a87b16e759ae5dbbbd02e77eda1e6d6deb82
Signed-off-by: Scott Williams <scwilliams@nvidia.com>
Reviewed-on: http://git-master/r/87865
Reviewed-by: Aleksandr Frid <afrid@nvidia.com>
Reviewed-by: Varun Wadekar <vwadekar@nvidia.com>
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Power gating timeout for 3D is too short, and causes oscillation
in non-idle use cases. Increase timeout to 250ms to get more benefits
from power gating.
Bug 914785
Change-Id: I4e37fda260ceecc2fe3e21989789105b7c8fcf36
Reviewed-on: http://git-master/r/87659
Tested-by: Terje Bergstrom <tbergstrom@nvidia.com>
Reviewed-by: Mayuresh Kulkarni <mkulkarni@nvidia.com>
Reviewed-by: Ilan Aelion <iaelion@nvidia.com>
Reviewed-by: Graziano Misuraca <gmisuraca@nvidia.com>
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
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- nvhost_get_host returns host1x's master driver's
private data
- this host1x master is parent for all its modules.
however, it does not have a parent of its own
- so the debug_not_idle causes crash when there is an
outstanding reference count on host1x by some module
during suspend sequence
- with this change, debug_not_idle returns error to
pm core if host1x has an outstanding ref count. pm core
then safely aborts the suspend and does resume
Bug 947617
Change-Id: Ia2479c192bdd94028d090168f689823658062fd4
Signed-off-by: Mayuresh Kulkarni <mkulkarni@nvidia.com>
Reviewed-on: http://git-master/r/87658
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
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There is no need to flush the complete L2 upon LP2
entry but it is necessary to clean the page table
entries needed by LP2 code sequence that has L2 off
and MMU on.
Bug 931316
Change-Id: Ice353f16d35ee24d4387e7b9b135f205c4d0ba32
Signed-off-by: Antti P Miettinen <amiettinen@nvidia.com>
Reviewed-on: http://git-master/r/86293
Reviewed-by: Simone Willett <swillett@nvidia.com>
Tested-by: Simone Willett <swillett@nvidia.com>
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This commit fix two issues.
1. MMIO space should be reserved for T30 as well
2. There is a bug in link reset sequence causing
problem in detecting the other slot as well
on T20
bug 826956
bug 637871
Reviewed-on: http://git-master/r/66814
(cherry picked from commit 11ce98902d0687646eb30a4bd1f9a1d5e8da34ce)
Change-Id: I1843e3a1d897a36768b05b33ab7624889191d011
Signed-off-by: Manoj Chourasia <mchourasia@nvidia.com>
Reviewed-on: http://git-master/r/86134
Reviewed-by: Simone Willett <swillett@nvidia.com>
Tested-by: Simone Willett <swillett@nvidia.com>
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Fix "Error: .size expression does not evaluate to a constant" with
binutils since version >= 2.21 due to wrong naming of the label
reference.
Signed-off-by: Marc Dietrich <marvin24@gmx.de>
Signed-off-by: Stephen Warren <swarren@wwwdotorg.org>
Change-Id: I3d09c423f993aa5ec8cdf166199774a7a1b18396
Reviewed-on: http://git-master/r/88102
Reviewed-by: Scott Williams <scwilliams@nvidia.com>
Reviewed-by: Stephen Warren <swarren@nvidia.com>
Tested-by: Stephen Warren <swarren@nvidia.com>
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Should have been "GPL v2", not "GPLv2".
Signed-off-by: Marc Dietrich <marvin24@gmx.de>
Signed-off-by: Stephen Warren <swarren@wwwdotorg.org>
Change-Id: I7b4669c023c48e1080de7f87ed7166dc9b47884a
Reviewed-on: http://git-master/r/88101
Reviewed-by: Scott Williams <scwilliams@nvidia.com>
Reviewed-by: Stephen Warren <swarren@nvidia.com>
Tested-by: Stephen Warren <swarren@nvidia.com>
Reviewed-by: Varun Wadekar <vwadekar@nvidia.com>
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Addition of OTG support in smb349 charger driver
Change-Id: Ib38c9f4c06285ae07d93cfa3c6f5e1637aaa9460
Signed-off-by: Syed Rafiuddin <srafiuddin@nvidia.com>
Reviewed-on: http://git-master/r/86936
Reviewed-by: Sachin Nikam <snikam@nvidia.com>
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In st_send_frame, do not free skb when recveive[hci_recv_frame] function call
returns failure. Since, skb is already freed in hci_recv_frame on failure.
Bug 946756
Bug 949028
Change-Id: I3ef9a77f408a6a5329a0817547e0c0e08ec45f87
Signed-off-by: Nagarjuna Kristam <nkristam@nvidia.com>
Reviewed-on: http://git-master/r/87138
Reviewed-by: Rakesh Kumar <krakesh@nvidia.com>
Reviewed-by: Sachin Nikam <snikam@nvidia.com>
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since irq function has printk and long context.
change the handler to irq thread for stable running.
Bug 937413
Signed-off-by: shawn joo <sjoo@nvidia.com>
Reviewed-on: http://git-master/r/83350
(cherry picked from commit 1bf117669ed8b4fdb854074aef26d1a568544616)
Change-Id: Ib760e19903b7e9975a1ac7b8275537c75830764d
Reviewed-on: http://git-master/r/87633
Reviewed-by: Simone Willett <swillett@nvidia.com>
Tested-by: Simone Willett <swillett@nvidia.com>
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sysfs xmm_onoff is called from userspace.
If it is called twice with same value it could cause a problem.
if it happens, this change will ignore the case.
Bug 943018
Signed-off-by: Seongho Joo <sjoo@nvidia.com>
Reviewed-on: http://git-master/r/85721
(cherry picked from commit e722f73d1eed055682dbfeeedfa9c73173a7b3b6)
Change-Id: Ief96b667242a9af3df078cf62c9e9a9531b80f45
Reviewed-on: http://git-master/r/87639
Reviewed-by: Simone Willett <swillett@nvidia.com>
Tested-by: Simone Willett <swillett@nvidia.com>
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Add enable_irq_wake in probe to enable gpio irq wake.
Bug 928950
Signed-off-by: Seongho Joo <sjoo@nvidia.com>
Reviewed-on: http://git-master/r/85972
(cherry picked from commit e81069047c14a0ab9a3e1eb5588060959d550c49)
Change-Id: Ic513179670661ddc8a75d73a0afaa6264847cb1a
Reviewed-on: http://git-master/r/87644
Reviewed-by: Simone Willett <swillett@nvidia.com>
Tested-by: Simone Willett <swillett@nvidia.com>
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bpp on PM313 display was 18bpp which caused the
colours to show up incorrectly. Setting it
properly.
Bug 947532
Change-Id: Iccc99b67fea417b12d7bcc9f59055b60689be568
Signed-off-by: Graziano Misuraca <gmisuraca@nvidia.com>
Reviewed-on: http://git-master/r/88214
Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>
Tested-by: Bharat Nihalani <bnihalani@nvidia.com>
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Fixing checkpatch error/warning in dma header.
Change-Id: I86b65c25fc4b7edac9c4f1dfaf53023eb4c56036
Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
Reviewed-on: http://git-master/r/87544
Reviewed-by: Simone Willett <swillett@nvidia.com>
Tested-by: Simone Willett <swillett@nvidia.com>
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Protecting sysfs_remove_group() in CPUFREQ_GOV_STOP with dbs_mutex
Bug 946462
Signed-off-by: Peter Boonstoppel <pboonstoppel@nvidia.com>
Reviewed-on: http://git-master/r/86426
(cherry picked from commit d1131158e2ad4d5ccc53b3008743c29385650d86)
Change-Id: Iae810e83eaa6f0f7d970b56238cbcb61118af610
Reviewed-on: http://git-master/r/87392
Reviewed-by: Peter Boonstoppel <pboonstoppel@nvidia.com>
Reviewed-by: Diwakar Tundlam <dtundlam@nvidia.com>
Tested-by: Peter Boonstoppel <pboonstoppel@nvidia.com>
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Change-Id: If3a7c3911add67ff9f9aecd3c2b933a8553747f3
Signed-off-by: Chao Xu <cxu@nvidia.com>
Reviewed-on: http://git-master/r/87313
Reviewed-by: Simone Willett <swillett@nvidia.com>
Tested-by: Simone Willett <swillett@nvidia.com>
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Add TEGRA_PREINIT_CLOCKS option to put host1x, disp1, and audio clocks
into known state, so that L4T Cardhu works on u-boot.
BUG 931602
Change-Id: I7c5aaff340a072fe6587822eccc89df72b2b1d79
Signed-off-by: Jong Kim <jongk@nvidia.com>
Reviewed-on: http://git-master/r/86725
Reviewed-by: Simone Willett <swillett@nvidia.com>
Tested-by: Simone Willett <swillett@nvidia.com>
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In panel resume path DSI_PAD_CONTROL value gets calibrated,
however later on values are overwritten with bit settings
for ulpm mode.
refactor value for reg write to only change ulpm related bits.
Change-Id: I9f9713bdf376c06b0e1b9f43b3e6c9f719bbd855
Signed-off-by: Boris Suvorov <bsuvorov@nvidia.com>
Reviewed-on: http://git-master/r/85873
Reviewed-by: Simone Willett <swillett@nvidia.com>
Tested-by: Simone Willett <swillett@nvidia.com>
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change M/S configurations as modem has been made master
on whistler
Change-Id: Iae0cf3f85c43116b13ceb1ff5dfa4a9b121a5d62
Reviewed-on: http://git-master/r/88014
Tested-by: Nikesh Oswal <noswal@nvidia.com>
Reviewed-by: Scott Peterson <speterson@nvidia.com>
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i2s bitclk for dsp mode was kept 4 times the minimum requirement
for bcm4330 bt chip on whistler we require only 2 times the minimum
requirement because modem is also configured similarly and for bt call
both the bit clocks should match
Change-Id: I6a84b22c9fbd66b4e60832933b508fe8cf21f387
Reviewed-on: http://git-master/r/88013
Tested-by: Nikesh Oswal <noswal@nvidia.com>
Reviewed-by: Scott Peterson <speterson@nvidia.com>
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The request size should be multiple of 4 bytes in ONE_SHOT and
CONTINUOUS_SINGLE mode and multiple of 8 bytes in case of
CONTINUOUS_DOUBLE mode.
Change-Id: Iedb7a75eedda58f4f9b5c6d072ef2edb7ee657d4
Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
Reviewed-on: http://git-master/r/87994
Reviewed-by: Bitan Biswas <bbiswas@nvidia.com>
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Some cleanups:
- Copyright year change
- Properly aligned macro.
- Defined function as static if used only in file.
- Move the macro from header to file if it is only used in driver.
- Returning proper status on callbacks.
- Adding some more comments in code.
- Rewritten some piece of code for better readability.
Change-Id: I778752668a67b849859fd7e0c11f2b7a3f3b1edc
Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
Reviewed-on: http://git-master/r/87993
Reviewed-by: Bitan Biswas <bbiswas@nvidia.com>
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When doing the cleanups in isr, the request was deleted
two times after full buffer completion on double buffering
of dma mode.
Removing extra request deletion.
Change-Id: I6ef30b67d5d73bbc1d7a479d75b8e6ccba6a6f0a
Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
Reviewed-on: http://git-master/r/87992
Reviewed-by: Bitan Biswas <bbiswas@nvidia.com>
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Disabling clock of apb dma in suspend and enabling back on
resume.
Change-Id: I6320072ea25565bcab4833c9b10dcb6a9d526ac6
Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
Reviewed-on: http://git-master/r/87991
Reviewed-by: Bitan Biswas <bbiswas@nvidia.com>
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The clock name is "tegra_dma" for getting proper clock structure
and using this for resetting dma.
Change-Id: I44819ccc25d42f15b14a42d6616c776fa1ad95ec
Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
Reviewed-on: http://git-master/r/87990
Reviewed-by: Bitan Biswas <bbiswas@nvidia.com>
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Prevent Tegra3 secondary CPU entry to LP2 state when scheduler tick
is not switched to NOHZ mode, yet.
Bug 945658
Change-Id: I654f7aac0e545ecb557005cc4efad4317689e091
Signed-off-by: Alex Frid <afrid@nvidia.com>
Reviewed-on: http://git-master/r/87937
Reviewed-by: Thomas Cherry <tcherry@nvidia.com>
Tested-by: Thomas Cherry <tcherry@nvidia.com>
Reviewed-by: Prashant Gaikwad <pgaikwad@nvidia.com>
Reviewed-by: Simone Willett <swillett@nvidia.com>
Tested-by: Simone Willett <swillett@nvidia.com>
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Bug 886459
Signed-off-by: Raj Jayaraman <rjayaraman@nvidia.com>
(cherry picked from commit d6fe28ccbda0ae7c615e94f0a8896215780d31c6)
Change-Id: Idb2782812712329adbd45bd58407665e2bbfb7aa
Reviewed-on: http://git-master/r/87808
Reviewed-by: Simone Willett <swillett@nvidia.com>
Tested-by: Simone Willett <swillett@nvidia.com>
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Fix the codec name for Kai A00 board.
Change-Id: I3f88a484ac01f8b1374889574b431cfb53901ed6
Signed-off-by: Manoj Gangwal <mgangwal@nvidia.com>
Reviewed-on: http://git-master/r/87772
Reviewed-by: Simone Willett <swillett@nvidia.com>
Tested-by: Simone Willett <swillett@nvidia.com>
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Enable quirk SDHCI_QUIRK_BROKEN_CARD_DETECTION.
Also, implemented tegra_sdhci_get_cd() to return
the card presence status.
Bug 948943
Change-Id: I42eed23f951304e331a235f5a9199b70ba5e96b5
Signed-off-by: Pavan Kunapuli <pkunapuli@nvidia.com>
Reviewed-on: http://git-master/r/87766
Reviewed-by: Simone Willett <swillett@nvidia.com>
Tested-by: Simone Willett <swillett@nvidia.com>
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Add get_cd callback in the host ops to get the
card presence status incase SDHCI_QUIRK_BROKEN_
CARD_DETECTION is enabled.
Bug 948943
Change-Id: I788d9e907920a0aeb79784751ec0df25bc2a72d6
Signed-off-by: Pavan Kunapuli <pkunapuli@nvidia.com>
Reviewed-on: http://git-master/r/87765
Reviewed-by: Simone Willett <swillett@nvidia.com>
Tested-by: Simone Willett <swillett@nvidia.com>
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- the suspend order of devices is governed by the order
in which devices are registered
- this commit ensures that nvhost master is registered before
any of the graphics devices
- previously this was done in rootfs_init call which is
later than arch_init calls of board-xxx-panel.c
- this caused tegra-dc device to be registered *before* nvhost
master device. as a result it was suspended *later* than nvhost
master device. this is a clear violation of dependency rule
for nvhost. this caused suspend-resume to fail for L4T
- this worked on android as it has CONFIG early suspend enabled
while it failed for L4T which doesn't have CONFIG early suspend
enabled
Bug 947617
Change-Id: I6cd405f3ba23d004e7659140019f5130e6c25159
Signed-off-by: Mayuresh Kulkarni <mkulkarni@nvidia.com>
Reviewed-on: http://git-master/r/87756
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
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if SDHCI_QUIRK_NO_HISPD_BIT is set in host->quirks,
don't set SDHCI_CTRL_HISPD in sdhci_host_control register.
bug 929985
Signed-off-by: Harry Hong <hhong@nvidia.com>
Reviewed-on: http://git-master/r/79933
(cherry picked from commit 194670660af90b2bb7bc0efea920332459296141)
Change-Id: I7b5f58f5078886309610e9e4cc2bad83f0788168
Reviewed-on: http://git-master/r/87704
Reviewed-by: Simone Willett <swillett@nvidia.com>
Tested-by: Simone Willett <swillett@nvidia.com>
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MMC_PM_KEEP_POWER should be set before each suspend/resume cycle as
mmc drivers clears MMC_PM_KEEP_POWER from pm_flags on resume.
Bug 942826
Change-Id: Ie11c661bdc3450cc4e75fa7700b96aedc69d628a
Signed-off-by: Rakesh Kumar <krakesh@nvidia.com>
Reviewed-on: http://git-master/r/87703
Reviewed-by: Rakesh Goyal <rgoyal@nvidia.com>
Tested-by: Rakesh Goyal <rgoyal@nvidia.com>
Reviewed-by: Sachin Nikam <snikam@nvidia.com>
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Bug 930113
Change-Id: I15fede503217152263905d8f7f56d3392e460e8a
Signed-off-by: Sachin Nikam <snikam@nvidia.com>
Reviewed-on: http://git-master/r/87241
Reviewed-by: Shridhar Rasal <srasal@nvidia.com>
Tested-by: Shridhar Rasal <srasal@nvidia.com>
Reviewed-by: Juha Tukkinen <jtukkinen@nvidia.com>
Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>
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Set SCRATCH0 bit 1 when forced-recovery is set.
Bootrom will check this and put device into nvflash mode.
Bug 948326
Signed-off-by: Gaurav Sarode <gsarode@nvidia.com>
Change-Id: I78108021dffda681d63ddc6760e07cb563ba2eac
Reviewed-on: http://git-master/r/87238
Reviewed-by: Vivek Kumar <vivekk@nvidia.com>
Reviewed-by: Hon Fei Chong <hchong@nvidia.com>
Reviewed-by: Sachin Nikam <snikam@nvidia.com>
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