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2012-06-01regulator: tps62360: enable register cacheLaxman Dewangan
Enable cache of device register using regmap cache RBTREE. Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com> Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com> (cherry picked from commit 16ea003bd1c95ea55a0b88187ce7cbeaca760fcf) Change-Id: If747dd18a488d500f8295f903c8da92c241c293e Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com> Reviewed-on: http://git-master/r/105829 Reviewed-by: Automatic_Commit_Validation_User Reviewed-by: Bitan Biswas <bbiswas@nvidia.com> GVS: Gerrit_Virtual_Submit
2012-06-01regulator: tps62360: Convert to devm_regmap_init_i2c()Axel Lin
Signed-off-by: Axel Lin <axel.lin@gmail.com> Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com> (cherry picked from commit 9a4bdd87a29bf297d9046410b011d726d51c3999) Change-Id: Ic7cca64e14b2b2e812140c8d368279b615da074f Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com> Reviewed-on: http://git-master/r/105828 Reviewed-by: Automatic_Commit_Validation_User Reviewed-by: Bitan Biswas <bbiswas@nvidia.com> GVS: Gerrit_Virtual_Submit
2012-06-01regulator: Add support for tps62362 and tps62363 in tps62360-regulator driverAxel Lin
According to the datasheet[1], tps62360 is register compatible with tps62362. tps62361B is register compatible with tps62363. Thus this patch adds support for tps62362 and tps62363. [1] http://www.ti.com/litv/pdf/slvsau9b Change-Id: I62cdede0755d7decedeb7b1ef08e216a0dad3a12 Signed-off-by: Axel Lin <axel.lin@gmail.com> Acked-by: Laxman Dewangan <ldewangan@nvidia.com> Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com> (Cherry-picked from mainline commit d1cf4f6) Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com> Change-Id: Ib9c4a63f06182c0ed2c1f27d9bf63342aa8474bc Reviewed-on: http://git-master/r/105827 Reviewed-by: Automatic_Commit_Validation_User Reviewed-by: Bitan Biswas <bbiswas@nvidia.com> GVS: Gerrit_Virtual_Submit
2012-06-01regulator: Remove unused name and client fields from struct tps62360_chipAxel Lin
The client field of struct tps62360_chip is not used after converting to regmap. The name field of struct tps62360_chip is not used in this driver. Signed-off-by: Axel Lin <axel.lin@gmail.com> Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com> (cherry picked from mainline commit c60f1718f508a40964c149f1139b4eaaae825fd3) Change-Id: If7b0606b60bd887bc20ecbdaf5cafa6ccba8ff77 Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com> Reviewed-on: http://git-master/r/105826 Reviewed-by: Automatic_Commit_Validation_User Reviewed-by: Bitan Biswas <bbiswas@nvidia.com> GVS: Gerrit_Virtual_Submit
2012-06-01regulator: tps62360: Remove pointless test for unsigned less than zeroAxel Lin
The variable 'selector' is a 'unsigned int', so it can never be less than zero. Signed-off-by: Axel Lin <axel.lin@gmail.com> Acked-by: Laxman Dewangan <ldewangan@nvidia.com> Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com> (cherry picked from commit 46783a046e13588f0459271ad6db9785fa8dcb8b) Change-Id: I920b1628016b7d1c0b626497f24210c5c1f549ab Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com> Reviewed-on: http://git-master/r/105825 Reviewed-by: Automatic_Commit_Validation_User Reviewed-by: Bitan Biswas <bbiswas@nvidia.com> GVS: Gerrit_Virtual_Submit
2012-06-01arm: tegra: usb: fix UTMIP auto suspend issuesRakesh Bodla
Fixing the UTMIP auto suspend issues. Bug 992463 Bug 989400 Change-Id: Ia0d536cd66081b263f7f2bde5debcc600dcef22a Signed-off-by: Rakesh Bodla <rbodla@nvidia.com> Reviewed-on: http://git-master/r/105692 Reviewed-by: Automatic_Commit_Validation_User GVS: Gerrit_Virtual_Submit Reviewed-by: Venkat Moganty <vmoganty@nvidia.com>
2012-06-01ARM: Tegra: P1852: changed pad strengthsMohit Kataria
changed pad strengths to the values provided by syseng. Bug 978870 Change-Id: I23afc8235065ce8ab950dc92dc40e7df5f835989 Signed-off-by: Mohit Kataria <mkataria@nvidia.com> Reviewed-on: http://git-master/r/105578 Reviewed-by: Automatic_Commit_Validation_User GVS: Gerrit_Virtual_Submit Reviewed-by: Laxman Dewangan <ldewangan@nvidia.com>
2012-06-01arm: tegra: enterprise: add gpio for pmu msecureTom Cherry
Bug 986402 Change-Id: Icf06b136c602639fc84ea822db8cf54078ace5fd Signed-off-by: Tom Cherry <tcherry@nvidia.com> Reviewed-on: http://git-master/r/104270 Reviewed-by: Simone Willett <swillett@nvidia.com> Tested-by: Simone Willett <swillett@nvidia.com>
2012-06-01rtc: tps80031: add msecure supportTom Cherry
Bug 986402 Change-Id: Id12540e31f8d7d9a04d764ed012310a685eafb8d Signed-off-by: Tom Cherry <tcherry@nvidia.com> Reviewed-on: http://git-master/r/104269 Reviewed-by: Automatic_Commit_Validation_User GVS: Gerrit_Virtual_Submit Reviewed-by: Laxman Dewangan <ldewangan@nvidia.com>
2012-06-01ARM: tegra: cleanup wake header usageBitan Biswas
Removed unused wake header file from Tegra board files bug 980993 Change-Id: I61d919a2dc5b98caaca612b990fd1a7d06e76ae2 Signed-off-by: Bitan Biswas <bbiswas@nvidia.com> Reviewed-on: http://git-master/r/103622 Reviewed-by: Simone Willett <swillett@nvidia.com> Tested-by: Simone Willett <swillett@nvidia.com>
2012-06-01ARM: Tegra: changed pingroupsMohit Kataria
Changed pingroups with proper bit fields provided in TRM. Bug 978870 Change-Id: Ie02ff14448103c70e27149ac95cd487d33ab52c0 Signed-off-by: Mohit Kataria <mkataria@nvidia.com> Reviewed-on: http://git-master/r/103353 Reviewed-by: Automatic_Commit_Validation_User GVS: Gerrit_Virtual_Submit Reviewed-by: Laxman Dewangan <ldewangan@nvidia.com>
2012-06-01arm: tegra: Enable config NVMAP_CACHE_MAINT_BY_SET_WAYS.Krishna Reddy
Change-Id: Ia6dccfbd0464bc088dfcb05cc16e7f2ad35a9783 Signed-off-by: Krishna Reddy <vdumpa@nvidia.com> Reviewed-on: http://git-master/r/104291 Reviewed-by: Simone Willett <swillett@nvidia.com> Tested-by: Simone Willett <swillett@nvidia.com>
2012-06-01video: tegra: Config option for cache maint by set/ways.Krishna Reddy
Add config option to enable/disable cache maintenance by set/ways. Change-Id: Ie795e19650b2c05cd4789dbc1e8f04f9edc70bf1 Signed-off-by: Krishna Reddy <vdumpa@nvidia.com> Reviewed-on: http://git-master/r/104290 Reviewed-by: Automatic_Commit_Validation_User GVS: Gerrit_Virtual_Submit Reviewed-by: Kaz Fukuoka <kfukuoka@nvidia.com> Reviewed-by: Bo Yan <byan@nvidia.com>
2012-06-01ARM: tegra: kai: Remove tegra_gpio_enable/disableAshwini Ghuge
Removing tegra_gpio_enable and disable calls from board files as they are supported thorugh set direction calls in the driver Bug 984439 Change-Id: I4ec51c8eb68c373b7cec6903bf52539cd520b227 Reviewed-on: http://git-master/r/102813 Reviewed-by: Simone Willett <swillett@nvidia.com> Tested-by: Simone Willett <swillett@nvidia.com>
2012-06-01arm: tegra: pci: Support for dock hot plugJay Agarwal
PCIE dock detection is done using GPIO for cardhu e1291 board. Currently supporting only hotplug disconnect when all pcie devices will be stopped and will not work on hotplug connect later. Bug 912743 Bug 955043 Bug 946385 Change-Id: Ibb2869c12e193be5e6e7e057e149e7699598a061 Signed-off-by: Jay Agarwal <jagarwal@nvidia.com> Reviewed-on: http://git-master/r/87315 Reviewed-by: Automatic_Commit_Validation_User GVS: Gerrit_Virtual_Submit Reviewed-by: Varun Wadekar <vwadekar@nvidia.com>
2012-05-31serial: tegra: disable interrupt when changing configurationLaxman Dewangan
Disable the interrupts when the baudrate or any uart configuration. This will avoid the interrupt to be call when configuration is getting change. bug 984164 bug 969087 Change-Id: Id008964773237726a0ec4a04c428d3975bf3ebd9 Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com> Reviewed-on: http://git-master/r/104476 Reviewed-by: Automatic_Commit_Validation_User Tested-by: Pradeep Goudagunta <pgoudagunta@nvidia.com> GVS: Gerrit_Virtual_Submit Reviewed-by: David Yu (Engrg-SW) <davyu@nvidia.com> Tested-by: David Yu (Engrg-SW) <davyu@nvidia.com>
2012-05-31ASoC: tegra: remove compilation warningJuha Tukkinen
Ensure i2s_client_bits and i2s_audio_bits do not get used uninitialized. Bug 949219 Change-Id: Ibdd7f2598278639388d2c2afb5843f2471375ea2 Signed-off-by: Juha Tukkinen <jtukkinen@nvidia.com> Reviewed-on: http://git-master/r/105426 Reviewed-by: Sachin Nikam <snikam@nvidia.com> Reviewed-by: Automatic_Commit_Validation_User Reviewed-by: Sanjay Singh Rawat <srawat@nvidia.com>
2012-05-31video: tegra: host: Remove nvhost dsi driverTerje Bergstrom
Remove nvhost dsi driver. Real dsi driver is in tegradc. Bug 982965 Change-Id: I86044ba586d796ae8d049471a154dcf37bd0e6ed Reviewed-on: http://git-master/r/104975 Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com> Tested-by: Terje Bergstrom <tbergstrom@nvidia.com> Reviewed-by: Automatic_Commit_Validation_User Reviewed-by: Mayuresh Kulkarni <mkulkarni@nvidia.com> GVS: Gerrit_Virtual_Submit Reviewed-by: Juha Tukkinen <jtukkinen@nvidia.com>
2012-05-31ARM: tegra: ventana: get rid of gpio enable/disable callsSanjay Singh Rawat
Gpio direction setting and freeing functions will do the needful now. Bug 984440 Change-Id: I598cfbda4ac1d8fe7a61fe070abc92c5179807e9 Signed-off-by: Sanjay Singh Rawat <srawat@nvidia.com> Reviewed-on: http://git-master/r/104493 GVS: Gerrit_Virtual_Submit Reviewed-by: Automatic_Commit_Validation_User Reviewed-by: Laxman Dewangan <ldewangan@nvidia.com> Reviewed-by: Varun Wadekar <vwadekar@nvidia.com>
2012-05-31ARM: tegra: power: Go to G-CPU if minimum 1 is requestedAlex Frid
On Tegra3 switch and stay on G-CPU if minimum 1 is requested via PM QoS interface. Allow return to LP-CPU only if request is at default 0 level. Change-Id: Ie1a732fe6c6a1dcd2f7e78be01e32dcc5a7993a6 Signed-off-by: Alex Frid <afrid@nvidia.com> Reviewed-on: http://git-master/r/102120 Reviewed-by: Automatic_Commit_Validation_User Reviewed-by: Donghan Ryu <dryu@nvidia.com> Reviewed-by: Satya Popuri <spopuri@nvidia.com> Reviewed-by: Diwakar Tundlam <dtundlam@nvidia.com> GVS: Gerrit_Virtual_Submit Reviewed-by: Yu-Huan Hsu <yhsu@nvidia.com>
2012-05-31PM QoS: Set minimum online cpus default to zeroAlex Frid
Change default PM QoS request value for minimum online cpus parameter from 1 to 0. This is consistent with all other PM_QOS_MAX type parameters, and allow to differentiate request for 1 CPU and "no request". Change-Id: I548449d0b7a443b77f7f065e1e1f10dffc5587ed Signed-off-by: Alex Frid <afrid@nvidia.com> Reviewed-on: http://git-master/r/102119 Reviewed-by: Automatic_Commit_Validation_User Reviewed-by: Donghan Ryu <dryu@nvidia.com> Reviewed-by: Satya Popuri <spopuri@nvidia.com> Reviewed-by: Diwakar Tundlam <dtundlam@nvidia.com> GVS: Gerrit_Virtual_Submit Reviewed-by: Yu-Huan Hsu <yhsu@nvidia.com>
2012-05-31video: tegra: host: Use correct units in default timeoutTerje Bergstrom
Convert the jiffies to msecs when assigning a channel the default timeout. Change-Id: If9b6fb7c695e9621a0c50d99d4d1362b6dd214b6 Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com> Reviewed-on: http://git-master/r/105022 Reviewed-by: Rohan Somvanshi <rsomvanshi@nvidia.com> Tested-by: Rohan Somvanshi <rsomvanshi@nvidia.com>
2012-05-31asoc: codecs: ALC5639/40: Change to reduce codec pwr in lp0Manoj Gangwal
Bug 964287 1) Add support for resetting the codec while entering in lp0 state to save codec power in lpo for KAI. 2) Fix for cache sync. 3) Add index sync functionality. Change-Id: I04039eb55944bfe7f06e6a1405ac3c810c5688a1 Signed-off-by: Manoj Gangwal <mgangwal@nvidia.com> Reviewed-on: http://git-master/r/104480 Reviewed-by: Automatic_Commit_Validation_User GVS: Gerrit_Virtual_Submit Tested-by: Daniel Solomon <daniels@nvidia.com> Reviewed-by: Scott Peterson <speterson@nvidia.com>
2012-05-31arm: tegra: usb: add null ulpi baseband opsRakesh Bodla
Adding the implementation of null ulpi baseband ops. Bug 991485 Change-Id: Ic5ed9b2143650a07528189c80c5b6b8b8a9657c7 Signed-off-by: Rakesh Bodla <rbodla@nvidia.com> Reviewed-on: http://git-master/r/105398 Reviewed-by: Automatic_Commit_Validation_User Reviewed-by: Venkat Moganty <vmoganty@nvidia.com> GVS: Gerrit_Virtual_Submit
2012-05-31media: video: tegra: space correctionPreetham Chandru
A space is missing between the words 'an' and 'independent' in the print statement: dev_info(&info->i2c_client->dev, "%s no regulator found for %s. " "This board may not have an" "independent %s regulator.\n", __func__, info->vreg[j].vreg_name, info->vreg[j].vreg_name); Bug 991768 Signed-off-by: Preetham Chandru <pchandru@nvidia.com> Change-Id: Idde809c162b3b32c1db57436273af1810f03000a Reviewed-on: http://git-master/r/105157 Tested-by: Preetham Chandru <pchandru@nvidia.com> Reviewed-by: Automatic_Commit_Validation_User Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com> GVS: Gerrit_Virtual_Submit
2012-05-31video: tegra: host: Fix error case memory leaksTerje Bergstrom
When a submit fails, the related nvhost_job is not freed. Add an explicit free. Also, 3D is mapping the save buffer, but it is not unmapped. Bug 991972 Change-Id: Ie335adb5e64f54557e76d12dfb6a9a1557781e8d Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com> Reviewed-on: http://git-master/r/105152 Reviewed-by: Automatic_Commit_Validation_User Reviewed-by: Mayuresh Kulkarni <mkulkarni@nvidia.com> GVS: Gerrit_Virtual_Submit Reviewed-by: Juha Tukkinen <jtukkinen@nvidia.com>
2012-05-31ARM: tegra: usb: enable pmu vbus interruptsKrishna Yarlagadda
Enable pmu vbus interrupt for Enterprise and Whistler to save power by turning off controller clock Change-Id: I691bdd76ca71d63d98f83e2a3a18bbfcfc16a473 Signed-off-by: Krishna Yarlagadda <kyarlagadda@nvidia.com> Reviewed-on: http://git-master/r/105150 Reviewed-by: Rohan Somvanshi <rsomvanshi@nvidia.com> Tested-by: Rohan Somvanshi <rsomvanshi@nvidia.com>
2012-05-31arm: tegra: usb: fix suspend resume issues of ULPI phyVenu Byravarasu
Fixing suspend resume issues observed with ULPI phy during entering/exiting LP0 on enterprise. bug 989510 Change-Id: Iaf5da7597281b5e1a78df7bdf32c46422cb5c6ef Signed-off-by: Venu Byravarasu <vbyravarasu@nvidia.com> Reviewed-on: http://git-master/r/104959 Reviewed-by: Rohan Somvanshi <rsomvanshi@nvidia.com> Tested-by: Rohan Somvanshi <rsomvanshi@nvidia.com>
2012-05-31media: video: ov2710: add sensor group holdPablo Ceballos
Implements a group hold so that the gain, frame length, and coarse time can all be written in one ioctl call Also fixes AEC manual control register value Also implements bulk i2c send in the same way as ov5650 Bug 953910 Change-Id: Iaa2e8ac6c0156564920696afaa099321db6314f6 Signed-off-by: Pablo Ceballos <pceballos@nvidia.com> Reviewed-on: http://git-master/r/94380 Reviewed-by: Automatic_Commit_Validation_User Reviewed-by: Frank Chen <frankc@nvidia.com> Reviewed-by: Patrick Shehane <pshehane@nvidia.com> Reviewed-by: Dan Willemsen <dwillemsen@nvidia.com>
2012-05-30arm: tegra: kai: disable hotplug for usb instance 1Hunk Lin
Kai's USB1 instance is used for modem, so disabling the hotplug. Bug 989441 Bug 989400 Change-Id: Ia1e84a727f8343a55d6afc5360b35e5afed6947c Signed-off-by: Hunk Lin <hulin@nvidia.com> Reviewed-on: http://git-master/r/105315 Reviewed-by: Automatic_Commit_Validation_User Reviewed-by: Rakesh Bodla <rbodla@nvidia.com> Reviewed-by: Venkat Moganty <vmoganty@nvidia.com> GVS: Gerrit_Virtual_Submit
2012-05-30arm: tegra: cardhu: pm298: do not enable wakeup for interrupt keysJohnny Qiu
Bug 975433 MAX77663 driver hasn't implemented irq_set_wake(). Actually its interrupt always wakes up AP. Set wakeup = false to reduce warning messages in kernel Change-Id: If3e44fea359e363bd99ec415f7be3c4b3945205e Signed-off-by: Johnny Qiu <joqiu@nvidia.com> Reviewed-on: http://git-master/r/100000 Reviewed-by: Simone Willett <swillett@nvidia.com> Tested-by: Simone Willett <swillett@nvidia.com>
2012-05-30i2c: tegra: Fix possible race condition.Laxman Dewangan
on tegra3, the i2c communication start immediately after writing the tx fifo. And hence there is possibility to complete the transfer and generates done interrupt before actually sw updates their local pointers/count. This patch will make sure that pointers/count can get updated before data written into the fifo. Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com> Reviewed-on: http://git-master/r/89510 (cherry picked from commit 999c09f0ed32f271e767a319dd094947e63fdb8c) Change-Id: I8e974b83b5306ec3363d4ca31ce1b539a498ca08 Signed-off-by: Johnny Qiu <joqiu@nvidia.com> Reviewed-on: http://git-master/r/99997 Reviewed-by: Simone Willett <swillett@nvidia.com> Tested-by: Simone Willett <swillett@nvidia.com>
2012-05-30sdhci: tegra: Do not exceed platform voltage limitsnaveenk
check for platform limits before setting the voltage Bug 979504 Change-Id: Iea78be15d6a0eea0f4344c9b78ff9366f4759af8 Signed-off-by: naveen kumar arepalli <naveenk@nvidia.com> Reviewed-on: http://git-master/r/104711 Reviewed-by: Automatic_Commit_Validation_User Reviewed-by: Pavan Kunapuli <pkunapuli@nvidia.com> Reviewed-by: Sachin Nikam <snikam@nvidia.com> Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>
2012-05-30arm: tegra: resolve compilation time warningsSanjay Singh Rawat
Warnings removed are related to unused variables/labels, structure/argument type mismatch, copyright update, function return type mismatch and wrong C coding style. Bug 949219 Change-Id: Ib748d12d5ab3cfc35118be28c29983081cca6cbb Signed-off-by: Sanjay Singh Rawat <srawat@nvidia.com> Reviewed-on: http://git-master/r/103770 Reviewed-by: Automatic_Commit_Validation_User Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com> Reviewed-by: Sachin Nikam <snikam@nvidia.com>
2012-05-30arm: tegra: pcie: resolve flaw in lp0 save stateJay Agarwal
1. Restoring control register correctly. 2. Enabling clock clamping while resume Bug 959642 Change-Id: Ic97306b4dfed0e131274aa93b35dba3f906e55be Signed-off-by: Jay Agarwal <jagarwal@nvidia.com> Reviewed-on: http://git-master/r/103127 Reviewed-by: Automatic_Commit_Validation_User Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com> GVS: Gerrit_Virtual_Submit
2012-05-29video: tegra: host: Dump sync queue in debug dumpTerje Bergstrom
Dump contents of sync queue when debug dump is requested, either because of a stuck sync point, or when the debugfs entry is accessed. Exclude FIFO from normal debugfs dump. Dumping FIFO is invasive and actually changes how the channel behaves. It's safe to dump only when system is in fault condition. Change-Id: I12c68e8186acd7bd17e4ab52b2589f765396ed17 Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com> Reviewed-on: http://git-master/r/104970 Reviewed-by: Automatic_Commit_Validation_User GVS: Gerrit_Virtual_Submit Reviewed-by: Juha Tukkinen <jtukkinen@nvidia.com>
2012-05-29video: tegra: host: Throttle lower priority jobsTerje Bergstrom
Implement per channel counter for jobs in each priority level. If there are jobs active with higher priority than the one being submitted, throttle. Bug 926690 Change-Id: I5fed341e3f248325873b31d1c53bf57bf0a78074 Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com> Reviewed-on: http://git-master/r/104939 Reviewed-by: Automatic_Commit_Validation_User GVS: Gerrit_Virtual_Submit Reviewed-by: Juha Tukkinen <jtukkinen@nvidia.com> Reviewed-by: Mayuresh Kulkarni <mkulkarni@nvidia.com>
2012-05-29video: tegra: nvmap: Remove nvhost specific APIsTerje Bergstrom
Remove nvmap_pin_array() and nvmap_patch_word() and their utility functions. Bug 965206 Change-Id: I217a427934b0b99b5252b33ab3ac4eaaa8c7e076 Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com> Reviewed-on: http://git-master/r/104451 Reviewed-by: Automatic_Commit_Validation_User Reviewed-by: Mayuresh Kulkarni <mkulkarni@nvidia.com> GVS: Gerrit_Virtual_Submit Reviewed-by: Juha Tukkinen <jtukkinen@nvidia.com>
2012-05-29ARM: tegra: Add config for new focuser ad5816Sudhir Vyas
Add config param for new focuser ad5816 driver in tegra3 defconfig. Bug 947792 Change-Id: Ie34a982ac120abd7c9f980c9f038a734845b6f02 Signed-off-by: Sudhir Vyas <svyas@nvidia.com> Reviewed-on: http://git-master/r/103143 Reviewed-by: Automatic_Commit_Validation_User GVS: Gerrit_Virtual_Submit Reviewed-by: Sachin Nikam <snikam@nvidia.com>
2012-05-29ARM: tegra: Add ad5816 focuser board supportSudhir Vyas
- Add support for new focuser ad5816 driver to cardhu boards. - Add regulator for new focuser ad5816. Bug 947792 Change-Id: I62e89e9188d307704098e2d4e88d276914836d70 Signed-off-by: Sudhir vyas <svyas@nvidia.com> Reviewed-on: http://git-master/r/103138 Reviewed-by: Rohan Somvanshi <rsomvanshi@nvidia.com> Tested-by: Rohan Somvanshi <rsomvanshi@nvidia.com>
2012-05-29arm: tegra: cardhu: disable hotplug for usb instance 1Rakesh Bodla
USB 1 instance is used for modem, so disabling the hotplug. Bug 989441 Bug 989400 Change-Id: I94ad80e75f5b1f5d2cdb009e0d474943e11393e3 Signed-off-by: Rakesh Bodla <rbodla@nvidia.com> Reviewed-on: http://git-master/r/104748 Reviewed-by: Rohan Somvanshi <rsomvanshi@nvidia.com> Tested-by: Rohan Somvanshi <rsomvanshi@nvidia.com>
2012-05-29arm: tegra: usb_phy: fix remote wakeup issuesRakesh Bodla
This change fixes remote wakeup issues when usb line is in suspend state. Bug 989441 Bug 989400 Change-Id: I90a417c1d0a5e273c87a079133bb0ca1b4d18041 Signed-off-by: Rakesh Bodla <rbodla@nvidia.com> Reviewed-on: http://git-master/r/104747 Reviewed-by: Automatic_Commit_Validation_User Reviewed-by: Venkat Moganty <vmoganty@nvidia.com>
2012-05-29usb: ehci: tegra: fix remote wakeup issuesRakesh Bodla
This change fixes remote wakeup issues when usb line is in suspend state. Bug 989441 Bug 989400 Change-Id: I97982943d5521470b83ed87b83ab8703c4e9c260 Signed-off-by: Rakesh Bodla <rbodla@nvidia.com> Reviewed-on: http://git-master/r/104746 Reviewed-by: Automatic_Commit_Validation_User Reviewed-by: Venkat Moganty <vmoganty@nvidia.com>
2012-05-28arm: tegra: p1852: Instantiated TDM mode driverNitin Pai
Instantiated TDM mode driver. Changed clock values for TDM mode. Bug 948478 Change-Id: I64fb6c6f3ff0d573494656ae04f29323a41da50a Signed-off-by: Bob Johnston <bjohnston@nvidia.com> Reviewed-on: http://git-master/r/103895 Reviewed-by: Rohan Somvanshi <rsomvanshi@nvidia.com> Tested-by: Rohan Somvanshi <rsomvanshi@nvidia.com>
2012-05-28ASoC: Tegra: Add support for AVP renderingSumit Bhattacharya
Add alsa controls to specify which alsa device is used by AVP to render audio. Also add support for disabling DMA interrupt when AVP renders audio. Also add couple of alsa controls to query DMA channel ID and DMA buffer physical address. Bug 968814 Signed-off-by: Sumit Bhattacharya <sumitb@nvidia.com> Change-Id: If593329db72bf00d97f7433f5c54e13500281253 Reviewed-on: http://git-master/r/97916 Reviewed-by: Rohan Somvanshi <rsomvanshi@nvidia.com> Tested-by: Rohan Somvanshi <rsomvanshi@nvidia.com>
2012-05-25ARM: tegra: clock: Update secondary pll dividers resumePrashant Gaikwad
During resume from LP0 on Tegra2 always enable pll secondary dividers before clocks restoration (to make sure clock sources are enabled). Restore actual secondary dividers settings after clocks are restored. Bug 965928 Bug 953030 Change-Id: Id0cd99b601f90ad9fe8452817810969e41002199 Signed-off-by: Prashant Gaikwad <pgaikwad@nvidia.com> Reviewed on http://git-master/r/#change,104661 (cherry picked from commit 6350d1fd475373779cf5110403717b2c84e723ba) Change-Id: Ic50477603b97a99d2ac2c926df1728faa107b108 Reviewed-on: http://git-master/r/104668 Reviewed-by: Automatic_Commit_Validation_User Reviewed-by: Prashant Gaikwad <pgaikwad@nvidia.com> Tested-by: Prashant Gaikwad <pgaikwad@nvidia.com> Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com> GVS: Gerrit_Virtual_Submit
2012-05-25arm: tegra: cardhu: remove unused pinmux settingRakesh Goyal
Remove unsued pinmux for pn544 nfc which was introduced in http://git-master/r/#change,62746 Bug 978207 Change-Id: I7724e9c17c8c5717e07fbc9e091f26f6e81cb422 Signed-off-by: Rakesh Goyal <rgoyal@nvidia.com> Reviewed-on: http://git-master/r/104468 Reviewed-by: Simone Willett <swillett@nvidia.com> Tested-by: Simone Willett <swillett@nvidia.com>
2012-05-25spi: tegra: use functions to avoid duplicated codeLaxman Dewangan
The dma allocation method for receive and transmit is same and so instead of duplicating the same code for rx and tx, making the function to have common code and using the function for dma allocation. This reduces duplicated code. Change-Id: Ibe15eec896bc581bda8c68572eb1425c3bf6a7b2 Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com> Reviewed-on: http://git-master/r/104465 Reviewed-by: Automatic_Commit_Validation_User Reviewed-by: Bitan Biswas <bbiswas@nvidia.com>
2012-05-25spi: tegra: use devm_* for resource allocationLaxman Dewangan
Using of devm_* function for resource allocation does not require to free resource on code and hence it reduces code sizes. Change-Id: Id6f0ba3cde2f351d5668ed28b098e5a829716a30 Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com> Reviewed-on: http://git-master/r/104464 Reviewed-by: Automatic_Commit_Validation_User Reviewed-by: Bitan Biswas <bbiswas@nvidia.com>
2012-05-25spi: tegra: fix fifo_depth to 32.Laxman Dewangan
Slink controller have the fifo depth of 32 words in rx and tx side. But some of places it was taken the value as 4. Fixing this to 32 words. Change-Id: I262127c59241ce75d4385464c21ee733a48b1475 Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com> Reviewed-on: http://git-master/r/104463 Reviewed-by: Automatic_Commit_Validation_User Reviewed-by: Stephen Warren <swarren@nvidia.com> GVS: Gerrit_Virtual_Submit Reviewed-by: Bitan Biswas <bbiswas@nvidia.com>