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Unlike SDSC and SDHC, for SDXC cards CMD20 needs to be
issued to meet the class performance for speed class
recording. Adding mmc_speed_class_control() which should
be used by an AV recording app/utility before starting
recording on an SDXC card.
Bug 969360
Reviewed-on: http://git-master/r/39394
Signed-off-by: Pavan Kunapuli <pkunapuli@nvidia.com>
Reviewed-on: http://git-master/r/115685
(cherry picked from commit 04b8d1287a95e1882d956cdf7997015350408a3c)
Change-Id: Id567effb476ee580de3d49b70201ebae5a13360a
Reviewed-on: http://git-master/r/118038
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Naveen Kumar Arepalli <naveenk@nvidia.com>
Reviewed-by: Bitan Biswas <bbiswas@nvidia.com>
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host1x clock limit is already imposed by tegra3_dvfs.c and need not
to be explicitly set for p1852 SKU. Hence, removing the clock limit
duplication.
Bug 925358
Change-Id: I5e936f46ad64b0335561e321d61c4e8b13d7f765
Reviewed-on: http://git-master/r/106637
(cherry picked from commit ccaa3515121b637ce3870bf73f2402846670b63c)
Signed-off-by: Nirav Patel <nipatel@nvidia.com>
Reviewed-on: http://git-master/r/118130
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Reviewed-by: Varun Wadekar <vwadekar@nvidia.com>
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Added:
/sys/kernel/tegra_cap/cbus_cap_level
/sys/kernel/tegra_cap/cbus_cap_state
Change-Id: I06a32ea4001f1f644da4f230870f39523f9b6df3
Signed-off-by: Alex Frid <afrid@nvidia.com>
Reviewed-on: http://git-master/r/116874
Reviewed-by: Lokesh Pathak <lpathak@nvidia.com>
Tested-by: Lokesh Pathak <lpathak@nvidia.com>
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Change-Id: I4d15ef7a9089bf3519155d9ccf5192bf3dcf0bd6
Signed-off-by: Alex Frid <afrid@nvidia.com>
Reviewed-on: http://git-master/r/116873
Reviewed-by: Lokesh Pathak <lpathak@nvidia.com>
Tested-by: Lokesh Pathak <lpathak@nvidia.com>
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Added generic busy/free notifiers that the driver can invoke to let the
governor know that it cannot process further core online/offline
requests (invoked in our case whenever we switch to the LP cluster).
Change-Id: I5e3f7f28f38806a7f87050e8d0c8d2f2cf7521aa
Signed-off-by: Sai Charan Gurrappadi <sgurrappadi@nvidia.com>
Reviewed-on: http://git-master/r/114807
Reviewed-by: Lokesh Pathak <lpathak@nvidia.com>
Tested-by: Lokesh Pathak <lpathak@nvidia.com>
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NVMAP_CONVERT_CARVEOUT_TO_IOVMM is only available for IOMMU less SoCs.
This was introduced by:
commit b8b0b4c42fc77d94b8deadaa46f795784f3bbb5e
video: tegra: nvmap: Make IOMMU/IOVMM selectable in Kconfig
Bug 1017112
Change-Id: I2a6f101b15085ece600f77690bc77adc042eb29f
Signed-off-by: Hiroshi DOYU <hdoyu@nvidia.com>
Reviewed-on: http://git-master/r/117976
Reviewed-by: Automatic_Commit_Validation_User
Tested-by: Meghana Kankarej <mkankarej@nvidia.com>
Reviewed-by: Krishna Reddy <vdumpa@nvidia.com>
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The one shot thread will clock gate the modules periodically. This will ensure
relevant paths in dc driver have an active dc clock and dsi host.
Bug 1013172
Change-Id: Ibb505e35044f31405c06cb9fa0d6fdf78aafd4a6
Signed-off-by: Rakesh Iyer <riyer@nvidia.com>
Reviewed-on: http://git-master/r/117137
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Jon Mayo <jmayo@nvidia.com>
GVS: Gerrit_Virtual_Submit
Reviewed-by: Animesh Kishore <ankishore@nvidia.com>
Reviewed-by: Yu-Huan Hsu <yhsu@nvidia.com>
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1) Returning in irq after remote wakeup resume handled
in ehci irq function.
2) Removed the unused variables.
Bug 889618
Change-Id: I9a1fd25c753a53462bf7742065fa618caae501ab
Signed-off-by: Vinod Atyam <vatyam@nvidia.com>
Reviewed-on: http://git-master/r/111192
Reviewed-by: Simone Willett <swillett@nvidia.com>
Tested-by: Simone Willett <swillett@nvidia.com>
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In ULPI phy first SOF after Reset may be corrupt. Fixing this issue.
Bug 1012500
Change-Id: I45ee1b4c8e0a29298c94813030d22291b79e417b
Signed-off-by: Suresh Mangipudi <smangipudi@nvidia.com>
Reviewed-on: http://git-master/r/117635
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Simone Willett <swillett@nvidia.com>
Tested-by: Simone Willett <swillett@nvidia.com>
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Update Tegra3 AP37 dvfs table entries.
Bug 841336
Reviewed-on: http://git-master/r/115509
(cherry picked from commit fda92ca92eb421b554fcb50117c92ec59b4b515a)
Change-Id: Ib15ba4731f0770a8af2272c51a90c7dc0fd8f6b9
Signed-off-by: Rakesh Iyer <riyer@nvidia.com>
Reviewed-on: http://git-master/r/117926
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>
Tested-by: Bharat Nihalani <bnihalani@nvidia.com>
GVS: Gerrit_Virtual_Submit
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Current max USB bus current limit is 1.5A, add up to 2.25A support based
on TPS8003x register documentation.
BUG 1014876
Change-Id: Iae23e2473d9a7b52dac2d92029af03729e1e8a11
Reviewed-on: http://git-master/r/114801
(cherry picked from commit 04638c07f0b5a4ecea405ed914e144004b60877d)
Reviewed-on: http://git-master/r/116115
Reviewed-by: Xin Xie <xxie@nvidia.com>
Tested-by: Xin Xie <xxie@nvidia.com>
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Laxman Dewangan <ldewangan@nvidia.com>
Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>
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- host1x_save_context() explicitly updated the ref count on context
- with the re-factoring of nvhost_job code, nvhost_job_alloc()
takes a ref count on context
- this caused the explicit ref count in host1x_save_context()
redundant and lead to memory leak. hence remove it
Bug 1015924
Change-Id: Id18c74412e8659b60288700972690d1b895de4c1
Signed-off-by: Mayuresh Kulkarni <mkulkarni@nvidia.com>
Reviewed-on: http://git-master/r/116409
(cherry picked from commit c98d0cfbbdacdda8e540b5d9e0d513e279b3b2f5)
Reviewed-on: http://git-master/r/117326
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>
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Disable built in host support on OTG port
for Whistler and Enterprise boards.
Bug 1012273
Bug 947300
Change-Id: I88574c37795ee204e0cc67ed71f424443950494f
Signed-off-by: Krishna Yarlagadda <kyarlagadda@nvidia.com>
Reviewed-on: http://git-master/r/117307
Reviewed-by: Simone Willett <swillett@nvidia.com>
Tested-by: Simone Willett <swillett@nvidia.com>
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Tegra 2 requires regulator to be on during lp0
Bug 1012273
Change-Id: I750892fd391be327e617c70b7da4c984019a32fa
Signed-off-by: Krishna Yarlagadda <kyarlagadda@nvidia.com>
Reviewed-on: http://git-master/r/116743
Reviewed-by: Simone Willett <swillett@nvidia.com>
Tested-by: Simone Willett <swillett@nvidia.com>
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Modify the kernel logger to record the UID associated with
the log entries. Always allow the same UID which generated a
log message to read the log message.
Allow anyone in the logs group, or anyone with CAP_SYSLOG, to
read all log entries.
In addition, allow the client to upgrade log formats, so they
can get additional information from the kernel.
(cherry picked from android common tree commit
d993be54c164ea473816f04745ae4f0504dbccfb)
NV Bug 1019928
Change-Id: Ie48fb614b43c9302a07ad2673b78dd8749b492b6
Signed-off-by: Nick Kralevich <nnk@google.com>
Signed-off-by: Dan Willemsen <dwillemsen@nvidia.com>
Reviewed-on: http://git-master/r/117175
Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>
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Set SCLK floor to 80MHz for Tegra3 CPU mode switch.
Bug 933984
Change-Id: Ibbb0a24cd763c11b3cead60efe26096bae3e6ddd
Signed-off-by: Alex Frid <afrid@nvidia.com>
Reviewed-on: http://git-master/r/106035
Reviewed-by: Prajakta Gudadhe <pgudadhe@nvidia.com>
Tested-by: Jay Cheng <jacheng@nvidia.com>
(cherry picked from commit 842f7ddb7a188e36a2ff153dc0d8ed38b5e28319)
Reviewed-on: http://git-master/r/113981
Reviewed-by: Simone Willett <swillett@nvidia.com>
Tested-by: Simone Willett <swillett@nvidia.com>
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Enable regualtor REGULATOR_TPS51632 which is used
for cpu regulator.
Change-Id: I5ba78608e6c5480e8b0d8d54ee59c9bba0b58428
Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
Reviewed-on: http://git-master/r/117602
Reviewed-by: Automatic_Commit_Validation_User
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Bug 987713
Change-Id: I4e6fb47007e337ec992d5ee58510c664957b448d
Signed-off-by: Rakesh Goyal <rgoyal@nvidia.com>
Reviewed-on: http://git-master/r/117592
GVS: Gerrit_Virtual_Submit
Reviewed-by: Rakesh Kumar <krakesh@nvidia.com>
Reviewed-by: Pavan Kunapuli <pkunapuli@nvidia.com>
Reviewed-by: Laxman Dewangan <ldewangan@nvidia.com>
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This was accidently reverted to be set to max with commit 9774bbe31a.
With 2d clock at max, there is a hit on video power numbers.
Change-Id: Iaf73c6f7800d56229d35fb6a2b00f61d460e986d
Reviewed-on: http://git-master/r/117589
Reviewed-by: Automatic_Commit_Validation_User
Tested-by: Bharat Nihalani <bnihalani@nvidia.com>
Reviewed-by: Donghan Ryu <dryu@nvidia.com>
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This driver supports voltage regulator driver for TI TPS51632
voltage regulator chip. The TPS52632 is 3-2-1 Phase D-Cap+ Step
Down Driverless Controller with Serial VID control and DVFS.
This device has only one voltage output.
bug 978821
Change-Id: I73f3fd696bab5267e76e788fb4b5bf8d9f10b5b5
Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
Reviewed-on: http://git-master/r/117381
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Tristating and pulling down LCD_PCLK,LCD_WR_N,LCD_HSYNC,LCD_VSYNC
LCD_SCK,LCD_SDOUT and LCD_SCIN for E1506 DSI panel.
Bug 999702
Signed-off-by: Prem Sasidharan <psasidharan@nvidia.com>
Reviewed-on: http://git-master/r/111390
(cherry picked from commit 822a1c8ce2a50ff7b53cdd811c3ae1e47568d69d)
Change-Id: Icba97ddcbc4e7bd0b8c4744703e85bf8bc94ba69
Reviewed-on: http://git-master/r/117308
Reviewed-by: Automatic_Commit_Validation_User
Tested-by: Bharat Nihalani <bnihalani@nvidia.com>
Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>
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Make sure phy is turned ON before reading USB
registers.
Bug 993380
Bug 1006579
Reviewed-on: http://git-master/r/116045
(cherry picked from commit a1a6db7dc88880fb3d4bca0036ce421e4032adae)
Change-Id: If94e691bf9b5b46dd8f8562f27cf86e59a4d6353
Reviewed-on: http://git-master/r/117257
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Reviewed-by: Rakesh Bodla <rbodla@nvidia.com>
Tested-by: Rakesh Bodla <rbodla@nvidia.com>
Reviewed-by: Venkat Moganty <vmoganty@nvidia.com>
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Adding the conditions to prevent illegal register access.
Bug 993380
Bug 1006579
Reviewed-on: http://git-master/r/113138
(cherry picked from commit a3c026a229bbce614d7f40319bada1d7bf42942d)
Change-Id: I0d8e6c20aab04aa43ae484dc8ceb6fcb2c27d151
Reviewed-on: http://git-master/r/117256
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Rakesh Bodla <rbodla@nvidia.com>
Tested-by: Rakesh Bodla <rbodla@nvidia.com>
GVS: Gerrit_Virtual_Submit
Reviewed-by: Venkat Moganty <vmoganty@nvidia.com>
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Enables the IrDA support on E1198 and E1186 platforms.
This will enable the access to the IrDA transceiver through
(/dev/ttyHS1) UARTB of verbier (E1240).
Bug 999895
Change-Id: Ib2b8391facddf12b3b48d319e11f548d9f963712
Signed-off-by: Ramalingam C <ramalingamc@nvidia.com>
Reviewed-on: http://git-master/r/114952
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Reviewed-by: Laxman Dewangan <ldewangan@nvidia.com>
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Adds the IrDA support functions to the platform_data of UARTB on Verbier
boards(E1198 and E1186). And also adds a config variable CONFIG_TEGRA_IRDA
to control the IrDA support on Tegra.
Bug 999895
Change-Id: Iab77c419004292190421d55fd02e249ff98c728e
Signed-off-by: Ramalingam C <ramalingamc@nvidia.com>
Reviewed-on: http://git-master/r/114930
Reviewed-by: Simone Willett <swillett@nvidia.com>
Tested-by: Simone Willett <swillett@nvidia.com>
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Adds the IrDA transceiver handling support to tegra_hsuart driver based on
the platform data.
Bug 999895
Change-Id: Ia475639d97c540d014c7128ef392fa394a5b26ad
Signed-off-by: Ramalingam C <ramalingamc@nvidia.com>
Reviewed-on: http://git-master/r/114927
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Reviewed-by: Laxman Dewangan <ldewangan@nvidia.com>
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Added config option to set cbus divider.
Bug 978870
Change-Id: I49c57064ce695dd703ad97a50b8c0d373f5a05d0
Signed-off-by: Mohit Kataria <mkataria@nvidia.com>
Reviewed-on: http://git-master/r/114197
(cherry picked from commit 3f2b0e2b973a106d62e1f4bfb75bb40bd1a96b9b)
Reviewed-on: http://git-master/r/109962
Reviewed-by: Simone Willett <swillett@nvidia.com>
Tested-by: Simone Willett <swillett@nvidia.com>
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Use regmap for register access of device in place of
direct i2c calls.
This helps to have the debug FS support through regmap and
also help to caching register with minimum configuration.
Change-Id: I2a1285ab750639babcda40ba53001e7d1bd10a71
Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
Reviewed-on: http://git-master/r/117332
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Bitan Biswas <bbiswas@nvidia.com>
GVS: Gerrit_Virtual_Submit
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Allocate memory for device state using devm_kzalloc()
to simplify accounting and letting the kernel do the
garbage-collection.
Change-Id: I8dcde205556c43f4fdfe5e335507df206f204177
Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
Reviewed-on: http://git-master/r/117331
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Bitan Biswas <bbiswas@nvidia.com>
GVS: Gerrit_Virtual_Submit
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Make the tps80031 driver define its PM callbacks through a
struct dev_pm_ops object rather than by using legacy PM hooks
in struct i2c_driver
Change-Id: I3963426c26eb7609794c6fe761d69f31ee630cb2
Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
Reviewed-on: http://git-master/r/117330
Reviewed-by: Bitan Biswas <bbiswas@nvidia.com>
GVS: Gerrit_Virtual_Submit
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Fixing compilation warning:
kernel/drivers/mfd/tps80031.c: In function 'tps80031_init_ext_control.isra.4':
kernel/drivers/mfd/tps80031.c:594:6: warning: 'ret' is used uninitialized in this
function [-Wuninitialized]
Change-Id: I7d9cfab7b03ffe085ef4db7c9b08b0f2cb4e6fec
Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
Reviewed-on: http://git-master/r/117329
Reviewed-by: Bitan Biswas <bbiswas@nvidia.com>
GVS: Gerrit_Virtual_Submit
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"echo -e" is a GNU extension. When cross-compiling the kernel on a
BSD-like operating system (Mac OS X in my case), this doesn't work.
One could install a GNU version of echo, put that in the $PATH before
the system echo and use "/usr/bin/env echo", but the solution with
printf is simpler.
Since it is no disadvantage on Linux, I hope that gets accepted even if
cross-compiling the Linux kernel on another Unix operating system is
quite a rare use case.
(Cherry-picked from upstream v3.4 commit
875de98623fa2b29f0cb19915fe3292ab6daa1cb)
Signed-off-by: Bernhard Walle <bernhard@bwalle.de>
Andreas BieÃmann <andreas@biessmann.de>
Signed-off-by: Michal Marek <mmarek@suse.cz>
Signed-off-by: Nuno Subtil <nsubtil@nvidia.com>
Change-Id: Iddfeae6611a82e76a5d7cecbc1af25d4fdc71ecc
Reviewed-on: http://git-master/r/116918
Reviewed-by: Donghan Ryu <dryu@nvidia.com>
Reviewed-by: Dan Willemsen <dwillemsen@nvidia.com>
Tested-by: Nuno Subtil <nsubtil@nvidia.com>
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The dm "crypt" target is needed for encrypted /var support.
Additionally, since the expected hash alg will be sha256, built it in,
and ready future support for sha512 as a module.
BUG=chromium-os:22172
TEST=build, boot amd64-generic, verify target listed in "dmsetup targets"
Signed-off-by: Kees Cook <keescook@chromium.org>
Reviewed-on: https://gerrit.chromium.org/gerrit/15548
Reviewed-by: Kees Cook <keescook@chromium.org>
Tested-by: Kees Cook <keescook@chromium.org>
Commit-Ready: Kees Cook <keescook@chromium.org>
(cherry-picked from commit 50180f134a6e23be3ce763524b6b5193d848c0f7)
Modified to use:
chromeos/config/config.common.chromeos
instead of:
chromeos/config/base.config
Change-Id: Iac31f59f340f52a7017948fd5add3d316d38a123
Signed-off-by: Rhyland Klein <rklein@nvidia.com>
Reviewed-on: http://git-master/r/117151
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Reviewed-by: Dan Willemsen <dwillemsen@nvidia.com>
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Upon receiving IPv6 packet, set ethernet header's ether type
to 0x86dd. For transmission of IPv6, nothing extra required,
as the 14 byte ethernet header (containing the 0x86dd ether
type) is already stripped off as part of the raw-ip protocol.
Bug 1010735
Change-Id: Id574a7feeefbde0504ad0ea449dff28340e9356a
Signed-off-by: Michael Hsu <mhsu@nvidia.com>
Reviewed-on: http://git-master/r/113761
(cherry picked from commit 8bdfd06cae7eede4856ef825ea26b69c9ea065ef)
Reviewed-on: http://git-master/r/117148
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Vinayak Pane <vpane@nvidia.com>
Tested-by: Vinayak Pane <vpane@nvidia.com>
GVS: Gerrit_Virtual_Submit
Reviewed-by: Steve Lin <stlin@nvidia.com>
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Reduced pll post-lock delay from 50us to 2us.
Rearranged wait for lock loop to delay first check of lock bit
by 2us after pll is enabled.
Added read fence for PLLM lock via PMC (in this case enable bit is
in APB bus register, but lock detect bit is in PPSB bus register).
Bug 1017271
Change-Id: Ibc963533854383e884d87be61e1b98e9d54d3ea0
Signed-off-by: Alex Frid <afrid@nvidia.com>
Reviewed-on: http://git-master/r/115933
Reviewed-by: Simone Willett <swillett@nvidia.com>
Tested-by: Simone Willett <swillett@nvidia.com>
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On Tegra3 make sure cpu rate is within G-mode range before LP to G
mode switch triggered by secondary cpu boot directly from LP mode.
Bug 988544
Change-Id: I0d86fbf0727a6bbf6069159e7c532947a9d0af73
Signed-off-by: Alex Frid <afrid@nvidia.com>
Reviewed-on: http://git-master/r/115930
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Peter Boonstoppel <pboonstoppel@nvidia.com>
Reviewed-by: Greg Lo <glo@nvidia.com>
Reviewed-by: Yu-Huan Hsu <yhsu@nvidia.com>
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Bug 1003509
Change-Id: I8fb2c0cff7106671f8470b836ea26c09350d6206
Signed-off-by: Peter Zu <pzu@nvidia.com>
(cherry picked from commit df2dda0438c2aed3a961d197dce7319fefdf5b30)
Reviewed-on: http://git-master/r/115468
Reviewed-by: Simone Willett <swillett@nvidia.com>
Tested-by: Simone Willett <swillett@nvidia.com>
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Bug 841336
Signed-off-by: Peter Zu <pzu@nvidia.com>
Signed-off-by: Manoj Chourasia <mchourasia@nvidia.com>
Reviewed-on: http://git-master/r/113751
(cherry picked from commit 833f9d47a350358000e9201f77a3c9fd655d2900)
Change-Id: I679093d9d2577625bff3e02e25ffe90d396ea5a6
Reviewed-on: http://git-master/r/116134
Tested-by: Matt Wagner <mwagner@nvidia.com>
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>
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Bug 841336
Signed-off-by: Peter Zu <pzu@nvidia.com>
Reviewed-on: http://git-master/r/110587
(cherry picked from commit c0e7904245168cafc426219948ab132a4d832376)
Change-Id: I370f4af1d4ce888ebc71351519c1018b82d91913
Reviewed-on: http://git-master/r/116132
Tested-by: Matt Wagner <mwagner@nvidia.com>
Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>
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Rearranged the code to release all memory and res-
ources whenever poweroff is called and re-allocate
them whenever power on is called.
Bug 963969
Change-Id: I31d9cd1e8603e638714bba765aadfdd4eed78d93
Signed-off-by: Jay Agarwal <jagarwal@nvidia.com>
Reviewed-on: http://git-master/r/116048
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>
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Bootloader io dpd settings are cleared during kernel initialization
bug 758856
Change-Id: Ic6d5250a5ae127bb45ab37b9200ca06c8d1f11a2
Signed-off-by: Bitan Biswas <bbiswas@nvidia.com>
Reviewed-on: http://git-master/r/115395
Reviewed-by: Simone Willett <swillett@nvidia.com>
Tested-by: Simone Willett <swillett@nvidia.com>
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Set alarm logs enabled to help understand suspend stress failures
Change-Id: I60644ff0e3fea813ae1140be1b71fc2694d95709
Signed-off-by: Bitan Biswas <bbiswas@nvidia.com>
Reviewed-on: http://git-master/r/115361
Reviewed-by: Venu Byravarasu <vbyravarasu@nvidia.com>
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Jinyoung Park <jinyoungp@nvidia.com>
Tested-by: Jinyoung Park <jinyoungp@nvidia.com>
Reviewed-by: Laxman Dewangan <ldewangan@nvidia.com>
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Cosmetics: introducing a macro to define unsigned long sysfs nodes.
Change-Id: I594a527dc977437405167237e8d5ac6d3a3167d2
Signed-off-by: Ilan Aelion <iaelion@nvidia.com>
Reviewed-on: http://git-master/r/113020
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Matthew Longnecker <mlongnecker@nvidia.com>
Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>
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Do the clock control for enable/disable during each transfer
regardless of whether clock is always on or not.
If clock is always on then in probe the reference count of the
clock incremented and doing again enable will just increment
reference and disable will decrement the reference count
and so there is no harm on calling enable/disable always
during transfer.
Change-Id: Ibf67413fb84f826f04e890fe3dd2a20cd0469922
Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
Reviewed-on: http://git-master/r/116473
Tested-by: Bandi Krishna Chaitanya <bandik@nvidia.com>
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Remove unused member variable "iomem" of the
i2c device structure.
This variable becomes unused when converted all allocation
to devm_* in following change:
i2c: tegra: make all resource allocation through devm_*
Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
Signed-off-by: Wolfram Sang <w.sang@pengutronix.de>
Cherry-picked from mainline
57c0dc3e69439a2ddf239226c318d676da773492
Change-Id: I8a3db21524a20ee4cbd1b87dff82bac80a2763de
Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
Reviewed-on: http://git-master/r/116472
Reviewed-by: Automatic_Commit_Validation_User
Tested-by: Bandi Krishna Chaitanya <bandik@nvidia.com>
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The slave configuration is required for non-dvc i2c.
This can be done by checking the i2c type "is_dvc"
in place of having another variable.
Change-Id: Ia80ba0f7a68e2dfaa13b5da94896b87f2877e047
Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
Reviewed-on: http://git-master/r/116471
Tested-by: Bandi Krishna Chaitanya <bandik@nvidia.com>
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This reverts commit 021d8866c80fab07cb4cd2753ed67d0c1b49c174.
The reason for revert the change:
The readback is done at the time of i2c_writel() and hence
it is not require to have this in scattered manner.
This is towards the aligning driver with mainline.
Change-Id: I74184683301d7a3c26550d97fb1ce3596273a0bb
Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
Reviewed-on: http://git-master/r/116470
Reviewed-by: Bitan Biswas <bbiswas@nvidia.com>
Tested-by: Bandi Krishna Chaitanya <bandik@nvidia.com>
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The Tegra PPSB (an peripheral bus) queues writes transactions.
In order to guarantee that writes have completed before a
certain time, a read transaction to a register on the same
bus must be executed.
This is necessary in situations such as when clearing an
interrupt status or enable, so that when returning from an
interrupt handler, the HW has already de-asserted its
interrupt status output, which will avoid spurious interrupts.
Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
Signed-off-by: Wolfram Sang <w.sang@pengutronix.de>
Cherry-picked from mainline
ec7aaca2f64f509f45d463d784b41d0b3d2be083
Change-Id: I4f064c38993031303bfeef794015efd5517561cc
Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
Reviewed-on: http://git-master/r/116469
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Bitan Biswas <bbiswas@nvidia.com>
Tested-by: Bandi Krishna Chaitanya <bandik@nvidia.com>
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Use the devm_* for the memory region allocation, interrupt request,
clock handler request.
By doing this, it does not require to explicitly free it and hence
saving some code.
Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
Signed-off-by: Wolfram Sang <w.sang@pengutronix.de>
Cherry-picked from mainline
9cbb6b2b92d0fdade0fe00cc00e3658b44c86676
Change-Id: I0bc86dbd2bd4e460c75f6d425131f9e27bdace71
Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
Reviewed-on: http://git-master/r/116468
Reviewed-by: Bitan Biswas <bbiswas@nvidia.com>
Tested-by: Bandi Krishna Chaitanya <bandik@nvidia.com>
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It was originally missed in the __devinit/__devexit annotations.
Signed-off-by: Shubhrajyoti D <shubhrajyoti@ti.com>
Acked-by: Stephen Warren <swarren@nvidia.com>
Acked-by: Ben Dooks <ben-linux@fluff.org>
Signed-off-by: Olof Johansson <olof@lixom.net>
Cherry-picked from mainline
218d06d79468ca2e6abf3679eea12d7d93d251ef
Change-Id: I66db3d8b54ad6635819e5bda677bc789f9f90588
Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
Reviewed-on: http://git-master/r/116467
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Bitan Biswas <bbiswas@nvidia.com>
Tested-by: Bandi Krishna Chaitanya <bandik@nvidia.com>
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