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If the data commands fail due to some error, retry the transfer.
Add 3 retries for data commands.
for bug 914934
Change-Id: I53245ddd159abdbade09f841d9490d2f106e7c88
Signed-off-by: Mayuresh Kulkarni <mkulkarni@nvidia.com>
Signed-off-by: Pavan Kunapuli <pkunapuli@nvidia.com>
Reviewed-on: http://git-master/r/71181
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Sachin Nikam <snikam@nvidia.com>
Reviewed-by: Varun Wadekar <vwadekar@nvidia.com>
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Change-Id: I844648f0833ededabda0f2d6aebae214d600b796
Signed-off-by: Varun Wadekar <vwadekar@nvidia.com>
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Enabled EMC_SCALING option.
Signed-off-by: Peer Chen <pchen@nvidia.com>
Change-Id: I1a01be4668637c718544fcc6806b4c42a3ad27ae
Reviewed-on: http://git-master/r/70533
Reviewed-by: Simone Willett <swillett@nvidia.com>
Tested-by: Simone Willett <swillett@nvidia.com>
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Enabled cpu idle option.
Signed-off-by: Peer Chen <pchen@nvidia.com>
Change-Id: I614fddb65f63b143420c7d18d72a1d19c9ea98d2
Reviewed-on: http://git-master/r/70526
Reviewed-by: Simone Willett <swillett@nvidia.com>
Tested-by: Simone Willett <swillett@nvidia.com>
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Enabled cpu frequency governor option.
Signed-off-by: Peer Chen <pchen@nvidia.com>
Change-Id: I9df41be4a946723549d5af515e7cd4710ca44708
Reviewed-on: http://git-master/r/70522
Reviewed-by: Simone Willett <swillett@nvidia.com>
Tested-by: Simone Willett <swillett@nvidia.com>
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This CL is to get rid of continuous debug spew.
Change-Id: I9546ff82dcb41c3cd877b4d866d05097581aca85
Signed-off-by: Mursalin Akon <makon@nvidia.com>
Reviewed-on: http://git-master/r/70066
Reviewed-by: Simone Willett <swillett@nvidia.com>
Tested-by: Simone Willett <swillett@nvidia.com>
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Regenerate defconfigs to reflect current Kconfigs
Change-Id: I224833dc80934e2bfa374eaa85e22a70391d3fd2
Signed-off-by: Mursalin Akon <makon@nvidia.com>
Reviewed-on: http://git-master/r/70060
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Simone Willett <swillett@nvidia.com>
Tested-by: Simone Willett <swillett@nvidia.com>
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enable power button for waking up harmony
bug 911107
Change-Id: Id69204a904cafa4186cbac201830ac6d1e5a81b1
Signed-off-by: Bill Huang <bilhuang@nvidia.com>
Reviewed-on: http://git-master/r/70274
Reviewed-by: Simone Willett <swillett@nvidia.com>
Tested-by: Simone Willett <swillett@nvidia.com>
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Bug 886459
Change-Id: If7fb3e26c0a1a16bc61929eba6f0a62d7522cb05
Signed-off-by: Raj Jayaraman <rjayaraman@nvidia.com>
Reviewed-on: http://git-master/r/69568
Reviewed-by: Simone Willett <swillett@nvidia.com>
Tested-by: Simone Willett <swillett@nvidia.com>
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Bug 886459
Change-Id: I6005ba8081951a015f101ad864c00232ea88590a
Signed-off-by: Raj Jayaraman <rjayaraman@nvidia.com>
Reviewed-on: http://git-master/r/69567
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Yu-Huan Hsu <yhsu@nvidia.com>
Reviewed-by: Sachin Nikam <snikam@nvidia.com>
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The byte order in the reg_write call was swapped.
Also updates the mode truth table so focuser can choose one
to work on.
Corrects the position range and set the settle time dependents
on the transition mode.
bug 909072
Change-Id: I91fffbe4810b86883f934b08a4fdbc3284efd652
Signed-off-by: Charlie Huang <chahuang@nvidia.com>
Reviewed-on: http://git-master/r/69279
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Gary Zhang <garyz@nvidia.com>
Reviewed-by: Naren Bhat <nbhat@nvidia.com>
Reviewed-by: Erik Lilliebjerg <elilliebjerg@nvidia.com>
Reviewed-by: Jon Mayo <jmayo@nvidia.com>
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The KXTF9's control reg PC1 bit was being set for both
suspend and resume config structs in kxtf9_set_odr().
This caused the accelerometer to be turned on during both
suspend and resume.
Bug 902379
Cherry-picked From: http://git-master/r/#change,65983
Signed-off-by: Daniel Solomon <daniels@nvidia.com>
Change-Id: If0a17af5b4538008dbf4d4f8b2d280f8d3981e3f
Reviewed-on: http://git-master/r/69260
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Daniel Solomon <daniels@nvidia.com>
Tested-by: Daniel Solomon <daniels@nvidia.com>
Reviewed-by: Yu-Huan Hsu <yhsu@nvidia.com>
Reviewed-by: Robert Collins <rcollins@nvidia.com>
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HDA driver used to enable clocks during suspend only if there is no
active clock. But this logic causes a race condition when hda codec
power work thread disables the active instance of hda clocks in
middle of suspend. To avoid this race condition always enable
HDA clocks at start of suspend operation and disable all active
references of HDA clocks at end of suspend. Since HDA driver
suspend also suspends all active codecs there is no chance of
getting HDA clock disable call after completion of suspend.
Bug 915436
Change-Id: I4956ba28488d6d445ea2d53fb2592897a2ad83bb
Signed-off-by: Sumit Bhattacharya <sumitb@nvidia.com>
Reviewed-on: http://git-master/r/70315
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Scott Peterson <speterson@nvidia.com>
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Buffer usb urb request during suspend/resuming and send
it after resume is done. Make "needs_remote_wakeup = 0"
to pass auto suspend check.
BUG 909614
Change-Id: Ia966a8dc8ab6f808220562f08b072c66bb4678a1
Reviewed-on: http://git-master/r/70166
Reviewed-by: Simone Willett <swillett@nvidia.com>
Tested-by: Simone Willett <swillett@nvidia.com>
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This patch adds the equalizer and biquad filter controls.
Signed-off-by: Peter Hsiang <peter.hsiang@maxim-ic.com>
Acked-by: Liam Girdwood <lrg@ti.com>
Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
(cherry picked from commit dad31ec133adb20c8fd10bfd9379da3f08b8721e)
Change-Id: I5f0f1005cecc1ca28bac360a55a86de7b9cddfe1
Signed-off-by: Ravindra Lokhande <rlokhande@nvidia.com>
Reviewed-on: http://git-master/r/69961
Reviewed-by: Simone Willett <swillett@nvidia.com>
Tested-by: Simone Willett <swillett@nvidia.com>
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When a submit arrive in kernel, package it as a new data type nvhost_job
and use that for submitting to channel. That data type is used for
tracking the state of the job through its lifetime.
Change-Id: I0cfdb1721cc6c08efbd215917f5f46fdb7131ca0
Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com>
Reviewed-on: http://git-master/r/67682
Reviewed-by: Simone Willett <swillett@nvidia.com>
Tested-by: Simone Willett <swillett@nvidia.com>
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bug 902137
Change-Id: I1d92a579672ad5bd93e033000a366b6e5d6b27d9
Signed-off-by: venu byravarasu <vbyravarasu@nvidia.com>
Reviewed-on: http://git-master/r/70212
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Laxman Dewangan <ldewangan@nvidia.com>
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Bug 891536
Reviewed-on: http://git-master/r/63178
(cherry picked from commit e537469bce8711c4ec871663e659dce02f199695)
Change-Id: Id62581baab9ce45c7bf588b19f70b20901f3a98e
Reviewed-on: http://git-master/r/66982
Reviewed-by: Simone Willett <swillett@nvidia.com>
Tested-by: Simone Willett <swillett@nvidia.com>
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Regulator notifier event chain may be called with several events OR'd
together, e.g. in drivers/regulator/core.c:
_notifier_call_chain(rdev, REGULATOR_EVENT_FORCE_DISABLE |
REGULATOR_EVENT_DISABLE,
Bug 913417
Change-Id: Ifba9860c1ee59c2fe2a4ee3c901e983912e07139
Signed-off-by: Alexandre Courbot <acourbot@nvidia.com>
Reviewed-on: http://git-master/r/69725
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Aleksandr Frid <afrid@nvidia.com>
Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>
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dc vsync, hsync, DE and pclk polarity in kernel
can be different with bootloader setting for a short time
when default polarity value is written.
This can generate momentary panel flicker in kernel boot.
Set the first polarity based on board dc out pin polarity
information directly if needed.
Bug 891444
Signed-off-by: Min-wuk Lee <mlee@nvidia.com>
Reviewed-on: http://git-master/r/59895
(cherry picked from commit 8e5bfd5702067309171b62a6be5471bfab68a31e)
Change-Id: I80c703792ea5a9596d4cf42ef19115cbf4d556f6
Reviewed-on: http://git-master/r/69711
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Min-wuk Lee <mlee@nvidia.com>
Reviewed-by: Jon Mayo <jmayo@nvidia.com>
Tested-by: Min-wuk Lee <mlee@nvidia.com>
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Fix regulator enable/disable mismatch. AR0832_IOCTL_GET_SENSOR_ID
doesn't turn on power when it's called second time. This condition
wasn't handled properly in ar0832_power_off.
Remove redundant sleep() to speed up camera launch and switch.
Remove redundant variable.
Bug 913437
Change-Id: Ic5464a0fb4b8f3d8421a95fbfb6a399830887012
Signed-off-by: Jihoon Bang <jbang@nvidia.com>
Reviewed-on: http://git-master/r/69116
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Dan Willemsen <dwillemsen@nvidia.com>
Reviewed-by: Qi Wang <qiw@nvidia.com>
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Added a lower limit while in throttling to the thermal
layer. Needed this for tsensor to work.
Change-Id: Ib4cc038b9a287a799ae19ca565798b06c26af02c
Signed-off-by: Joshua Primero <jprimero@nvidia.com>
Reviewed-on: http://git-master/r/69562
Reviewed-by: Simone Willett <swillett@nvidia.com>
Tested-by: Simone Willett <swillett@nvidia.com>
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Export tegra_gpio_enable/disable api's to make them available
to loadable kernel modules.
Bug 845065
Change-Id: Ib17bd895fe03ffbf98fbf5e7e5d79dc3ec5f9235
Signed-off-by: Varun Wadekar <vwadekar@nvidia.com>
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Enabled probe callback in probe function now
that callback function parameter was added
to tsensor data structure.
Reviewed-on: http://git-master/r/62022
(cherry picked from commit 388f5aa8ac8b84bf247db8ebd3dcd05b2788b3d5)
Reviewed-on: http://git-master/r/64560
(cherry picked from commit c58aad90a5226b1a13c4e5397de800d5d7fdfa84)
Change-Id: I4cd66ebdf33e54048166207ab7012e4b74b5350d
Signed-off-by: Joshua Primero <jprimero@nvidia.com>
Reviewed-on: http://git-master/r/67239
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Diwakar Tundlam <dtundlam@nvidia.com>
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Hooked up tsensor to thermal framework. Cleaned
up some unnessary tsensor code as well.
Bug 848755
Reviewed-on: http://git-master/r/62021
(cherry picked from commit 307f53a36bd1bdfaabddfdd80f9de5445d805786)
Change-Id: If4156c35f78575bc67b48d1d87fa82a4e32751c5
Reviewed-on: http://git-master/r/63344
Signed-off-by: Joshua Primero <jprimero@nvidia.com>
Reviewed-on: http://git-master/r/67238
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Diwakar Tundlam <dtundlam@nvidia.com>
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Bug 888679
Change default regulator current to 6A on cardhu to support T33 based
board without VF
Change-Id: Ica8c1a9a4276ae1fb140c6a2ad1db04bd96c9471
Signed-off-by: Diwakar Tundlam <dtundlam@nvidia.com>
Reviewed-on: http://git-master/r/70187
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Aleksandr Frid <afrid@nvidia.com>
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Bug 913493
Change-Id: I05eaa030a0d959eb0bac1344f754ce73a479be9a
Signed-off-by: David Schalig <dschalig@nvidia.com>
Reviewed-on: http://git-master/r/69710
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Sachin Nikam <snikam@nvidia.com>
Reviewed-by: Scott Peterson <speterson@nvidia.com>
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Bug 914750
Bug 914753
Change-Id: I5aef20ca4925057a5d9d0932c9267a40c732ef4a
Signed-off-by: David Schalig <dschalig@nvidia.com>
Reviewed-on: http://git-master/r/69720
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Venu Byravarasu <vbyravarasu@nvidia.com>
Reviewed-by: Sachin Nikam <snikam@nvidia.com>
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This change fixes the compilation error.
The error happens when CONFIG_TEGRA_DC is not defined
Bug 916044
Change-Id: Icddd959f1ad9d9d9acad66e478e84c2bc96687b2
Signed-off-by: Hyungwoo Yang <hyungwooy@nvidia.com>
Reviewed-on: http://git-master/r/70191
Reviewed-by: Lokesh Pathak <lpathak@nvidia.com>
Tested-by: Lokesh Pathak <lpathak@nvidia.com>
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For debugging and working around SMMU/AVP IOVA range issues.
Default is "n" for production IOVA range.
Also removed chip revision knowledge from AVP loader.
Change-Id: I69984feaebe93a1d05d018ecf8a6e79d18bb0087
Reviewed-on: http://git-master/r/69515
Reviewed-by: Lokesh Pathak <lpathak@nvidia.com>
Tested-by: Lokesh Pathak <lpathak@nvidia.com>
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Add missing flags to enable multimedia support for T20 on K39.
Bug 909132
Signed-off-by: Jitendra Kumar<jitendrak@nvidia.com>
Change-Id: I943138eac72662912889c9fa6f04a5b23cf45bb3
Reviewed-on: http://git-master/r/68898
Reviewed-by: Lokesh Pathak <lpathak@nvidia.com>
Tested-by: Lokesh Pathak <lpathak@nvidia.com>
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Add flags to enable support for TEGRA NVAVP driver required for NvMMLite/TVMR
on K39. Also disable the support for AVP multimedia offload engine and
Tegra Media Serversupport.
Bug 908933
Signed-off-by Jitendra Kumar<jitendrak@nvidia.com>
Change-Id: I085dea2415927ef537648d8dd1ea77ba57e6064d
Reviewed-on: http://git-master/r/68894
Reviewed-by: Lokesh Pathak <lpathak@nvidia.com>
Tested-by: Lokesh Pathak <lpathak@nvidia.com>
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enable backlight and pwm device for harmony
bug 911107
Change-Id: Ib77d759f3248590a4a8d5b609068a3be97015b29
Signed-off-by: Bill Huang <bilhuang@nvidia.com>
Reviewed-on: http://git-master/r/70286
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Jon Mayo <jmayo@nvidia.com>
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User space components have been converted from using overlay display
driver to using display driver extensions. Overlay driver thus can be
disabled.
Bug 905578
Change-Id: I1666e21adce2c9382b3ce0561dbfa168a6c06007
Reviewed-on: http://git-master/r/70268
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Michael Frydrych <mfrydrych@nvidia.com>
Tested-by: Michael Frydrych <mfrydrych@nvidia.com>
Reviewed-by: Jon Mayo <jmayo@nvidia.com>
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As T30 A01 is no longer supported, remove T30 A01 workaround.
Bug 915655
Signed-off-by: Juha Tukkinen <jtukkinen@nvidia.com>
Change-Id: I17ebb252bad2c8a67fcb2b7ef1a40a1b3738a026
Reviewed-on: http://git-master/r/70014
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
Reviewed-by: Juha Tukkinen <jtukkinen@nvidia.com>
Tested-by: Juha Tukkinen <jtukkinen@nvidia.com>
Reviewed-by: Yu-Huan Hsu <yhsu@nvidia.com>
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Bug 914805
Change-Id: Ifb02c3193383b15f3f52964fcbad844fedd595c7
Signed-off-by: David Schalig <dschalig@nvidia.com>
Reviewed-on: http://git-master/r/69704
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Sachin Nikam <snikam@nvidia.com>
Reviewed-by: Mayuresh Kulkarni <mkulkarni@nvidia.com>
Reviewed-by: Jon Mayo <jmayo@nvidia.com>
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PMC register hold the reason for wakeup from LP0. The keypad driver resume the
device from the perspective of the User if the Power Key event is sent in the
register. Reset the register before going to suspend so that the status won't
get carried to the next wake time as in this case of LP1.
Bug 909191
Bug 913110
Change-Id: Ib00b26cd65008327f53b120ca8d0a4dbd3628227
Signed-off-by: Sanjay Singh Rawat <srawat@nvidia.com>
Reviewed-on: http://git-master/r/68686
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>
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Current implementation set max98095->sysclk/max98088->sysclk to freq twice.
Set it once is enough, this patch removes the first assignment in case
we may set invalid clock frequency to max98095->sysclk/max98088->sysclk.
Signed-off-by: Axel Lin <axel.lin@gmail.com>
Acked-by: Peter Hsiang <peter.hsiang@maxim-ic.com>
Acked-by: Liam Girdwood <lrg@ti.com>
Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
(cherry picked from commit 74ab24af4fe165de5af01d0507250dd099f096b0)
Change-Id: Ia287942e113a5e13598f537a5d976c49ace8af63
Signed-off-by: Ravindra Lokhande <rlokhande@nvidia.com>
Reviewed-on: http://git-master/r/69964
Reviewed-by: Simone Willett <swillett@nvidia.com>
Tested-by: Simone Willett <swillett@nvidia.com>
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Fixes two error cases with slowscan:
1. Disable slowscan without first enabling it.
Leaves TS controller disabled.
2. Enable slowscan twice consecutively.
Leaves TS controller programmed with incorrect values.
Bug 909304
Change-Id: I06db55aaf5935a838953d4f2fcf8f5dc2bb7123b
Signed-off-by: Robert Collins <rcollins@nvidia.com>
Reviewed-on: http://git-master/r/67501
(cherry picked from commit bb17439a70c585d35822d38ce5b53ca8368ab3a4)
Reviewed-on: http://git-master/r/70222
Reviewed-by: Simone Willett <swillett@nvidia.com>
Tested-by: Simone Willett <swillett@nvidia.com>
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Most of the places in the file refers to TPS, even though
the PMU used is RICOH.
Hence fixing it.
Change-Id: I3c8aa6185c03c3b1b62ca0de0520180ccaeafa9c
Signed-off-by: venu byravarasu <vbyravarasu@nvidia.com>
Reviewed-on: http://git-master/r/70220
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Laxman Dewangan <ldewangan@nvidia.com>
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Check for valid key size before setting the key.
Bug 915210
Change-Id: I081e2af9505ea89719d447b4b0ca2b0177860d09
Reviewed-on: http://git-master/r/70046
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Mallikarjun Kasoju <mkasoju@nvidia.com>
Tested-by: Mallikarjun Kasoju <mkasoju@nvidia.com>
Reviewed-by: Thomas Cherry <tcherry@nvidia.com>
Reviewed-by: Venkat Moganty <vmoganty@nvidia.com>
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Add Ricoh583 PMU RTC driver along with make files.
bug 902137
Change-Id: If9a62ca897e4d41735c7638fff17c7b7570bc3c6
Signed-off-by: venu byravarasu <vbyravarasu@nvidia.com>
Reviewed-on: http://git-master/r/70017
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Laxman Dewangan <ldewangan@nvidia.com>
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some sd 2.0 cards have sda_spec3 bit set due to which
hs_max_dtr is not set and the card operates at lower
frequency.
fixed this by setting hs_max_dtr without sda_spec3
dependency.
Bug 914869
Signed-off-by: naveenk <naveenk@nvidia.com>
Change-Id: I1624c0864f4f07cee5ea044f43e39c4336723e83
Reviewed-on: http://git-master/r/70009
Reviewed-by: Automatic_Commit_Validation_User
Tested-by: Naveen Kumar Arepalli <naveenk@nvidia.com>
Reviewed-by: Pavan Kunapuli <pkunapuli@nvidia.com>
Reviewed-by: Bitan Biswas <bbiswas@nvidia.com>
Reviewed-by: Sachin Nikam <snikam@nvidia.com>
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Register all host1x client modules as devices to kernel, and a matching
driver for each of them.
Change-Id: Id3ab2adc860fabfcc1595e0a5dbaeb07575e19e8
Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com>
Reviewed-on: http://git-master/r/69996
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Ken Adams <kadams@nvidia.com>
Reviewed-by: Yu-Huan Hsu <yhsu@nvidia.com>
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This patch adds the MAX98095 CODEC driver.
Signed-off-by: Peter Hsiang <peter.hsiang@maxim-ic.com>
Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
(cherry picked from commit 82a5a936f6dea13849d93a2899a9b7294a8db336)
Change-Id: I0a9805a90f46e30c756e5a266e96904597242185
Signed-off-by: Ravindra Lokhande <rlokhande@nvidia.com>
Reviewed-on: http://git-master/r/69960
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Sumit Bhattacharya <sumitb@nvidia.com>
Reviewed-by: Scott Peterson <speterson@nvidia.com>
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Bug 913416
Change-Id: I19f45bcd2c1ef9cb625728294b1dd53695e7d64b
Signed-off-by: Bhavesh Parekh <bparekh@nvidia.com>
Reviewed-on: http://git-master/r/69938
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: David Schalig <dschalig@nvidia.com>
Tested-by: David Schalig <dschalig@nvidia.com>
Reviewed-by: Sachin Nikam <snikam@nvidia.com>
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disable sensor AE/AWB and update coarse integration time
and gain settings on a mode change.
Bug 914413
Change-Id: I9121896521f47bc71f0aad9e88a1226dc8388774
Signed-off-by: Abhinav Sinha <absinha@nvidia.com>
Reviewed-on: http://git-master/r/69864
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Frank Chen <frankc@nvidia.com>
Reviewed-by: Dan Willemsen <dwillemsen@nvidia.com>
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Change-Id: I0715fc3ef5c3cb97ac317e46c63199cdae547737
Signed-off-by: Scott Williams <scwilliams@nvidia.com>
Reviewed-on: http://git-master/r/69891
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Varun Colbert <vcolbert@nvidia.com>
Tested-by: Varun Colbert <vcolbert@nvidia.com>
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Added support for EDP in tsensor. Since low limit
interrupts are not supported in hardware TH2 was
used for upper limit and TH0/TH1 as lower limit.
Also added generic functions to enable tsensor for
thermal refactoring.
Bug 912597
Change-Id: I8f1e126e1fe11c69aa03dee0a20a26ef2b7dc6a0
Signed-off-by: Joshua Primero <jprimero@nvidia.com>
Reviewed-on: http://git-master/r/66554
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Colin McCabe <cmccabe@nvidia.com>
Reviewed-by: Diwakar Tundlam <dtundlam@nvidia.com>
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Change-Id: Idb51349471414b4ab6eb84de51a449077865021e
Reviewed-on: http://git-master/r/69872
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Varun Colbert <vcolbert@nvidia.com>
Tested-by: Varun Colbert <vcolbert@nvidia.com>
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