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2012-05-08asoc: codecs: rt5640: resolve compilation time warningsSanjay Singh Rawat
bug 949219 Change-Id: I4409eaff4042967133cc948452ca8e52d15b2d18 Signed-off-by: Sanjay Singh Rawat <srawat@nvidia.com> Reviewed-on: http://git-master/r/92279 Reviewed-by: Automatic_Commit_Validation_User GVS: Gerrit_Virtual_Submit Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>
2012-05-08input: touchscreen: resolve compilation time warningsSanjay Singh Rawat
bug 949219 Change-Id: I408fb008a70c7ea546384e68ac50c1f0604fc39a Signed-off-by: Sanjay Singh Rawat <srawat@nvidia.com> Reviewed-on: http://git-master/r/92276 Reviewed-by: Automatic_Commit_Validation_User GVS: Gerrit_Virtual_Submit Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>
2012-05-08asoc: tegra: pcm: If there is no dma information exit from triggerNikesh Oswal
If there is no dma information exit from trigger, this is required for the dummy voice call playback and capture streams Change-Id: I5276e7ebb72c17268a9785204fea9f395b2e5d3a Signed-off-by: Nikesh Oswal <noswal@nvidia.com> Reviewed-on: http://git-master/r/101235 Reviewed-by: Automatic_Commit_Validation_User Reviewed-by: Scott Peterson <speterson@nvidia.com>
2012-05-08asoc:codecs: aic326x: change alsa ctrls for headphone driverNikesh Oswal
Use non-inverting type alsa control for headphones as same have been used for spk and recv Change-Id: I39d2613071063782dff8151b07ef46ca8e16db5c Signed-off-by: Nikesh Oswal <noswal@nvidia.com> Reviewed-on: http://git-master/r/101234 Reviewed-by: Automatic_Commit_Validation_User Reviewed-by: Scott Peterson <speterson@nvidia.com>
2012-05-08asoc:codecs: tiaic326x: remove minidsp supportNikesh Oswal
disable the flags for turning off the mini dsp support Change-Id: Ieb0b18fc3cc1143cbd0a315c85688d2f1ae4efe1 Reviewed-on: http://git-master/r/101233 Reviewed-by: Automatic_Commit_Validation_User Tested-by: Nikesh Oswal <noswal@nvidia.com> Reviewed-by: Scott Peterson <speterson@nvidia.com>
2012-05-08Arm: tegra: p1852: Avp clock frequency to 334Mohit Kataria
changed the max avp clock from 378MHz to 334MHz as per new POR changes Bug 883565 Change-Id: I4e9dda0288f3f85c8b1705971bb8f389127cff28 Reviewed-on: http://git-master/r/97279 Signed-off-by: Mohit Kataria <mkataria@nvidia.com> Reviewed-on: http://git-master/r/100870 Reviewed-by: Automatic_Commit_Validation_User Reviewed-by: Aleksandr Frid <afrid@nvidia.com> Reviewed-by: Varun Wadekar <vwadekar@nvidia.com>
2012-05-08video: tegra: host: Iterate devices without nb_channelsTerje Bergstrom
Do not use nb_channels to find out the number of client devices. Instead, allocate devno regions when they are needed and find a device by module id by iterating over nvhost bus. Bug 871237 Change-Id: I53fd0d8e5874422ef9877430c0a170db2660118a Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com> Reviewed-on: http://git-master/r/99067 Reviewed-by: Automatic_Commit_Validation_User GVS: Gerrit_Virtual_Submit Reviewed-by: Juha Tukkinen <jtukkinen@nvidia.com>
2012-05-08mfd: twl6025: resolve compilation time warningsSanjay Singh Rawat
bug 949219 Change-Id: Ied38dc0ff7ade8b15561747cde6d552f2597e9e6 Signed-off-by: Sanjay Singh Rawat <srawat@nvidia.com> Reviewed-on: http://git-master/r/92307 Reviewed-by: Automatic_Commit_Validation_User GVS: Gerrit_Virtual_Submit Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>
2012-05-08security: tf: resolve compilation time warningsSanjay Singh Rawat
bug 949219 Change-Id: Ia7d23d3aab631e6a78c53518bc1f608d46e8f341 Signed-off-by: Sanjay Singh Rawat <srawat@nvidia.com> Reviewed-on: http://git-master/r/92260 Reviewed-by: Automatic_Commit_Validation_User GVS: Gerrit_Virtual_Submit Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>
2012-05-08video: tegra: fb: Call mode filter from check varShashank Sharma
Call dc_hdmi_mode_filter to validate a videomode. X prepares its own modedb of supported HDMI modes, but all of them may not be supported from the HDMI driver. This call makes sure a X-mode is listed only if supported in DC driver. Bug: 959676 Change-Id: I8aff65f4e08fcc4471af096150e3972b5913a95a Signed-off-by: Shashank Sharma <shashanks@nvidia.com> Reviewed-on: http://git-master/r/99650 Reviewed-by: Rohan Somvanshi <rsomvanshi@nvidia.com> Tested-by: Rohan Somvanshi <rsomvanshi@nvidia.com>
2012-05-08input: touch: enterprise: Increase i2c to 400Khz.David Jung
Modified board file to increase the speed of I2C connection for Atmel touch driver from 100KHz to 400KHz Bug 962710 Change-Id: Ic692a4b610c5b952c1bdcfbb26e19714b1952a5f Signed-off-by: David Jung <djung@nvidia.com> Reviewed-on: http://git-master/r/98585 Reviewed-by: Automatic_Commit_Validation_User Reviewed-by: Ali Ekici <aekici@nvidia.com> Reviewed-by: Dan Willemsen <dwillemsen@nvidia.com> GVS: Gerrit_Virtual_Submit
2012-05-08video: tegra: dc: Set default videomodeShashank Sharma
Set default videomode during the dc probe. This patch enables HDMI during the probe only and fixes following issues: 1. Until Xinit there was no display on HDMI. 2. Framebuffer console on HDMI needs it to be enabled well before Xinit. To avoide un-necessary powering on HDMI,Check HPD and enable HDMI only if it's present. Bug: 930136 Bug: 977705 Change-Id: Ifb71328e5df0ccbb5751669db71fd24719fe3738 Signed-off-by: Shashank Sharma <shashanks@nvidia.com> Reviewed-on: http://git-master/r/100656 Reviewed-by: Rohan Somvanshi <rsomvanshi@nvidia.com> Tested-by: Rohan Somvanshi <rsomvanshi@nvidia.com>
2012-05-07mfd: max77663: Add gpio irq masking in irq_sync_unlockJinyoung Park
Add gpio irq masking in irq_sync_unlock. Change-Id: I008caf58ae82d9ed888f4720f54675e9106f027d Signed-off-by: Jinyoung Park <jinyoungp@nvidia.com> Reviewed-on: http://git-master/r/98664 Reviewed-by: Simone Willett <swillett@nvidia.com> Tested-by: Simone Willett <swillett@nvidia.com>
2012-05-07mmc: host: loglevel of a message to KERN_INFORamalingam C
Some boards don't have a vddio regulator for few rails hence not getting the regulator handle. And we assume that those rails are always powered. Hence rephrased the error message and lowered the loglevel to KERN_INFO. Bug 976177 Change-Id: I92b82f75934eaf7137584a625065e3389b6ae1b7 Signed-off-by: Ramalingam C <ramalingamc@nvidia.com> Reviewed-on: http://git-master/r/100490 Reviewed-by: Simone Willett <swillett@nvidia.com> Tested-by: Simone Willett <swillett@nvidia.com>
2012-05-07arm: tegra: Cardhu board file, 400K I2C touch drvrAli Ekici
Modified board file to increase the speed of I2C connection for Atmel touch driver from 100KHz to 400KHz Bug 962710 Bug 950422 Change-Id: Ib0f08af35d84cfc1f33cc3771d2aa422f79d98d0 Signed-off-by: Ali Ekici <aekici@nvidia.com> Reviewed-on: http://git-master/r/97744 Reviewed-by: Automatic_Commit_Validation_User Reviewed-by: Robert Collins <rcollins@nvidia.com> GVS: Gerrit_Virtual_Submit Reviewed-by: David Jung <djung@nvidia.com> Reviewed-by: Yu-Huan Hsu <yhsu@nvidia.com>
2012-05-07regulator: max77663: fix fps update conditionJinyoung Park
Fix fps update condition in max77663_regulator_set_fps(). Bug 930883 Change-Id: I2f57603320a91b2727932586fc3c66d9de347d64 signed-off-by: Jinyoung Park <jinyoungp@nvidia.com> Reviewed-on: http://git-master/r/92707 Reviewed-by: Simone Willett <swillett@nvidia.com> Tested-by: Simone Willett <swillett@nvidia.com>
2012-05-07mfd: max77663: Unmask EN0 rising interruptJinyoung Park
Unmasked EN0 rising interrupt to generate fast PMU_INT by EN0(POWER_KEY). Bug 930883 Change-Id: I9a3d8c4f564e83deea86fbd3d05f14933a0b0f65 Signed-off-by: Jinyoung Park <jinyoungp@nvidia.com> Reviewed-on: http://git-master/r/98665 Reviewed-by: Simone Willett <swillett@nvidia.com> Tested-by: Simone Willett <swillett@nvidia.com>
2012-05-07bluetooth: tibluesleep: clean up tibluesleep driverNagarjuna Kristam
Remove UART clock enable code, as UART clock gating is not needed in tibluesleep driver. Remove un-wanted tasklets, workqueues and wakelocks Remove extra lines and spaces Change-Id: I422e09ece2c736c4a98911a5bd84029ad654cb08 Signed-off-by: Nagarjuna Kristam <nkristam@nvidia.com> Reviewed-on: http://git-master/r/96944 Reviewed-by: Automatic_Commit_Validation_User GVS: Gerrit_Virtual_Submit Reviewed-by: Rakesh Goyal <rgoyal@nvidia.com> Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>
2012-05-07ARM: tegra: enterprise: register parent regulator before fuse regulatorLaxman Dewangan
bug 978829 Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com> Reviewed-on: http://git-master/r/99460 (cherry picked from commit b5531673e3da75f2406685ce377f39d76f494162) Change-Id: I5280dedb460df9852cc39d1c17132319e202c7b2 Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com> Reviewed-on: http://git-master/r/100524 Reviewed-by: Automatic_Commit_Validation_User
2012-05-07ARM: tegra: cardhu: Wakup through GPIO-PV0 for E1291-A04Laxman Dewangan
To have the proper LP0 exit power sequence, it is require to wakeup system through tegra gpio rather than PMU-INT. bug 957972 Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com> Reviewed-on: http://git-master/r/100107 Tested-by: Pradeep Goudagunta <pgoudagunta@nvidia.com> Cherry-picked commit ffe8e102d91c5eafc0b71b044b97fe9e8cef7463 Change-Id: I0518e46b43ec36ba6e076a946da2d395cd31777e Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com> Reviewed-on: http://git-master/r/100521 Reviewed-by: Rohan Somvanshi <rsomvanshi@nvidia.com> Tested-by: Rohan Somvanshi <rsomvanshi@nvidia.com>
2012-05-07ARM: tegra: clock: Add locked version of round rateAlex Frid
Add locked version of round rate API to be used by tegra arch specific layer. Signed-off-by: Alex Frid <afrid@nvidia.com> (cherry picked from commit 457627966b91f2141439812869adc4acf9242471) Change-Id: Id68d0bb952d1e7d9e650341872d1b06b0b2d3cea Reviewed-on: http://git-master/r/100474 Reviewed-by: Automatic_Commit_Validation_User Tested-by: Aleksandr Frid <afrid@nvidia.com> Reviewed-by: Yu-Huan Hsu <yhsu@nvidia.com>
2012-05-07arm: tegra: pl310: Enable dynamic clock gating and standy.Krishna Reddy
Bug 947861 Change-Id: Ib4ce7bfa3624562a766678a2ef20ebdcd3055d89 Signed-off-by: Krishna Reddy <vdumpa@nvidia.com> Reviewed-on: http://git-master/r/100462 Reviewed-by: Automatic_Commit_Validation_User Reviewed-by: Bo Yan <byan@nvidia.com> Reviewed-by: Yu-Huan Hsu <yhsu@nvidia.com>
2012-05-07arm: tegra: scu: Enable IC and SCU standbyKrishna Reddy
Bug 947861 Change-Id: I1ac97b5de5e7e79a418b3c38c70df4976616cdf3 Signed-off-by: Krishna Reddy <vdumpa@nvidia.com> Reviewed-on: http://git-master/r/100457 Reviewed-by: Automatic_Commit_Validation_User Reviewed-by: Aleksandr Frid <afrid@nvidia.com> Reviewed-by: Yu-Huan Hsu <yhsu@nvidia.com>
2012-05-07video: tegra: nvmap: config option to enable page pools.Krishna Reddy
Add config option to enable/disable nvmap page pools. Change-Id: I873e81a675fecd768534d4ce03c2f8fdd3c6a063 Signed-off-by: Krishna Reddy <vdumpa@nvidia.com> Reviewed-on: http://git-master/r/100424 Reviewed-by: Automatic_Commit_Validation_User Reviewed-by: Yu-Huan Hsu <yhsu@nvidia.com>
2012-05-06arm: tegra: kai: set the pull up source GPIO_PCC7Hunk Lin
TEGRA_GPIO_PCC7(PEX_L2_CLKREQ) is used as the pull up source to pull up other pins in schematic. So set it to high default. bug 949026 Change-Id: I5a4d806ec4b54969514547472cd08018d285ced5 Signed-off-by: Hunk Lin <hulin@nvidia.com> Reviewed-on: http://git-master/r/99778 Reviewed-by: Varun Colbert <vcolbert@nvidia.com> Tested-by: Varun Colbert <vcolbert@nvidia.com>
2012-05-06ARM: tegra2: clock: Enable PREINIT_CLOCKSJong Kim
Enable CONFIG_PREINIT_CLOCKS. bug 967065 Change-Id: Ib6675f9bff6729ffe7dfcd8b753c42b5d32240e4 Signed-off-by: Jong Kim <jongk@nvidia.com> Reviewed-on: http://git-master/r/99517 Reviewed-by: Varun Colbert <vcolbert@nvidia.com> Tested-by: Varun Colbert <vcolbert@nvidia.com>
2012-05-06usb: otg: tegra: Change suspend resume logicRakesh Bodla
Changed the suspend resume logic as per new UDC driver. Also, added few debug prints. Bug 887361 Change-Id: I36ec1f160e8b4db54b5bd2153bdbf1c4fae1cc2a Signed-off-by: Rakesh Bodla <rbodla@nvidia.com> Reviewed-on: http://git-master/r/99450 Reviewed-by: Venkat Moganty <vmoganty@nvidia.com> Reviewed-by: Automatic_Commit_Validation_User
2012-05-06arm: configs: tegra: enable tegra udc driverRakesh Bodla
Enable tegra udc driver. Bug 887361 Change-Id: Iaac2486d2a05454fa351920d5c65d17b9c2a881b Signed-off-by: Rakesh Bodla <rbodla@nvidia.com> Reviewed-on: http://git-master/r/99449 Reviewed-by: Automatic_Commit_Validation_User Reviewed-by: Venkat Moganty <vmoganty@nvidia.com>
2012-05-06arm: tegra: update the udc driver nameRakesh Bodla
Update the clocks structure to use new udc driver name. Also, update the device structure. Bug 887361 Change-Id: I0fd846ab177e8651f285bcb9796361d30967b830 Signed-off-by: Rakesh Bodla <rbodla@nvidia.com> Reviewed-on: http://git-master/r/99448 Reviewed-by: Varun Colbert <vcolbert@nvidia.com> Tested-by: Varun Colbert <vcolbert@nvidia.com>
2012-05-06usb: tegra: add USB device controller driver for tegra chipRakesh Bodla
Add High-speed USB device controller driver for tegra chips. This can work in OTG device mode with tegra OTG driver. Driver currently supports only UMTIP PHY. Bug 887361 Change-Id: I63774a44e3bb607c93007b170ba8b811f96e43f8 Signed-off-by: Rakesh Bodla <rbodla@nvidia.com> Reviewed-on: http://git-master/r/97918 Reviewed-by: Venkat Moganty <vmoganty@nvidia.com> Reviewed-by: Automatic_Commit_Validation_User
2012-05-06ARM: tegra: Export tegra_powergate_is_powered()Antti P Miettinen
Export tegra_powergate_is_powered() for use by modules. Change-Id: I8cfbb8aeb95dca00cbf6ef0c8c2bd189afeb62b6 Signed-off-by: Antti P Miettinen <amiettinen@nvidia.com> Reviewed-on: http://git-master/r/97724 Reviewed-by: Varun Colbert <vcolbert@nvidia.com> Tested-by: Varun Colbert <vcolbert@nvidia.com>
2012-05-06arm: tegra: kai: Switch to external temperature sensorKerwin Wan
Disable internal temperature sensor and enable external temperature sensor. This is a modified version of change 74db6e22d316a95630d3059644fbc55e2620cb9b Bug 954134 Change-Id: Id64bb93a09e1701165ad1f82e08bb92e61425873 Signed-off-by: Daniel Solomon <daniels@nvidia.com> Reviewed-on: http://git-master/r/96285 Reviewed-by: Varun Colbert <vcolbert@nvidia.com> Tested-by: Varun Colbert <vcolbert@nvidia.com>
2012-05-06ARM: tegra: cardhu: pm299: system wake through tegra gpioLaxman Dewangan
Waking up system through the tegra gpio inplace of ricoh onkey when using the ricoh based pmu. bug 978922 Change-Id: If9c5baffa42aca5fcc7d6238c5cf122a136e7760 Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com> Reviewed-on: http://git-master/r/100351 Reviewed-by: Automatic_Commit_Validation_User Reviewed-by: Bitan Biswas <bbiswas@nvidia.com>
2012-05-04video: early exit from update_cdmaPranav Chaturvedi
when update_cdma_locked() is invoked, CDMA is not running implies that the queue is cleared and we can return immediately. Bug 960487 Change-Id: I599027906dc405f4490590443d4f4d5a3202b5b0 Reviewed-on: http://git-master/r/96650 (cherry picked from commit f297b4812d15540f4b14c87178662a7ca6575ce9) Reviewed-on: http://git-master/r/99994 Reviewed-by: Varun Colbert <vcolbert@nvidia.com> Tested-by: Varun Colbert <vcolbert@nvidia.com>
2012-05-04video: tegra: host: Clean up includesTerje Bergstrom
Clean up #includes. Replace #includes with forward declarations where possible, and remove extraneous #includes. Bug 871237 Change-Id: I6942e0c632b42ad7009589ebdd78def88ae4baa4 Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com> Reviewed-on: http://git-master/r/99046 Reviewed-by: Automatic_Commit_Validation_User Reviewed-by: Mayuresh Kulkarni <mkulkarni@nvidia.com> GVS: Gerrit_Virtual_Submit Reviewed-by: Juha Tukkinen <jtukkinen@nvidia.com>
2012-05-04ARM: tegra: enterprise: Limit holdoff set for 533MHzRay Poudrier
Bug 935079 Signed-off-by: Ray Poudrier <rapoudrier@nvidia.com> Reviewed-on: http://git-master/r/86009 (cherry picked from commit 83eb3734f76e598d570dd9624e7e06f8b3e05afe) Change-Id: I5911670e7c1e8dd5fc4e89d4be21b9dcbc4c9085 Reviewed-on: http://git-master/r/98535 Reviewed-by: Automatic_Commit_Validation_User Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com> Reviewed-by: Raymond Poudrier <rapoudrier@nvidia.com> Tested-by: Raymond Poudrier <rapoudrier@nvidia.com>
2012-05-04media: video: tegra: ov5650: read sensor fuse idCharlie Huang
The sequence of read fuse id is: 1. write to OTP index register 0x3d00. 2. read out byte from ox3d04. 3. repeat step 1 to the next byte with its index respectively. also fixed ov5650_read_reg always fail issue. bug 957657 Change-Id: I649a7765320d0d4be8111a7f523d8487b872b620 Signed-off-by: Charlie Huang <chahuang@nvidia.com> Reviewed-on: http://git-master/r/98330 Reviewed-by: Automatic_Commit_Validation_User Reviewed-by: Wei Chen <wechen@nvidia.com> Reviewed-by: Frank Chen <frankc@nvidia.com> Reviewed-by: Jon Mayo <jmayo@nvidia.com>
2012-05-04ARM: tegra: Enable ARM errata 716044 for Tegra2.Krishna Reddy
Change-Id: Id71da6f6371f337f913d981f6d121c3fb2561a41 Signed-off-by: Krishna Reddy <vdumpa@nvidia.com> Reviewed-on: http://git-master/r/95915 Reviewed-by: Varun Colbert <vcolbert@nvidia.com> Tested-by: Varun Colbert <vcolbert@nvidia.com>
2012-05-04ARM: errata: 716044: an uncacheable load multiple can cause a deadlock.Krishna Reddy
Under some rare circumstances, an uncacheable load multiple instruction (LDRD, LDM, VLDM, VLD1, VLD2, VLD3, VLD4) can cause a processor deadlock. Change-Id: Ibd79aa8182dce37d0be9892f2310735e1123618a Signed-off-by: Krishna Reddy <vdumpa@nvidia.com> Reviewed-on: http://git-master/r/95914 Reviewed-by: Varun Colbert <vcolbert@nvidia.com> Tested-by: Varun Colbert <vcolbert@nvidia.com>
2012-05-04arm: tegra: Implement safe option for T30 pinmuxAshwini Ghuge
Bug 950086 Change-Id: I2eb129566bfea83b9a73d29f0c6443bdab087b65 Signed-off-by: Ashwini Ghuge <aghuge@nvidia.com> Reviewed-on: http://git-master/r/95518 Reviewed-by: Automatic_Commit_Validation_User Reviewed-by: Andy Park <andyp@nvidia.com> GVS: Gerrit_Virtual_Submit Reviewed-by: Laxman Dewangan <ldewangan@nvidia.com>
2012-05-04dmaengine/dma_slave: fix merge issue.Linqiang Pu
Change-Id: I0931f4ef7a5464dd32d8c703288a137fc77857ce Signed-off-by: Linqiang Pu <dpu@nvidia.com> Reviewed-on: http://git-master/r/100090 Reviewed-by: Automatic_Commit_Validation_User Reviewed-by: Laxman Dewangan <ldewangan@nvidia.com>
2012-05-03ARM: tegra2: clock: Put Tegra2 clocks to known statesJong Kim
Add TEGRA_PREINIT_CLOCKS option to put host1x, disp1, and video clocks into known state, so that L4T Ventana/Harmony works on u-boot. bug 967065 Change-Id: If7637b13e0daf1823fa0fe694a87870f4601e4df Signed-off-by: Jong Kim <jongk@nvidia.com> Reviewed-on: http://git-master/r/95734 Reviewed-by: Varun Colbert <vcolbert@nvidia.com> Tested-by: Varun Colbert <vcolbert@nvidia.com>
2012-05-03mfd: tps80031: fix missed irq issueSteve Kuo
We found missed irq could be happened if clear all INT_STS_x register in one time. Shadow register pushes the irq status after the first byte of INT_STS_x was cleared The proposed way to clear interrupt is to write only one INT_STS_x register. It will also clear the other two ones. Bug 952476 Reviewed-on: http://git-master/r/93453 Signed-off-by: Steve Kuo <stevek@nvidia.com> (cherry picked from commit 0c92f32e9e03defaeac991518b26134e59ef4db6) Change-Id: I76179be4847f59a1687926b9b0dde6ebd3f58aa4 Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com> Reviewed-on: http://git-master/r/100306
2012-05-03ARM: tegra: enterprise: register supply regulator before child regulatorLaxman Dewangan
LDO3 has the input from the VIO output and hence VIO should be register before LDO3 for regulator registration. bug 976254 Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com> Reviewed-on: http://git-master/r/99446 Change-Id: I6771af3e7eb93886e974695ab3550cdf8ebc52c4 Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com> Reviewed-on: http://git-master/r/100262 Reviewed-by: Automatic_Commit_Validation_User
2012-05-03ARM: tegra: whistler: Set I2c pin drive strength to maxLaxman Dewangan
Setting i2c drive strenth to maximum and pulling all pins to high. bug 951052 bug 958415 bug 927583 Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com> Reviewed-on: http://git-master/r/91805 Change-Id: Ia2bf4ccba6d4c47411e59fb9567dc4e3c2db76ae Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com> Reviewed-on: http://git-master/r/100261 Reviewed-by: Automatic_Commit_Validation_User
2012-05-03ARM: tegra: ventana: Set drive strength to max for all i2c pinsLaxman Dewangan
Setting drive strength to maiximum for all i2c pins. Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com> Reviewed-on: http://git-master/r/91952 Change-Id: I8882dd238af34e06c924f2e160d0897111e8103d Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com> Reviewed-on: http://git-master/r/100260 Reviewed-by: Automatic_Commit_Validation_User
2012-05-03ARM: tegra: whistler: Add slave address for i2c driverLaxman Dewangan
Configuring all i2c controller to have slave addresss to 0xFC (unused slave address) to avoid responding the slave with general call address. Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com> Reviewed-on: http://git-master/r/91951 Change-Id: Id1a45f46cfc5ffa3a48b01c0bae71c4ee9ab699b Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com> Reviewed-on: http://git-master/r/100259 Reviewed-by: Automatic_Commit_Validation_User
2012-05-03Revert "video: tegra: dc: Set default videomode"Hunk Lin
This reverts commit 9349cedf17f9b3c10760c8d48f831473f87a3a15. It is reviewed on http://git-master/r/99635 It will cause HDMI power ON and emc clock bump up to 667Mhz after resume from LP0. bug 930136 Change-Id: I130494fdb381b3d322ac0e3fc8be2e44f2c2d7a7 Signed-off-by: Hunk Lin <hulin@nvidia.com> Reviewed-on: http://git-master/r/100202 Reviewed-by: Automatic_Commit_Validation_User Reviewed-by: Jon Mayo <jmayo@nvidia.com>
2012-05-03ARM: tegra: power: Enforce CPU rate range in min cpu notifierAlex Frid
On Tegra3 make sure cpu rate is within G-mode range before LP to G mode switch triggered by minimum CPUs notifier. Bug 964208 Change-Id: Ic4ee6bc7eca5ad0902da4907e4702f296a155280 Signed-off-by: Alex Frid <afrid@nvidia.com> Reviewed-on: http://git-master/r/99834 Reviewed-by: Automatic_Commit_Validation_User Reviewed-by: Yu-Huan Hsu <yhsu@nvidia.com>
2012-05-03arm: tegra: enterprise: Set gpio LCD_D8 to tristateKarthik Ramakrishnan
LCD_D8 used for BAT_REMOVAL staus from PMU to be programmed as input/tristate to in line with hardware schematics. It is connected VIO_IN Bug 955519 (Cherry picked from I692d8d805c54da3996c33b9837b197a6995689c8) Change-Id: I68e6566249675cd5fce8aa954983478e4fc29a4c Reviewed-On: http://git-master/r/#change,91589 Signed-off-by: Karthik Ramakrishnan <karthikr@nvidia.com> Reviewed-on: http://git-master/r/99742 Reviewed-by: Automatic_Commit_Validation_User Reviewed-by: Yu-Huan Hsu <yhsu@nvidia.com>