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Change-Id: I6584c856356d6be123a66731bde414e4925ffe07
Reviewed-on: http://git-master/r/111184
Reviewed-by: Rohan Somvanshi <rsomvanshi@nvidia.com>
Tested-by: Rohan Somvanshi <rsomvanshi@nvidia.com>
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Bug 995402
Change-Id: I53e9f1801d3b37626abb89c67b4e63662dab8c65
Reviewed-on: http://git-master/r/111306
Reviewed-by: Simone Willett <swillett@nvidia.com>
Tested-by: Simone Willett <swillett@nvidia.com>
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We support 3 different aggressiveness levels of disabling DSI runtime.
The larger the aggressive level is, the higher DSI power we can save.
Bug 936337
Change-Id: Idadcb49b364e29ddd0a05dde1c6d3dfda6cd493e
Signed-off-by: Kevin Huang <kevinh@nvidia.com>
Reviewed-on: http://git-master/r/106361
Reviewed-by: Simone Willett <swillett@nvidia.com>
Tested-by: Simone Willett <swillett@nvidia.com>
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Boost CPU frequency to ensure the modem core dump can be transfered
before the BT3 watchdog timeout.
Bug 975990
Signed-off-by: Steve Lin <stlin@nvidia.com>
Reviewed-on: http://git-master/r/109325
(cherry picked from commit 028155da1b31742b0133dbad62fe5a6a66f2bf1e)
Change-Id: I9e7960c11521f011bcbd5566bb40fa780723b49f
Reviewed-on: http://git-master/r/104038
Reviewed-by: Uday Raval <uraval@nvidia.com>
Reviewed-by: Automatic_Commit_Validation_User
Tested-by: Steve Lin <stlin@nvidia.com>
GVS: Gerrit_Virtual_Submit
Reviewed-by: Steve Lin <stlin@nvidia.com>
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1. Add sysfs file so the fild can load/unload host controller before
modem power cycle.
2. Move modem boot irq to modem PM driver.
3. Add short autosuspend to optimize power consumption if the wake
source of system resume is not modem.
4. Avoid LP0 abort if remote wakeup happens during L0/L2 -> L3
transition.
5. Fix deadlock in pm_notifier function.
Bug 975990
Signed-off-by: Steve Lin <stlin@nvidia.com>
Reviewed-on: http://git-master/r/109079
(cherry picked from commit 0b60aade303a022ff3335b4a238ba2dbae4da4b5)
Change-Id: I9bcac40e2f93f95c702b42a2eb5e4e9aa7a9d721
Reviewed-on: http://git-master/r/103981
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Uday Raval <uraval@nvidia.com>
Tested-by: Steve Lin <stlin@nvidia.com>
GVS: Gerrit_Virtual_Submit
Reviewed-by: Steve Lin <stlin@nvidia.com>
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Observed glitch on STROBE line during HSIC resume.
This is because after removing the TX circuit power down,
HSIC controller is keeping in reset to program
phy parameters. TX circuit is driving low on STROBE line until
controller removed out of reset.
Now corrected the code to remove power down after setting phy
parameters and removed the reset on HSIC controller.
Bug 991709
Change-Id: I4966ea92752d2e5c6ea7042a6c5fb8707cf6bb35
Signed-off-by: Vinod Atyam <vatyam@nvidia.com>
Reviewed-on: http://git-master/r/110112
Reviewed-by: Simone Willett <swillett@nvidia.com>
Tested-by: Simone Willett <swillett@nvidia.com>
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Allow to configure the rail into sleep-off mode even if
the external req is not supported for a regulator.
bug 979143
Change-Id: I3c1bd789410b557a2ffc3133ca15ec3753ed2004
Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
Reviewed-on: http://git-master/r/110881
Reviewed-by: Automatic_Commit_Validation_User
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Clean RTC alarm and don't set new alarm during shutdown process.
After powering off, we do not want Maxim PMIC automaticly boots caused
by RTC alarm.
Bug 985193
Signed-off-by: Haley Teng <hteng@nvidia.com>
Reviewed-on: http://git-master/r/104773
(cherry picked from commit 0bd7f3163f73ba3cf87dadd6bc6fa35a538ac153)
Change-Id: I7209407503b9f51dfb5b8f59d05c6fa8f04c6069
Signed-off-by: Jinyoung Park <jinyoungp@nvidia.com>
Reviewed-on: http://git-master/r/110858
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>
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Added fence read in Tegra3 emc clock change procedure.
Change-Id: I2162affb4dddcacf38057e07ff6fbd5964643188
Signed-off-by: Alex Frid <afrid@nvidia.com>
Reviewed-on: http://git-master/r/106956
Reviewed-by: Rohan Somvanshi <rsomvanshi@nvidia.com>
Tested-by: Rohan Somvanshi <rsomvanshi@nvidia.com>
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Add support for another XMM modem.
Bug 996038
Change-Id: I392a18284b372fbc80c581b31b21af3c072bf4d3
Signed-off-by: Michael Hsu <mhsu@nvidia.com>
Reviewed-on: http://git-master/r/110193
(cherry picked from commit bdad2e9c1b195c8f7fcc3216f2bf27ea99dfd597)
Reviewed-on: http://git-master/r/110941
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Vinayak Pane <vpane@nvidia.com>
GVS: Gerrit_Virtual_Submit
Reviewed-by: Steve Lin <stlin@nvidia.com>
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Modified device info element for PH450 and Tango to
sync with framework.
Change-Id: I325571358f8c1875484254a9f497c606adb03180
Signed-off-by: Mohan T <mohant@nvidia.com>
Reviewed-on: http://git-master/r/110765
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Reviewed-by: Matthieu Vincenot <mvincenot@nvidia.com>
Reviewed-by: Steve Lin <stlin@nvidia.com>
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* NVC config change added to make code inline with
generic NVC framework, but it is introducing camera
crash after reboot issue on pm269.
* Make code identical to what was there earlier to fix
above regression.
Bug 998465
Change-Id: I8510ef3427b218481c5e36c952056dda799080f6
Signed-off-by: Sudhir vyas <svyas@nvidia.com>
Reviewed-on: http://git-master/r/109523
(cherry picked from commit 7e642946895848829bb6405bc675062c86907eb4)
Reviewed-on: http://git-master/r/110087
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>
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Gcov's internal data structures, on which the kernel depends on, have
changed in GCC 4.6. This patch adds support for GCC 4.6 and should still
work on GCC 4.4 too.
For reference, look at 'struct gcov_fn_info' in GCC's 'gcc/gcov-io.h',
near line 698:
https://android.googlesource.com/toolchain/gcc/+/master/gcc-4.4.3/
https://android.googlesource.com/toolchain/gcc/+/master/gcc-4.6/
Bug 1003822
Change-Id: I527736f944c80b8b345d1685669c0b99eb38fb66
Signed-off-by: Tuomas Tynkkynen <ttynkkynen@nvidia.com>
Reviewed-on: http://git-master/r/110073
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Juha Tukkinen <jtukkinen@nvidia.com>
Tested-by: Juha Tukkinen <jtukkinen@nvidia.com>
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It seems with building with different tool chains, when compiling
nvhost_acm it doesn't end up with drivers/video/tegra/host in its
include path and therefore it fails to find some header files.
Signed-off-by: Rhyland Klein <rklein@nvidia.com>
Change-Id: Ic3d72c863d4b5e501222d21077ba9735315ec65c
Reviewed-on: http://git-master/r/110592
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Allen Martin <amartin@nvidia.com>
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
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Bug 961009
Change-Id: Ifdcc7bc8a40d270e70a63329f46caff541bf01e2
Signed-off-by: Mayuresh Kulkarni <mkulkarni@nvidia.com>
Reviewed-on: http://git-master/r/109461
Reviewed-by: Rohan Somvanshi <rsomvanshi@nvidia.com>
Tested-by: Rohan Somvanshi <rsomvanshi@nvidia.com>
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Panel power on/off sequence should meet the panel spec as below.
power on:
1. EN_VDD_PNL
2. PCLK
3. LVDS_EN
4. LCD_BL_PWN
power off:
1. LCD_BL_PWN
2. LVDS_EN
3. PCLK
4. EN_VDD_PNL
Pixel clock on/off is controlled by dc driver, we need to separate the
setting of panel enable/disable into two parts. The first, i.e., before
pclk on/off, is done in kai_panel_enable()/kai_panel_prepoweroff().
And the second part, i.e., after pclk on/off, is done in
kai_panel_postpoweron()/kai_panel_disable().
bug 976081
Signed-off-by: Ken Chang <kenc@nvidia.com>
Reviewed-on: http://git-master/r/102555
Reviewed-by: Artiste Hsu <chhsu@nvidia.com>
Reviewed-by: Prajakta Gudadhe <pgudadhe@nvidia.com>
(cherry picked from commit 8149532e20729c359eb1680297f19a8f46343054)
Change-Id: Ifc0d60c2caabf60f4186179e64756a4caabf9af6
Reviewed-on: http://git-master/r/110297
Tested-by: Ken Chang <kenc@nvidia.com>
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Artiste Hsu <chhsu@nvidia.com>
Reviewed-by: Jon Mayo <jmayo@nvidia.com>
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Part of panel settings need to be done before/after pixel clock
is disabled. Add support for these actions to meet panel
spec.
bug 976081
Signed-off-by: Ken Chang <kenc@nvidia.com>
Reviewed-on: http://git-master/r/102542
Reviewed-by: Lokesh Pathak <lpathak@nvidia.com>
Tested-by: Lokesh Pathak <lpathak@nvidia.com>
(cherry picked from commit dcecdc64d4d0fd4d9f69df52c9d200dfbf1dd7fc)
Change-Id: Ibfede68d67a4815156f73c2d1cdca90f3f771755
Reviewed-on: http://git-master/r/110296
Reviewed-by: Simone Willett <swillett@nvidia.com>
Tested-by: Simone Willett <swillett@nvidia.com>
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Stop and add pcie devices to probe the devices
again in order to have correct value of irq which
was not, at first probe while resume.
Bug 956573
Change-Id: I8d497116350ad263c4ae3053cd429393a0f0bc99
Signed-off-by: Jay Agarwal <jagarwal@nvidia.com>
Reviewed-on: http://git-master/r/110556
Reviewed-by: Simone Willett <swillett@nvidia.com>
Tested-by: Simone Willett <swillett@nvidia.com>
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1. do power off on suspend and power on while
resume and other initialization.
2. call same functionality as suspend/resume
for disconnect/connect of hotplug also.
Bug 946385
Change-Id: Ic6906a8641f418cc3e5ee86beaf6fb3f71081174
Signed-off-by: Jay Agarwal <jagarwal@nvidia.com>
Reviewed-on: http://git-master/r/110343
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>
GVS: Gerrit_Virtual_Submit
Reviewed-by: Varun Wadekar <vwadekar@nvidia.com>
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UARTE pin directions were set as per the old pinmux sheet.
Updated the pinmux as per the sheet revision #18
//syseng/Projects/P1852/PinMux/T30_PinMux_for_P1852.xls
Bug 991591
Change-Id: I50cf05659e4970882dffc1cd268718e64c886a23
Signed-off-by: sreenivasulu velpula <svelpula@nvidia.com>
Reviewed-on: http://git-master/r/109762
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Mohit Kataria <mkataria@nvidia.com>
GVS: Gerrit_Virtual_Submit
Reviewed-by: Sandeep Trasi <strasi@nvidia.com>
Reviewed-by: Varun Wadekar <vwadekar@nvidia.com>
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1. Do add port and rescan in resume
2. Assert pcie xclk on power on
3. Remove all bus and devices in suspend
4. Enable msi once after resume also
5. Remove Most of hacks for save and restore
config spaces
Bug 959642
Bug 956573
Change-Id: Ibfa6902ad1aa2ed0d97f7fe1e305287e38ea0be1
Signed-off-by: Jay Agarwal <jagarwal@nvidia.com>
Reviewed-on: http://git-master/r/109700
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>
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- add public APIs for power & sync-point management
- all these APIs end with string _ext
- all these APIs can be found in linux/nvhost.h
- all these APIs take nvhost_device as first argument
- all these APIs are based on the fact that host1x hardware
driver is parent of all the host1x client driver
- this allows clients of host1x which are outside host1x
driver code to just include nvhost.h & use host1x driver
interfaces
- this also hides the implementation details of power &
sync-point inside host1x driver code
- move sync point ids for dc and nvavp to nvhost.h
Bug 961009
Change-Id: I1a9ca074df87656c4d4bd246853e039a7850d56a
Signed-off-by: Mayuresh Kulkarni <mkulkarni@nvidia.com>
Reviewed-on: http://git-master/r/109219
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
GVS: Gerrit_Virtual_Submit
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Original change(commit dfa3daebbc8dbe3ccc8e72400359dfce29053222) to fix
LP0 error is already merged but the error is still there
due to porting issue to main branch.
This change fixes LP0 problem caused by porting to main.
Change-Id: I925407dc6c7fe0caca5ea33e3830a857b26e151c
Signed-off-by: Hyungwoo Yang <hyungwooy@nvidia.com>
Reviewed-on: http://git-master/r/109376
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Reviewed-by: Dan Willemsen <dwillemsen@nvidia.com>
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PWR_I2C (i2c5) clock rate is set to 400khz.
Bug 1001924
Change-Id: I7b5593742a0b208aea2ad0d83ecac2078f458534
Signed-off-by: Chaitanya Bandi <bandik@nvidia.com>
Reviewed-on: http://git-master/r/109954
Reviewed-by: Simone Willett <swillett@nvidia.com>
Tested-by: Simone Willett <swillett@nvidia.com>
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Bug 1000789
Bug 1003730
Change-Id: I7fbd703dde2044f2790e6a9b356ef8dca89ad8f3
Signed-off-by: Kevin Huang <kevinh@nvidia.com>
Reviewed-on: http://git-master/r/110146
Reviewed-by: Varun Colbert <vcolbert@nvidia.com>
Tested-by: Varun Colbert <vcolbert@nvidia.com>
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Restore the AP/modem handshaking functions and clean up the null
phy driver.
Bug 996035
Signed-off-by: Steve Lin <stlin@nvidia.com>
Reviewed-on: http://git-master/r/109044
(cherry picked from commit ff27e8a48a53fe70949d95915f62dd2e03c73df7)
Change-Id: I12a2401a7fcc540a657ab15378d440ef85561001
Reviewed-on: http://git-master/r/110145
Reviewed-by: Automatic_Commit_Validation_User
Tested-by: Steve Lin <stlin@nvidia.com>
Reviewed-by: Steve Lin <stlin@nvidia.com>
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During programming of a frame or at frame end, force the use of the new EMC
bandwidth instead of the previous frame's bandwidth.
Moved copy of new_bandwidth out of tegra_dc_set_latency_allowance() to match
the semantics of the rest of tegra_dc_program_bandwidth().
bug 949015
Change-Id: I881f3a2c75f3438e3bbb3208b518f15a4574bc91
Signed-off-by: Jon Mayo <jmayo@nvidia.com>
Reviewed-on: http://git-master/r/110149
Reviewed-by: Automatic_Commit_Validation_User
Tested-by: Daniel Solomon <daniels@nvidia.com>
Reviewed-by: Kevin Huang (Eng-SW) <kevinh@nvidia.com>
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Enabling ALS and Proximity sensor ISL29028 for Tegra3 boards in L4T
defconfig. Also, Disabling the ISL sensors which are not present on
Tegra3 boards.
Bug 876339
Change-Id: I22c318a43b0c5fe667e89c9dd9f99c84a368c8f9
Reviewed-on: http://git-master/r/110065
Reviewed-by: Rohan Somvanshi <rsomvanshi@nvidia.com>
Tested-by: Rohan Somvanshi <rsomvanshi@nvidia.com>
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Enables the Active State Power Management (ASPM) support
in the PCIe framework
Bug 815499
Change-Id: I76f9fc6a5b6feed8e47e5a4a3825b71c487b79ed
Signed-off-by: Vidya Sagar <vidyas@nvidia.com>
Reviewed-on: http://git-master/r/109747
Reviewed-by: Rohan Somvanshi <rsomvanshi@nvidia.com>
Tested-by: Rohan Somvanshi <rsomvanshi@nvidia.com>
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Update wiphy (wireless hardware description) to
support 5 GHz scan.
Bug 1000888
Change-Id: I1a7a99f97f69dd8f1790f81ee0fb21e209e8d10e
Signed-off-by: Nitin Bindal <nbindal@nvidia.com>
Reviewed-on: http://git-master/r/109556
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Rakesh Kumar <krakesh@nvidia.com>
Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>
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Compile power management suspend and resume functions only when
CONFIG_PM is enabled.
Change-Id: If349984d62ed002594ba60ac25cd4dddd956aa6c
Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com>
Reviewed-on: http://git-master/r/109425
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Mayuresh Kulkarni <mkulkarni@nvidia.com>
Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>
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Change-Id: I2a5f0c9305bd53c42df181556d97efa5d6792ad7
Signed-off-by: Krishna Reddy <vdumpa@nvidia.com>
Reviewed-on: http://git-master/r/106500
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Bo Yan <byan@nvidia.com>
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Change-Id: I86e68c57846fe14de7620edf4c241ad7d9e46df2
Signed-off-by: Krishna Reddy <vdumpa@nvidia.com>
Reviewed-on: http://git-master/r/106491
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Aleksandr Frid <afrid@nvidia.com>
Reviewed-by: Satya Popuri <spopuri@nvidia.com>
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Distributions may wish to provide different defaults for PCIE ASPM
depending on their target audience. Provide a configuration option for
choosing the default policy.
Bug 815499
(cherry picked from commit ad71c96213a68dfe6d761e3ff7ac7ac267fd612a
http://git.kernel.org/?p=linux/kernel/git/torvalds/linux-2.6.git;
a=commitdiff;h=ad71c96213a68dfe6d761e3ff7ac7ac267fd612a)
Change-Id: I36bd72517af0cf8d637552e66b18afe576e72c20
Signed-off-by: Matthew Garrett <mjg@redhat.com>
Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
Signed-off-by: Vidya Sagar <vidyas@nvidia.com>
Reviewed-on: http://git-master/r/109739
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>
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rfkill-gpio driver is available in linux delivery as a generic rfkill driver.
use rfkill-gpio driver to perform bluetooth RFKILL gpio activities, instead of
bcm4329 rfkill driver.
Bug 993990
Signed-off-by: Nagarjuna Kristam <nkristam@nvidia.com>
Change-Id: I654b93f099431029177913605d15ad921df07833
Reviewed-on: http://git-master/r/108499
Reviewed-by: Simone Willett <swillett@nvidia.com>
Tested-by: Simone Willett <swillett@nvidia.com>
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Bug 815499
Change-Id: I6ce9a2bb4afbfd797fc5a0bf0d1027bdc0c1459d
Signed-off-by: Vidya Sagar <vidyas@nvidia.com>
Reviewed-on: http://git-master/r/109745
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>
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Check for valid entry on the message queue before
reading the transfer list from queue. If queue is
empty then do not start transfer.
Change-Id: If51a816780ab76700a7a1d7d8a025a3544590ad1
Signed-off-by: Ashwini Ghuge <aghuge@nvidia.com>
Reviewed-on: http://git-master/r/109469
Reviewed-by: Simone Willett <swillett@nvidia.com>
Tested-by: Simone Willett <swillett@nvidia.com>
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When any error occurs in spi communication,
dump the spi registers for debug purpose
Change-Id: I5cf226d4b504c95a6abb8dcf5b8c0ba1ef44271c
Signed-off-by: Ashwini Ghuge <aghuge@nvidia.com>
Reviewed-on: http://git-master/r/109466
Reviewed-by: Simone Willett <swillett@nvidia.com>
Tested-by: Simone Willett <swillett@nvidia.com>
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When computing required words for a transfer,
limit this to max possible size on given
sub transfer
Change-Id: Ia1a9290ae389e36ecb5a8d03be2982885a544a33
Signed-off-by: Ashwini Ghuge <aghuge@nvidia.com>
Reviewed-on: http://git-master/r/109462
Reviewed-by: Simone Willett <swillett@nvidia.com>
Tested-by: Simone Willett <swillett@nvidia.com>
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Bug 995706
During device shutdown/rebooting, runtime PM is disabled. SPI bus
driver will fail to call tegra_spi_runtime_resume() to resume the
clock needed by tranferring. In this case, do not start transferring.
Change-Id: I42cc0763f55b6c90df00fbad68794939e903199a
Signed-off-by: Johnny Qiu <joqiu@nvidia.com>
Reviewed-on: http://git-master/r/109458
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Reviewed-by: Laxman Dewangan <ldewangan@nvidia.com>
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When a DC window is being released, a NULL flip is used to indicate
that the window should be disabled. To disable a window, 0 is
written to WIN_OPTIONS.
The MC_DECERR on window shutdown is a symptom of forgetting step 2)
below when disabling windows, leaving no indication that there is
anything to wait for. This causes DC to erroneously unpin the
scanout buffer while the buffer is still actively being used.
Summary of flip (window update) synchronization in DC:
1) program some window registers
2) set win->dirty=1
3) schedule the activation of the registers
4) request VBLANK or HBLANK interrupts
5) wait for win->dirty==0
In the trigger_windows ISR (every VBLANK or HBLANK):
1) if there is no window update pending in HW, clear dirty flag to
indicate that ACTIVE registers are up-to-date.
bug 991572
bug 995614
bug 989119
bug 983251
bug 960424
bug 866711
Change-Id: I8b710aac874b202838c3989608b7e0bd15425382
Signed-off-by: Adam Cheney <acheney@nvidia.com>
Reviewed-on: http://git-master/r/109370
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Robert Morell <rmorell@nvidia.com>
Reviewed-by: Nirav Patel <nipatel@nvidia.com>
Reviewed-by: Jon Mayo <jmayo@nvidia.com>
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Get rid of maybe-uninitialized warning when using 4.6 toolchain.
Bug 999222
Change-Id: Ic8e944eaba281cdea45950b61f93093ff0e59f20
Signed-off-by: Juha Tukkinen <jtukkinen@nvidia.com>
Reviewed-on: http://git-master/r/109553
Reviewed-by: Automatic_Commit_Validation_User
Tested-by: Stefan Becker <stefanb@nvidia.com>
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
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Initialize a variable to avoid a compiler warning and a potential bug.
Bug 999222
Change-Id: I77724b21d20049340943856c8d00af5e067c206a
Signed-off-by: Juha Tukkinen <jtukkinen@nvidia.com>
Reviewed-on: http://git-master/r/109552
Reviewed-by: Automatic_Commit_Validation_User
Tested-by: Stefan Becker <stefanb@nvidia.com>
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
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Make all chip specific functions static. Include the chip specific
functions in SoC files after including the hardware headers. This
makes the chip specific functions to be compiled per SoC, and with
the correct hardware definitions.
Bug 982965
Change-Id: I4774d4dc351951cb886d9d4da66cf021f3f0121e
Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com>
Reviewed-on: http://git-master/r/107581
Reviewed-by: Automatic_Commit_Validation_User
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Based on the kernel command line argument, this change will register the
UARTD for the tegra_uart driver, instead of the serial8250. Hence we can
put the harmony for the UART automation test.
Bug 991545
Change-Id: I5e637c73f4ce352fb615453121d14e2874e51a53
Signed-off-by: Ramalingam C <ramalingamc@nvidia.com>
Reviewed-on: http://git-master/r/106755
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Mursalin Akon <makon@nvidia.com>
GVS: Gerrit_Virtual_Submit
Reviewed-by: Laxman Dewangan <ldewangan@nvidia.com>
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It fixes the issue where cpu governor change
was inconsistent across platforms.
In T2x, AUTO HOTPLUG is disabled therefore we need
to store/restore gov for all online cpus across
LP0 cycle.
In T3x, AUTO HOTPLUG is enabled therefore storing/restoring
gov for Cpu0 across LP0 cycle. Cpu0 remains online in suspend
and resume.
bug 991081
Change-Id: I167654aa21e4832b3fdc40e3d388a4d3f984632b
Signed-off-by: Puneet Saxena <puneets@nvidia.com>
Reviewed-on: http://git-master/r/105404
Reviewed-by: Simone Willett <swillett@nvidia.com>
Tested-by: Simone Willett <swillett@nvidia.com>
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Adding new sysfs entry for product revision which is needed by
mNAND health and status user space tool.
Bug 974823.
Change-Id: I4a07a5e6c1c81e2b7a4c1ed024e987e06f9f87c8
Signed-off-by: Vishal Singh <vissingh@nvidia.com>
Reviewed-on: http://git-master/r/103366
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Sandeep Trasi <strasi@nvidia.com>
Reviewed-by: Luis Dib <ldib@nvidia.com>
Reviewed-by: Sachin Nikam <snikam@nvidia.com>
Reviewed-by: Pavan Kunapuli <pkunapuli@nvidia.com>
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Give names to the structures inside nvhost_chip_support. This way
they can be referred to individually.
Change-Id: I9b727bfc232d11957a8bd3e3570583d47cff778e
Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com>
Reviewed-on: http://git-master/r/109103
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Mayuresh Kulkarni <mkulkarni@nvidia.com>
Reviewed-by: Juha Tukkinen <jtukkinen@nvidia.com>
Reviewed-by: Ken Adams <kadams@nvidia.com>
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Remove unused functions in CDMA and debug. They were left unused
when debug dump started using sync queue instead of channel
registers for detecting current position.
Change-Id: Ib1f0bc8f702667d0453079e6d5f5d8ca08f8db09
Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com>
Reviewed-on: http://git-master/r/109102
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Mayuresh Kulkarni <mkulkarni@nvidia.com>
Reviewed-by: Juha Tukkinen <jtukkinen@nvidia.com>
Reviewed-by: Ken Adams <kadams@nvidia.com>
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Call drain fifo and save context functions via nvhost_chip_support.
Earlier client drivers called into host1x code directly, which
makes each client driver SoC specific.
Change-Id: I4f805abad21012e59e11bf6a98fa46441c71c51a
Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com>
Reviewed-on: http://git-master/r/109101
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Mayuresh Kulkarni <mkulkarni@nvidia.com>
Reviewed-by: Juha Tukkinen <jtukkinen@nvidia.com>
Reviewed-by: Ken Adams <kadams@nvidia.com>
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