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Export tegra_powergate_is_powered() for use by modules.
Change-Id: I8cfbb8aeb95dca00cbf6ef0c8c2bd189afeb62b6
Signed-off-by: Antti P Miettinen <amiettinen@nvidia.com>
Reviewed-on: http://git-master/r/97724
Reviewed-by: Varun Colbert <vcolbert@nvidia.com>
Tested-by: Varun Colbert <vcolbert@nvidia.com>
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Disable internal temperature sensor and enable external temperature
sensor.
This is a modified version of change
74db6e22d316a95630d3059644fbc55e2620cb9b
Bug 954134
Change-Id: Id64bb93a09e1701165ad1f82e08bb92e61425873
Signed-off-by: Daniel Solomon <daniels@nvidia.com>
Reviewed-on: http://git-master/r/96285
Reviewed-by: Varun Colbert <vcolbert@nvidia.com>
Tested-by: Varun Colbert <vcolbert@nvidia.com>
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Waking up system through the tegra gpio inplace of ricoh onkey
when using the ricoh based pmu.
bug 978922
Change-Id: If9c5baffa42aca5fcc7d6238c5cf122a136e7760
Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
Reviewed-on: http://git-master/r/100351
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Bitan Biswas <bbiswas@nvidia.com>
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when update_cdma_locked() is invoked, CDMA is not running
implies that the queue is cleared and we can return immediately.
Bug 960487
Change-Id: I599027906dc405f4490590443d4f4d5a3202b5b0
Reviewed-on: http://git-master/r/96650
(cherry picked from commit f297b4812d15540f4b14c87178662a7ca6575ce9)
Reviewed-on: http://git-master/r/99994
Reviewed-by: Varun Colbert <vcolbert@nvidia.com>
Tested-by: Varun Colbert <vcolbert@nvidia.com>
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Clean up #includes. Replace #includes with forward declarations where
possible, and remove extraneous #includes.
Bug 871237
Change-Id: I6942e0c632b42ad7009589ebdd78def88ae4baa4
Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com>
Reviewed-on: http://git-master/r/99046
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Mayuresh Kulkarni <mkulkarni@nvidia.com>
GVS: Gerrit_Virtual_Submit
Reviewed-by: Juha Tukkinen <jtukkinen@nvidia.com>
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Bug 935079
Signed-off-by: Ray Poudrier <rapoudrier@nvidia.com>
Reviewed-on: http://git-master/r/86009
(cherry picked from commit 83eb3734f76e598d570dd9624e7e06f8b3e05afe)
Change-Id: I5911670e7c1e8dd5fc4e89d4be21b9dcbc4c9085
Reviewed-on: http://git-master/r/98535
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>
Reviewed-by: Raymond Poudrier <rapoudrier@nvidia.com>
Tested-by: Raymond Poudrier <rapoudrier@nvidia.com>
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The sequence of read fuse id is:
1. write to OTP index register 0x3d00.
2. read out byte from ox3d04.
3. repeat step 1 to the next byte with its index respectively.
also fixed ov5650_read_reg always fail issue.
bug 957657
Change-Id: I649a7765320d0d4be8111a7f523d8487b872b620
Signed-off-by: Charlie Huang <chahuang@nvidia.com>
Reviewed-on: http://git-master/r/98330
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Wei Chen <wechen@nvidia.com>
Reviewed-by: Frank Chen <frankc@nvidia.com>
Reviewed-by: Jon Mayo <jmayo@nvidia.com>
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Change-Id: Id71da6f6371f337f913d981f6d121c3fb2561a41
Signed-off-by: Krishna Reddy <vdumpa@nvidia.com>
Reviewed-on: http://git-master/r/95915
Reviewed-by: Varun Colbert <vcolbert@nvidia.com>
Tested-by: Varun Colbert <vcolbert@nvidia.com>
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Under some rare circumstances, an uncacheable load multiple
instruction (LDRD, LDM, VLDM, VLD1, VLD2, VLD3, VLD4) can cause
a processor deadlock.
Change-Id: Ibd79aa8182dce37d0be9892f2310735e1123618a
Signed-off-by: Krishna Reddy <vdumpa@nvidia.com>
Reviewed-on: http://git-master/r/95914
Reviewed-by: Varun Colbert <vcolbert@nvidia.com>
Tested-by: Varun Colbert <vcolbert@nvidia.com>
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Bug 950086
Change-Id: I2eb129566bfea83b9a73d29f0c6443bdab087b65
Signed-off-by: Ashwini Ghuge <aghuge@nvidia.com>
Reviewed-on: http://git-master/r/95518
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Andy Park <andyp@nvidia.com>
GVS: Gerrit_Virtual_Submit
Reviewed-by: Laxman Dewangan <ldewangan@nvidia.com>
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Change-Id: I0931f4ef7a5464dd32d8c703288a137fc77857ce
Signed-off-by: Linqiang Pu <dpu@nvidia.com>
Reviewed-on: http://git-master/r/100090
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Laxman Dewangan <ldewangan@nvidia.com>
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Add TEGRA_PREINIT_CLOCKS option to put host1x, disp1, and video clocks
into known state, so that L4T Ventana/Harmony works on u-boot.
bug 967065
Change-Id: If7637b13e0daf1823fa0fe694a87870f4601e4df
Signed-off-by: Jong Kim <jongk@nvidia.com>
Reviewed-on: http://git-master/r/95734
Reviewed-by: Varun Colbert <vcolbert@nvidia.com>
Tested-by: Varun Colbert <vcolbert@nvidia.com>
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We found missed irq could be happened if clear all INT_STS_x register in one time.
Shadow register pushes the irq status after the first byte of INT_STS_x was cleared
The proposed way to clear interrupt is to write only one INT_STS_x register.
It will also clear the other two ones.
Bug 952476
Reviewed-on: http://git-master/r/93453
Signed-off-by: Steve Kuo <stevek@nvidia.com>
(cherry picked from commit 0c92f32e9e03defaeac991518b26134e59ef4db6)
Change-Id: I76179be4847f59a1687926b9b0dde6ebd3f58aa4
Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
Reviewed-on: http://git-master/r/100306
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LDO3 has the input from the VIO output and hence VIO should be
register before LDO3 for regulator registration.
bug 976254
Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
Reviewed-on: http://git-master/r/99446
Change-Id: I6771af3e7eb93886e974695ab3550cdf8ebc52c4
Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
Reviewed-on: http://git-master/r/100262
Reviewed-by: Automatic_Commit_Validation_User
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Setting i2c drive strenth to maximum and pulling all pins
to high.
bug 951052
bug 958415
bug 927583
Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
Reviewed-on: http://git-master/r/91805
Change-Id: Ia2bf4ccba6d4c47411e59fb9567dc4e3c2db76ae
Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
Reviewed-on: http://git-master/r/100261
Reviewed-by: Automatic_Commit_Validation_User
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Setting drive strength to maiximum for all i2c pins.
Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
Reviewed-on: http://git-master/r/91952
Change-Id: I8882dd238af34e06c924f2e160d0897111e8103d
Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
Reviewed-on: http://git-master/r/100260
Reviewed-by: Automatic_Commit_Validation_User
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Configuring all i2c controller to have slave addresss to 0xFC
(unused slave address) to avoid responding the slave with general
call address.
Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
Reviewed-on: http://git-master/r/91951
Change-Id: Id1a45f46cfc5ffa3a48b01c0bae71c4ee9ab699b
Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
Reviewed-on: http://git-master/r/100259
Reviewed-by: Automatic_Commit_Validation_User
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This reverts commit 9349cedf17f9b3c10760c8d48f831473f87a3a15.
It is reviewed on http://git-master/r/99635
It will cause HDMI power ON and emc clock bump up to 667Mhz
after resume from LP0.
bug 930136
Change-Id: I130494fdb381b3d322ac0e3fc8be2e44f2c2d7a7
Signed-off-by: Hunk Lin <hulin@nvidia.com>
Reviewed-on: http://git-master/r/100202
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Jon Mayo <jmayo@nvidia.com>
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On Tegra3 make sure cpu rate is within G-mode range before LP to G
mode switch triggered by minimum CPUs notifier.
Bug 964208
Change-Id: Ic4ee6bc7eca5ad0902da4907e4702f296a155280
Signed-off-by: Alex Frid <afrid@nvidia.com>
Reviewed-on: http://git-master/r/99834
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Yu-Huan Hsu <yhsu@nvidia.com>
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LCD_D8 used for BAT_REMOVAL staus from PMU to be
programmed as input/tristate to in line with hardware
schematics. It is connected VIO_IN
Bug 955519
(Cherry picked from I692d8d805c54da3996c33b9837b197a6995689c8)
Change-Id: I68e6566249675cd5fce8aa954983478e4fc29a4c
Reviewed-On: http://git-master/r/#change,91589
Signed-off-by: Karthik Ramakrishnan <karthikr@nvidia.com>
Reviewed-on: http://git-master/r/99742
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Yu-Huan Hsu <yhsu@nvidia.com>
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Recent pinctrl discussions concluded that gpiolib APIs
should in fact do whatever is required to mux a GPIO onto
pins.
This change is based on the work done by Stephen Warren in mainline
kernel.
-----
commit 3e215d0a19c2a0c389bd9117573b6dd8e46f96a8
gpio: tegra: Hide tegra_gpio_enable/disable()
Recent pinctrl discussions concluded that gpiolib APIs should in fact do
whatever is required to mux a GPIO onto pins, by calling pinctrl APIs if
required. This change implements this for the Tegra GPIO driver, and removes
calls to the Tegra-specific APIs from drivers and board files.
----
Change-Id: I482ea5c177cf2ee6fa06ddac48b556f1508efacb
Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
Reviewed-on: http://git-master/r/98466
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Pritesh Raithatha <praithatha@nvidia.com>
Reviewed-by: Stephen Warren <swarren@nvidia.com>
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Bug 933653
Change-Id: If7ce4dc5129782a7e3487028d2dba01c9380ba90
Signed-off-by: Kevin Huang <kevinh@nvidia.com>
Reviewed-on: http://git-master/r/98256
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Aleksandr Frid <afrid@nvidia.com>
Reviewed-by: Animesh Kishore <ankishore@nvidia.com>
Reviewed-by: Yu-Huan Hsu <yhsu@nvidia.com>
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Added dsi fixed clock entry derived from PLLP_OUT3. This would allow
DC driver to properly ref-count implicit dependency of DSI operations
on PLLP_OUT3 clock.
Bug 933653
Change-Id: I71e6ada13f9d231c5a4924f345cdbf7cf05cd59e
Signed-off-by: Alex Frid <afrid@nvidia.com>
Reviewed-on: http://git-master/r/98103
Reviewed-by: Rohan Somvanshi <rsomvanshi@nvidia.com>
Tested-by: Rohan Somvanshi <rsomvanshi@nvidia.com>
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Set KB_ROW11 pin to default PULL_UP to fix
the excessive interrupts from nct alert.
Bug 973536
Change-Id: Idab3769f3fe1945f5e0f487f7bd23a7c0b58d5d1
Signed-off-by: Ashwini Ghuge <aghuge@nvidia.com>
Reviewed-on: http://git-master/r/99339
Reviewed-by: Bitan Biswas <bbiswas@nvidia.com>
Tested-by: Bitan Biswas <bbiswas@nvidia.com>
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Hunk Lin <hulin@nvidia.com>
Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>
GVS: Gerrit_Virtual_Submit
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This reverts commit 5dc206986103aaa443fa6b0ef6fef20bcb35d299 because
it causes noisy audio playback on Tegra3 platforms with secure-os.
Bug 939415
Change-Id: Ib19962dd57a2560945d1c0ed49b3eade2c751446
Signed-off-by: Bharat Nihalani <bnihalani@nvidia.com>
Reviewed-on: http://git-master/r/98986
Reviewed-by: Automatic_Commit_Validation_User
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Change wlan interface from mlan to wlan.
Bug 954218
Change-Id: I5b2b2840a4830eda908a47cc0fc59d0479a1df34
Signed-off-by: Narayan Reddy <narayanr@nvidia.com>
Reviewed-on: http://git-master/r/98997
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>
Reviewed-by: Rakesh Kumar <krakesh@nvidia.com>
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enable marvel driver as module to load at boot time
Bug 954218
Change-Id: I7dc6385dcbad7b7a7960b688c6d74bd6bc35cad9
Signed-off-by: Narayan Reddy <narayanr@nvidia.com>
Reviewed-on: http://git-master/r/98454
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>
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The CL disables SDIO card clock when idle for Tegra 3 only.
Bonus: conditional build for some tegra 3 functionalities.
Bug 975541
Change-Id: I097c4771f3565bf9137d7854ada10c1fe8535056
Signed-off-by: Mursalin Akon <makon@nvidia.com>
Reviewed-on: http://git-master/r/99707
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Allen Martin <amartin@nvidia.com>
Reviewed-by: Peer Chen <pchen@nvidia.com>
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Set window enabled flag in pan display. This fixes a blank
window display while switching console from dc_ext device to
framebuffer device, and allows dc_ext and fbdev to co-exist.
Removed previous work around to unblank fb from
tegra_dc_blank function.
Bug: 970263
Bug: 963480
Change-Id: I9853da211f78815246965d240d1717345c5ab391
Signed-off-by: Shashank Sharma <shashanks@nvidia.com>
Reviewed-on: http://git-master/r/99422
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Jon Mayo <jmayo@nvidia.com>
Reviewed-by: Kiran Adduri <kadduri@nvidia.com>
Reviewed-by: Allen Martin <amartin@nvidia.com>
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Allow setting bias level to turn off clock extern1 on KAI when
codec is idle. Added a dummy widgets to make the target_bias_level
to BIAS_OFF as per required by the new ALSA kernel.
Bug 964287
Change-Id: I628744040866a9879eedc41ed4ee25af38ed86fb
Signed-off-by: Manoj Gangwal <mgangwal@nvidia.com>
Reviewed-on: http://git-master/r/99667
Reviewed-by: Automatic_Commit_Validation_User
Tested-by: Hunk Lin <hulin@nvidia.com>
Reviewed-by: Scott Peterson <speterson@nvidia.com>
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Allow setting bias level to turn off clock extern1 when codec
is idle.
Bug 964287
Change-Id: I48056b86a9fdaea70202bee9326debaaddf69c0c
Signed-off-by: Manoj Gangwal <mgangwal@nvidia.com>
Reviewed-on: http://git-master/r/99665
Reviewed-by: Simone Willett <swillett@nvidia.com>
Tested-by: Simone Willett <swillett@nvidia.com>
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Allow setting bias level to turn off clock extern1 when codec
is idle.
Bug 964287
Reviewed on: http://git-master/r/#change,93950
Change-Id: Icc11e8bfb359b432f0bfd9ba214877259188de2b
Signed-off-by: Manoj Gangwal <mgangwal@nvidia.com>
Reviewed-on: http://git-master/r/99659
Reviewed-by: Automatic_Commit_Validation_User
Tested-by: Hunk Lin <hulin@nvidia.com>
Reviewed-by: Scott Peterson <speterson@nvidia.com>
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Set default videomode during the dc probe. This patch enables
HDMI during the probe only and fixes following issues:
1. Until Xinit there was no display on HDMI.
2. Framebuffer console on HDMI needs it to be enabled well before
Xinit.
Bug: 930136
Change-Id: Ieaf5c69eefa4a6584893425ad4fd772bcd91ea11
Signed-off-by: Shashank Sharma <shashanks@nvidia.com>
Reviewed-on: http://git-master/r/99635
Reviewed-by: Simone Willett <swillett@nvidia.com>
Tested-by: Simone Willett <swillett@nvidia.com>
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Bug 975433
MAX77663 driver hasn't implemented irq_set_wake(). Actually its
interrupt always wakes up AP. Set wakeup = false to reduce warning
messages in kernel.
Change-Id: Id4f43d7d2ba879c92846091e2062765de7ea477e
Signed-off-by: Johnny Qiu <joqiu@nvidia.com>
Reviewed-on: http://git-master/r/99536
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Venu Byravarasu <vbyravarasu@nvidia.com>
Reviewed-by: Bitan Biswas <bbiswas@nvidia.com>
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Disable the always-on flag of modem regulator so the regulator is possilbe
to be powered off.
bug 966960
Change-Id: Ibe88e6a5554c7fde27b9142b35d26d252aa40334
Signed-off-by: Hunk Lin <hulin@nvidia.com>
Reviewed-on: http://git-master/r/99494
Reviewed-by: Sheshagiri Shenoy <sshenoy@nvidia.com>
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>
GVS: Gerrit_Virtual_Submit
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Add a trace event for powergating. The existing power_domain_target is used.
state 0 is used for off and state 1 is used for on. This patch only traces
non CPU domains. The powerstate of CPU domains is already traced using
power_start events.
bug 976845
Change-Id: Ic9503f7b42b35c0bf70c7b64a7f15c4960637200
Signed-off-by: Peter De Schrijver <pdeschrijver@nvidia.com>
Reviewed-on: http://git-master/r/99416
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Antti Miettinen <amiettinen@nvidia.com>
Reviewed-by: Matthew Longnecker <mlongnecker@nvidia.com>
Reviewed-by: Diwakar Tundlam <dtundlam@nvidia.com>
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condition to check bit-format is always false
because TEGRA20_I2S_CTRL_BIT_FORMAT_I2S is zero.
Bug 947429
Change-Id: Ieb92f0732b092100dc1bf323ad60aff4439d5b3d
Signed-off-by: Jubeom Kim <jubeomk@nvidia.com>
Reviewed-on: http://git-master/r/99341
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Scott Peterson <speterson@nvidia.com>
Reviewed-by: Stephen Warren <swarren@nvidia.com>
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This reverts commit 90b79e5712300baab889772a5af348559ac95836.
Bug 955393
Change-Id: I0e2a15b7d0898dbbb62f09d8bd3502ec93366664
Signed-off-by: Kevin Huang <kevinh@nvidia.com>
Reviewed-on: http://git-master/r/99261
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Jon Mayo <jmayo@nvidia.com>
Reviewed-by: Nirav Patel <nipatel@nvidia.com>
Reviewed-by: Adam Cheney <acheney@nvidia.com>
Tested-by: Adam Cheney <acheney@nvidia.com>
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Added support for enable/disable rails from user space.
bug 966960
Change-Id: Iae660699c60f537296f90508a78bd40959c46535
Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
Reviewed-on: http://git-master/r/99186
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Hunk Lin <hulin@nvidia.com>
Tested-by: Hunk Lin <hulin@nvidia.com>
GVS: Gerrit_Virtual_Submit
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Modified existing pcm driver to take dma mode/ hw structure.
Exported the functions needed for other pcm mode driver.
Added new TDM mode hw param structure.
Added pass SINGLE/DOUBLE buffered dma mode params.
Bug 948478
Change-Id: I58309d52748f813b3303a8d6a052fbb6cc7ca87a
Signed-off-by: Nitin Pai <npai@nvidia.com>
Reviewed-on: http://git-master/r/99146
Reviewed-by: Simone Willett <swillett@nvidia.com>
Tested-by: Simone Willett <swillett@nvidia.com>
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Change-Id: Ib16ea10bf1acc2c7171935429635502aee80f3f4
Signed-off-by: Rahul Mittal <rmittal@nvidia.com>
Reviewed-on: http://git-master/r/99072
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Nikesh Oswal <noswal@nvidia.com>
Reviewed-by: Mayuresh Kulkarni <mkulkarni@nvidia.com>
Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>
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Update correct status to fuel-gauge driver
when charger cable is disconnected.
Bug 960318
Change-Id: I4c3ad2030ada7c06825e80a3eb4697b669fe7cb6
Signed-off-by: Syed Rafiuddin <srafiuddin@nvidia.com>
Reviewed-on: http://git-master/r/98719
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>
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If sd power rail is not configured to FORCED_PWM_MODE or
FSRADE_DISABLE, clear corresponding bits(FPWM and FSRADE)
when initialization.
Change-Id: I4e08329a430c6ccf7179b77cc7a283460ffaedd1
Signed-off-by: Jinyoung Park <jinyoungp@nvidia.com>
Reviewed-on: http://git-master/r/98715
Reviewed-by: Simone Willett <swillett@nvidia.com>
Tested-by: Simone Willett <swillett@nvidia.com>
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Configure i2c client structure in update charger structure
only when the charger driver is in use.
If charger driver is not used return -ENODEV
Change-Id: Ib1bc99145ee75bea819f69157920f9096e5d40ba
Signed-off-by: Syed Rafiuddin <srafiuddin@nvidia.com>
Reviewed-on: http://git-master/r/98712
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>
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Vcell is calculated based on upper 12msb's of ADC result.
Signed-off-by: Syed Rafiuddin <srafiuddin@nvidia.com>
Reviewed-on: http://git-master/r/95830
(cherry picked from commit e550636d9b03207b9d4fecf078168175964d85fd)
Change-Id: Ic2834d8c8576b938e9d7d400c2beeb459ddeb5fc
Reviewed-on: http://git-master/r/98669
Reviewed-by: Syed Rafiuddin <srafiuddin@nvidia.com>
Tested-by: Syed Rafiuddin <srafiuddin@nvidia.com>
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>
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setting max 2d clock can make noticeable performance difference
in 2d limited usecase such as buffer clearing
Change-Id: I40ef999e7eeebff45b657f00293608561cae831d
Signed-off-by: Donghan Ryu <dryu@nvidia.com>
Reviewed-on: http://git-master/r/98644
Reviewed-by: Simone Willett <swillett@nvidia.com>
Tested-by: Simone Willett <swillett@nvidia.com>
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- Abort initialization if an I2C error to avoid excessive load on the I2C bus
since it is heavily used during initialization.
- Updated to the latest NVC framework.
- Added feature that allows for the key focus points to be set at runtime
and the relative positions recalculated.
Bug 929133
Bug 938934
Change-Id: Ida4ab885bf35057ae6df131e3ec3587a891a7dc9
Signed-off-by: Erik Lilliebjerg <elilliebjerg@nvidia.com>
Reviewed-on: http://git-master/r/93944
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>
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Enabling the sh532u driver feature to not register itself
if it does not identify the sh532u device during probe.
This is for the case where the platform does not populate
the device.
Bug 929133
Change-Id: Ic5ac7fa0ae4c05e4978fe7aebc3fc630ef1c2fd3
Signed-off-by: Erik Lilliebjerg <elilliebjerg@nvidia.com>
Reviewed-on: http://git-master/r/92340
Reviewed-by: Simone Willett <swillett@nvidia.com>
Tested-by: Simone Willett <swillett@nvidia.com>
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Properly configure USB_PHY_CLK_VALID_INT_ENB.
Bug 926787
Change-Id: I9c70ce4e35e5c3b841c6240cbb4ce1c9b9f2a8ff
Signed-off-by: ahcheng <ahcheng@nvidia.com>
Reviewed-on: http://git-master/r/84800
(cherry picked from commit 2eba70e75f6baa9e76bea309927b9841dd32bb9e)
Reviewed-on: http://git-master/r/98798
Reviewed-by: Simone Willett <swillett@nvidia.com>
Tested-by: Simone Willett <swillett@nvidia.com>
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If bootloader specify that marvell wifi chip is
present on the board, then create marvell wifi device,
else create broadcom wifi device.
Bug 954218
Change-Id: Ia0515e70b6d4b239a165b8d8629e3b90c19666b6
Signed-off-by: Nitin Bindal <nbindal@nvidia.com>
Reviewed-on: http://git-master/r/98490
Reviewed-by: Simone Willett <swillett@nvidia.com>
Tested-by: Simone Willett <swillett@nvidia.com>
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