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2012-04-15regmap: Allow drivers to sync only part of the register cacheMark Brown
Provide a regcache_sync_region() operation which allows drivers to write only part of the cache back to the hardware. This is intended for use in cases like power domains or DSP memories where part of the device register map may be reset without fully resetting the device. Fully supporting these devices is likely to require additional work to make specific regions of the register map cache only while they are in reset, but this is enough for most devices. Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com> (cherry picked from commit 4d4cfd1656b5f6c88eae51c40741a695b108b006) Change-Id: Ia8cccf7986611485ae090e234bb68084671d7641 Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com> Reviewed-on: http://git-master/r/96490 Reviewed-by: Simone Willett <swillett@nvidia.com> Tested-by: Simone Willett <swillett@nvidia.com>
2012-04-15regmap: Supply ranges to the sync operationsMark Brown
In order to allow us to support partial sync operations add minimum and maximum register arguments to the sync operation and update the rbtree and lzo caches to use this new information. The LZO implementation is obviously not good, we could exit the iteration earlier, but there may be room for more wide reaching optimisation there. Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com> (cherry picked from commit ac8d91c801905a061ca883dca427a5e19602a1e7) Change-Id: I92ceee1c704ea7c864bff0559d36cf34554c3ba5 Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com> Reviewed-on: http://git-master/r/96489 Reviewed-by: Simone Willett <swillett@nvidia.com> Tested-by: Simone Willett <swillett@nvidia.com>
2012-04-15regmap: Add tracepoints for cache only and cache bypassMark Brown
Useful for figuring out where the hardware interaction went or came from. Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com> (cherry picked from commit 5d5b7d4f80ed6e861c1c220fd57e3dad0912526e) Change-Id: Ie7c0659458a3a4a2f100d86db552c606d9da0e6b Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com> Reviewed-on: http://git-master/r/96488 Reviewed-by: Simone Willett <swillett@nvidia.com> Tested-by: Simone Willett <swillett@nvidia.com>
2012-04-15regmap: Mark the cache as clean after a successful syncMark Brown
Previously the cache would never be marked clean, meaning syncs would never be suppressed which isn't the end of the world but could be inefficient. Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com> (cherry picked from commit 6ff7373809a9b4eb644d83e2e299da297e1cbffa) Change-Id: I52aef73bc6bc0df10dd64da92d0bf591e44ddc0e Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com> Reviewed-on: http://git-master/r/96487 Reviewed-by: Automatic_Commit_Validation_User
2012-04-15regmap: Remove default cache sync implementationMark Brown
It's not used as all cache types have sync operations so it's just dead code which never gets tested. Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com> (cherry picked from commit c3ec23288a92e20e0aff84a4cb6fbc7cc9bcf567) Change-Id: I3ba8c8afee9a7c945dc0a52e87c9f4a357e79308 Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com> Reviewed-on: http://git-master/r/96486 Reviewed-by: Simone Willett <swillett@nvidia.com> Tested-by: Simone Willett <swillett@nvidia.com>
2012-04-15regmap: Skip hardware defaults for LZO cachesMark Brown
Saves some I/O when resyncing; we assume that syncs start from the device reset state. Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com> (cherry picked from commit a3c3774176838bbfa4f6e48133644903818e56dc) Change-Id: Ib4471bd06856ccd2652f21dd0d9d51319df00939 Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com> Reviewed-on: http://git-master/r/96485 Reviewed-by: Automatic_Commit_Validation_User
2012-04-15regmap: Expose the driver name in debugfsDimitris Papastamos
Add a file called 'name' containing the name of the driver. Signed-off-by: Dimitris Papastamos <dp@opensource.wolfsonmicro.com> Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com> (cherry picked from commit f0c2319f9f196726ebe4d7508fd8fbd804988db3) Change-Id: Id67e73cfd573a71377fe6bbc5c3068718822ef38 Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com> Reviewed-on: http://git-master/r/96484 Reviewed-by: Automatic_Commit_Validation_User
2012-04-15regmap: Add support for writing to regmap registers via debugfsDimitris Papastamos
To enable writing to the regmap debugfs registers file users will need to modify the source directly and #define REGMAP_ALLOW_WRITE_DEBUGFS. The reason for this is that it is dangerous to expose this functionality in general where clients could potentially be PMICs. [A couple of minor style updates -- broonie] Signed-off-by: Dimitris Papastamos <dp@opensource.wolfsonmicro.com> Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com> (cherry picked from commit 09c6ecd394105c4864a0e409e181c9b1578c2a63) Change-Id: Ia9408880e25d5060796ab79812a023def00b10bc Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com> Reviewed-on: http://git-master/r/96483 Reviewed-by: Automatic_Commit_Validation_User
2012-04-15regmap: Support raw reads from cached registersMark Brown
Fall back to a register by register read to do so; most likely we'll be cache only so the overhead will be low. Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com> (cherry picked from commit b8fb5ab156055b745254609f4635fcfd6b7dabc8) Change-Id: I9f3b6011f4704987c5a014de8b30a2e6e3196d21 Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com> Reviewed-on: http://git-master/r/96482 Reviewed-by: Simone Willett <swillett@nvidia.com> Tested-by: Simone Willett <swillett@nvidia.com>
2012-04-15regmap: Allow users to query the size of register valuesMark Brown
Generic infrastructure based on top of regmap may want to operate on blocks of data and therefore find it useful to find the size of the register values. Provide an accessor operation for this. Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com> Cherry-pick from mainline a6539c3 Change-Id: I455ace158eea38f6a92938f6330ec074bc18f0da Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com> Reviewed-on: http://git-master/r/96481 Reviewed-by: Automatic_Commit_Validation_User
2012-04-15regmap: Implement support for 32 bit registers and valuesMark Brown
Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com> (cherry picked from commit 7d5e525b9ceda0e3b85da0acdaa2de19fea51edc) Change-Id: I6f6fec44b439b4916eba7f32ece1fa011e3ac021 Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com> Reviewed-on: http://git-master/r/96480 Reviewed-by: Simone Willett <swillett@nvidia.com> Tested-by: Simone Willett <swillett@nvidia.com>
2012-04-13arch: arm: configs: Disable Custom RegulatoryNitin Bindal
By default BCMDHD_CUSTOM_REGULATORY_DOMAIN is enabled. Custom Regulatory domain(CRD) set by bcmdhd driver does not enable 5GHz band scan. If we disable this config variable, then CRD of driver will not be used and Kernel will use default CRD which supports both 2.4 GHz and 5 GHz scan. So, disable this config variable. Bug 947472 Change-Id: I051db89cba38e2bb07eb716eec2e74611ad89f06 Signed-off-by: Nitin Bindal <nbindal@nvidia.com> Reviewed-on: http://git-master/r/95850 Reviewed-by: Simone Willett <swillett@nvidia.com> Tested-by: Simone Willett <swillett@nvidia.com>
2012-04-13drivers: hwmon: tsensor: Enable tsensor hw resetJoshua Primero
Enabled hw reset in tsensor if temperature exceeds given temperature limit. bug 966994 Change-Id: I2444c97c97c45b2d190a224388876d592d983c7f Signed-off-by: Joshua Primero <jprimero@nvidia.com> Reviewed-on: http://git-master/r/93030 Reviewed-by: Diwakar Tundlam <dtundlam@nvidia.com> Reviewed-by: Automatic_Commit_Validation_User
2012-04-13arm: tegra3: defconfig: Enable function tracerPrashant Gaikwad
Bug 953102 Change-Id: I4ef0a32c10df7be63ca5f048eceecd222fa8a8ab Signed-off-by: Prashant Gaikwad <pgaikwad@nvidia.com> Reviewed-on: http://git-master/r/89721 Reviewed-by: Simone Willett <swillett@nvidia.com> Tested-by: Simone Willett <swillett@nvidia.com>
2012-04-13drivers: net: bcmdhd: enable CRD through kernel configNitin Bindal
Enable Custom Regulatory Domain(CRD) support, only if BCMDHD_CUSTOM_REGULATORY_DOMAIN kernel config is set. By default BCMDHD_CUSTOM_REGULATORY_DOMAIN is enabled. Bug 947472 Change-Id: I40ea3c3c531d4e309c0928db396b9cc832be43cc Signed-off-by: Nitin Bindal <nbindal@nvidia.com> Reviewed-on: http://git-master/r/88266 Reviewed-by: Rakesh Kumar <krakesh@nvidia.com> Reviewed-by: Automatic_Commit_Validation_User Reviewed-by: Narayan Reddy <narayanr@nvidia.com> Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>
2012-04-12ARM: tegra: fuse: Use module_param_cbJuha Tukkinen
Use module_param_cb instead of obsolete module_param_call. Change-Id: I25a86cfa0782e373b82eb58f92058ff6a38fdcba Signed-off-by: Juha Tukkinen <jtukkinen@nvidia.com> Reviewed-on: http://git-master/r/95646 Reviewed-by: Automatic_Commit_Validation_User Reviewed-by: Peter De Schrijver <pdeschrijver@nvidia.com> Reviewed-by: Gerrit_Virtual_Submit Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com> Reviewed-by: Varun Wadekar <vwadekar@nvidia.com>
2012-04-12video: tegra: nvavp: Remove T30 A01 workaroundJuha Tukkinen
Remove CONFIG_TEGRA_SMMU_BASE_AT_E0000000 workaround as T30 A01 is no longer supported. Change-Id: Ic47d0aa16c555bd7821416fff29d723924c6118b Signed-off-by: Juha Tukkinen <jtukkinen@nvidia.com> Reviewed-on: http://git-master/r/95645 Reviewed-by: Automatic_Commit_Validation_User Reviewed-by: Peter De Schrijver <pdeschrijver@nvidia.com> Reviewed-by: Gerrit_Virtual_Submit Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com> Reviewed-by: Varun Wadekar <vwadekar@nvidia.com>
2012-04-12ARM: tegra: common: Remove T30 A01 SMMU workaroundJuha Tukkinen
Remove CONFIG_TEGRA_SMMU_BASE_AT_E0000000 workaround as T30 A01 is no longer supported. Change-Id: I0ba6c838984e3c3ec401057925727c9596a8075f Signed-off-by: Juha Tukkinen <jtukkinen@nvidia.com> Reviewed-on: http://git-master/r/95644 Reviewed-by: Rohan Somvanshi <rsomvanshi@nvidia.com> Tested-by: Rohan Somvanshi <rsomvanshi@nvidia.com>
2012-04-12arch: ARM: Tegra: removing the akm8975 driverRamalingam C
Undefining the config variable CONFIG_SENSORS_AK8975, since we are using drivers/misc/inv_mpu/compass/ak8975.c as compass driver. Bug 965154 Change-Id: Ie6ca5b08cee9dba5375457f39d52ae9ebf97ddf9 Signed-off-by: Ramalingam C <ramalingamc@nvidia.com> Reviewed-on: http://git-master/r/95636 Reviewed-by: Rohan Somvanshi <rsomvanshi@nvidia.com> Tested-by: Rohan Somvanshi <rsomvanshi@nvidia.com>
2012-04-12ARM: tegra: clock: Update common clock tableAlex Frid
- Moved table entries for always running core clocks on the top of the table (this way we guarantee that changing parent of such clock down the road would automatically enable new parent). - Removed unnecessary pll_a and pll_a_out0 entries (effectively they are "NOP") - actual audio configuration is done in per-board tables. - Removed unnecessary pll_c and pll_c_out1 entries for emulation platforms Change-Id: I8327d6313804419405dd93af08f369db02fcbf25 Signed-off-by: Alex Frid <afrid@nvidia.com> Reviewed-on: http://git-master/r/95465 Reviewed-by: Automatic_Commit_Validation_User Reviewed-by: Prashant Gaikwad <pgaikwad@nvidia.com> Reviewed-by: Wen Yi <wyi@nvidia.com> Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>
2012-04-12arm: tegra: enterprise: Firmware update support for pn544Mohan T
Enable firmware GPIO for board E1205 with fab A03 or A04. Bug 959290 Change-Id: Ide17c4e6dcda8c2c9690f581b8714486a3c4e532 Signed-off-by: Mohan T <mohant@nvidia.com> Reviewed-on: http://git-master/r/95389 Reviewed-by: Rohan Somvanshi <rsomvanshi@nvidia.com> Tested-by: Rohan Somvanshi <rsomvanshi@nvidia.com>
2012-04-12ARM: tegra: power: Cancel hotplug work upon disableAntti P Miettinen
Cancel hotplug work when auto hotplug gets disabled to prevent e.g. cpu_up() getting called in LP cluster. Bug 965777 Change-Id: I058fe6a5e0c2fd3203ce9bc951d0973b60e033e0 Signed-off-by: Antti P Miettinen <amiettinen@nvidia.com> Reviewed-on: http://git-master/r/95076 Reviewed-by: Automatic_Commit_Validation_User Reviewed-by: Aleksandr Frid <afrid@nvidia.com> Reviewed-by: Juha Tukkinen <jtukkinen@nvidia.com>
2012-04-12tracing: Add tracepoints for cluster switchAntti P Miettinen
Simple trace points for measuring cluster switch latencies. Bug 958262 Change-Id: Ia1e5e13131d5e55aaa0a44e9e8b5196539df54e7 Signed-off-by: Antti P Miettinen <amiettinen@nvidia.com> Reviewed-on: http://git-master/r/93841 Reviewed-by: Automatic_Commit_Validation_User Reviewed-by: Juha Tukkinen <jtukkinen@nvidia.com>
2012-04-12arm: tegra: xmm: CP wakeup and system suspendSeshendra Gadagottu
To handle race condition between CP wakeup and system suspend following policy enforced: 1. If system suspend happens first, then buffer the CP wake request and will abort the suspend at the end of device suspend complete. 2. If CP wakeup happens first, then system suspend starts then abort the system suspend immediately. Bug 938553 Bug 948198 Bug 943035 Signed-off-by: Seshendra Gadagottu<sgadagottu@nvidia.com> Reviewed-on: http://git-master/r/83130 (cherry picked from commit b2bd06368d3f6e16e5a7dd81c76dda0293de301b) Change-Id: Ic7024aa739472a666f1274ccd7c9722259d54fa5 Reviewed-on: http://git-master/r/93384 Reviewed-by: Automatic_Commit_Validation_User Reviewed-by: Seshendra Gadagottu <sgadagottu@nvidia.com> Reviewed-by: Vinayak Pane <vpane@nvidia.com> Tested-by: Vinayak Pane <vpane@nvidia.com> Reviewed-by: Steve Lin <stlin@nvidia.com>
2012-04-12tracing: Add tracepoints for CPU scalingAntti P Miettinen
Simple tracepoints for measuring CPU scaling latencies. Bug 960307 Change-Id: I6fd4e67e352a2ff134da58866d943457506d080b Signed-off-by: Antti P Miettinen <amiettinen@nvidia.com> Reviewed-on: http://git-master/r/93080 Reviewed-by: Automatic_Commit_Validation_User Reviewed-by: Juha Tukkinen <jtukkinen@nvidia.com>
2012-04-12tracing: Add tracepoints for hotplugAntti P Miettinen
Simple trace points for measuring hotplug up/down times. Bug 960310 Change-Id: I1927aae6edb74cba7ca3e9522d138407b48325dc Signed-off-by: Antti P Miettinen <amiettinen@nvidia.com> Reviewed-on: http://git-master/r/92920 Reviewed-by: Automatic_Commit_Validation_User Reviewed-by: Satya Popuri <spopuri@nvidia.com> Reviewed-by: Diwakar Tundlam <dtundlam@nvidia.com> Reviewed-by: Juha Tukkinen <jtukkinen@nvidia.com>
2012-04-12usb: host: tegra: regrouping ehci functionsVenu Byravarasu
Re-arranged standard and modified ehci functions into two separate groups, for more readability Change-Id: I320a50ed44c3f0990692ae38b55dc6a04fe7c378 Signed-off-by: Venu Byravarasu <vbyravarasu@nvidia.com> Reviewed-on: http://git-master/r/92823 Reviewed-by: Rohan Somvanshi <rsomvanshi@nvidia.com> Tested-by: Rohan Somvanshi <rsomvanshi@nvidia.com>
2012-04-12usb: cdc_ether: Add new product id for the 5AE profileJonathan Roux
Bug 924863 Change-Id: I10d3036ce19f8c1f37e57998c204f3a72bd42f85 Signed-off-by: Steve Lin <stlin@nvidia.com> Reviewed-on: http://git-master/r/89718 Reviewed-by: Automatic_Commit_Validation_User
2012-04-12misc: tegra-cryptodev: Enhancement to support user space testsvjagadish
Enchancement to support user space tests such as OFB, CTR, sha1, sha224,sha256, sha384, sha512. BUG 903375 Change-Id: I52767978bd3758671ec6fff988223ac046f5579c Reviewed-on: http://git-master/r/84296 Tested-by: Venkata Jagadish <vjagadish@nvidia.com> Reviewed-by: Mallikarjun Kasoju <mkasoju@nvidia.com> Reviewed-by: Venkat Moganty <vmoganty@nvidia.com>
2012-04-11video: tegra: fb: Add interface to nvdps.Kevin Huang
Provide /sys/class/graphics/fb0/device/nvdps to change video mode on-the-fly without resetting window layout like fb_set_var(). This allows flicker free changes in refresh rate. nvdps sysfs file takes an integer, and selects the closest matching mode with the same or higher refresh rate. Reading the file displays the current refresh rate. Bug 560152 Change-Id: Id5c1eafaf338b99fa9742202b38ccbfc238b77d5 Signed-off-by: Kevin Huang <kevinh@nvidia.com> Reviewed-on: http://git-master/r/95473 Reviewed-by: Automatic_Commit_Validation_User Reviewed-by: Jon Mayo <jmayo@nvidia.com>
2012-04-11ARM: tegra: cardhu: add multiple LCD modesJon Mayo
Add 50Hz and 48Hz refresh modes on internal panel. Choose pll_d as default for internal panel. Choose pll_d2 as default for HDMI output. Print a warning when touch panel work around code is being used. Bug 560152 Change-Id: Ia155e02b4fdc4ea3a749c3f1e9edea94786441ba Signed-off-by: Jon Mayo <jmayo@nvidia.com> Reviewed-on: http://git-master/r/94890 Reviewed-by: Automatic_Commit_Validation_User
2012-04-11video: tegra: dc: load video mode during vblankJon Mayo
Handle mode set for FBIOPUT_VSCREENINFO at the end of a frame (during vblank). This elimiates the work around that requires disabling then enabling display to change modes. Adds a spinlock to protect irq code from updates to tegra_dc_mode structure. Bug 560152 Change-Id: I5d2175f01a177a32d685b46e5af4f78efeec0786 Signed-off-by: Jon Mayo <jmayo@nvidia.com> Reviewed-on: http://git-master/r/90688 Reviewed-by: Simone Willett <swillett@nvidia.com> Tested-by: Simone Willett <swillett@nvidia.com>
2012-04-10video: tegra: resolve compilation time warningsSanjay Singh Rawat
bug 949219 Change-Id: I1ed8d08de4bdba4643b2ae4e8320db6f9c97a18f Signed-off-by: Sanjay Singh Rawat <srawat@nvidia.com> Reviewed-on: http://git-master/r/92310 Reviewed-by: Automatic_Commit_Validation_User Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>
2012-04-10arm: tegra20: pm: Reduce CPU min voltage to 0.8VPrashant Gaikwad
Bug 955718 Reviewed-on: http://git-master/r/94164 (cherry picked from commit 1be4c3a94dd95a9c0fae2317983b0d7e44e39a1f) Reviewed-on: http://git-master/r/94407 (cherry picked from commit 00799dbe21f5835b729f2fe9fcf95f30aa0b149f) Change-Id: I909a15ead2d4ecb3dc416b8d3863fa8cb3645501 Signed-off-by: Prashant Gaikwad <pgaikwad@nvidia.com> Reviewed-on: http://git-master/r/94164 Reviewed-by: Automatic_Commit_Validation_User Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com> Tested-by: Bharat Nihalani <bnihalani@nvidia.com>
2012-04-10ARM: tegra: cardhu: integrate latest mem tablesRay Poudrier
Bug 918704 Change-Id: I83bdce136df07d744c69a75a38bb5ae1d541055e Signed-off-by: Ray Poudrier <rapoudrier@nvidia.com> Reviewed-on: http://git-master/r/91935 Reviewed-by: Simone Willett <swillett@nvidia.com> Tested-by: Simone Willett <swillett@nvidia.com>
2012-04-10arm: tegra: dvfs: optimized bin0 entriesPrashant Gaikwad
Updated optimized bin0 entries for AP25 CPU dvfs. Bug 955718 Bug 643434 Reviewed-on: http://git-master/r/57303 (cherry picked from commit 6e5c759fcdfcdf4d1306fe5c9e33bf2dd5458076) Reviewed-on: http://git-master/r/94406 (cherry picked from commit 61317b2ed1a259d5c0460aec8bc1d9f4e2275922) Change-Id: I84cccfde1c0fa292c64a9acd2c96643416f00735 Signed-off-by: Bharat Nihalani <bnihalani@nvidia.com> Reviewed-on: http://git-master/r/90306 Reviewed-by: Automatic_Commit_Validation_User
2012-04-10power: max17048: correct i2c error handlingChandler Zhang
Correct max17048_read_word() function related i2c error handling Signed-off-by: Chandler Zhang <chazhang@nvidia.com> Reviewed-on: http://git-master/r/93702 (cherry picked from commit ba8bdc020c6e2ed57255786b3d61b870b0b5a516) Change-Id: Ice9845bb39288442bd6637eedeaf6de6ad1acbda Reviewed-on: http://git-master/r/95346 Reviewed-by: Automatic_Commit_Validation_User Reviewed-by: Chandler Zhang <chazhang@nvidia.com> Tested-by: Chandler Zhang <chazhang@nvidia.com> Reviewed-by: Syed Rafiuddin <srafiuddin@nvidia.com> Tested-by: Syed Rafiuddin <srafiuddin@nvidia.com> Reviewed-by: Sachin Nikam <snikam@nvidia.com>
2012-04-10power: max17048: addition of new propertiesSyed Rafiuddin
Addition of health and capacity level properties Signed-off-by: Syed Rafiuddin <srafiuddin@nvidia.com> Reviewed-on: http://git-master/r/93532 (cherry picked from commit 9892e1c30828bdcbf6ae53af72bb1a39cd19993e) Change-Id: I28e9822772316ba7389a3c9518cf4778606dbfb7 Reviewed-on: http://git-master/r/95345 Reviewed-by: Automatic_Commit_Validation_User Reviewed-by: Chandler Zhang <chazhang@nvidia.com> Tested-by: Chandler Zhang <chazhang@nvidia.com> Reviewed-by: Syed Rafiuddin <srafiuddin@nvidia.com> Tested-by: Syed Rafiuddin <srafiuddin@nvidia.com> Reviewed-by: Sachin Nikam <snikam@nvidia.com>
2012-04-10arm: tegra: whistler: use common platform data structRavindra Lokhande
Change-Id: I46e81bf2ad285433e61c3a1bc7f5e1c9aca655fa Signed-off-by: Ravindra Lokhande <rlokhande@nvidia.com> Reviewed-on: http://git-master/r/95102 Reviewed-by: Simone Willett <swillett@nvidia.com> Tested-by: Simone Willett <swillett@nvidia.com>
2012-04-10asoc: wm8753 machine: use common platform dataRavindra Lokhande
use common platform data for machine driver Change-Id: I90e0d2f47aed46da650305d98f6525287adfaf04 Signed-off-by: Ravindra Lokhande <rlokhande@nvidia.com> Reviewed-on: http://git-master/r/95101 Reviewed-by: Automatic_Commit_Validation_User Reviewed-by: Scott Peterson <speterson@nvidia.com>
2012-04-10video: tegra: dtv: Remove check for dma req list before cancellingLaxman Dewangan
Removing the checking whether dma req queue is empty or not before canceling/stopping dma. This function cannot guarantee correct result as there may be the race between hw and sw status update. If client wants to cancel dma req, it can directly call tegra_dma_cancel(). As the function tegra_dma_is_empty() does not return correct result, it will be depreciated from the dma apis. Change-Id: I3f5ebee8a7be345b02fcd8a69530c9b53207ef28 Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com> Reviewed-on: http://git-master/r/95090 Reviewed-by: Automatic_Commit_Validation_User Reviewed-by: Bitan Biswas <bbiswas@nvidia.com>
2012-04-10config: tegra[3]: enable devtmpfsMursalin Akon
Enable devtmpfs to allow init of Ubuntu 12.04/Debian Sid/Fedora 17 to continue booting successfully. Bug 948495 Change-Id: Ia43f79cae31964c8a6bb76d1a936fd70e6038b53 Signed-off-by: Mursalin Akon <makon@nvidia.com> Reviewed-on: http://git-master/r/94556 Reviewed-by: Simone Willett <swillett@nvidia.com> Tested-by: Simone Willett <swillett@nvidia.com>
2012-04-10regulator: max8907: Add driver specific data for regulatorAlok Chauhan
Adding the regulator driver specific information and passing this information through regulator driver data. This struture is containing delay operation which is require to voltage to be settle down after enabling rail. Bug 939242 Change-Id: I7da6ec487fe5f04857d3fd5f06a383b4a8fbcc7b Signed-off-by: Alok Chauhan <alokc@nvidia.com> Reviewed-on: http://git-master/r/94500 Reviewed-by: Automatic_Commit_Validation_User Reviewed-by: Venkat Moganty <vmoganty@nvidia.com> Reviewed-by: Laxman Dewangan <ldewangan@nvidia.com>
2012-04-10arm: tegra: Add delay support in regulatorAlok Chauhan
bug 939242 Change-Id: I552c664fbac5519cc97593ebec3884f716158887 Signed-off-by: Alok Chauhan <alokc@nvidia.com> Reviewed-on: http://git-master/r/94499 Reviewed-by: Automatic_Commit_Validation_User Reviewed-by: Venkat Moganty <vmoganty@nvidia.com> Reviewed-by: Laxman Dewangan <ldewangan@nvidia.com>
2012-04-10video: tegra: host: move resources to devicesMayuresh Kulkarni
- as of now the resources needed by all the host1x modules are part of resource list of host1x device - now that each module is a nvhost_device of its own, so it should hold the resources it needs instead of host1x device holding it for them - each device that needs its resources gets it in its _probe() using a helper API in bus_client.c Bug 871237 Change-Id: Ia7c63fcf40cbc5db76d4d8339294a0e9ce75e352 Signed-off-by: Mayuresh Kulkarni <mkulkarni@nvidia.com> Reviewed-on: http://git-master/r/94166 Reviewed-by: Simone Willett <swillett@nvidia.com> Tested-by: Simone Willett <swillett@nvidia.com>
2012-04-10nvavp: Add ioctl for wake_avpMandar Potdar
Add wake_avp ioctl which provides way for user-mode driver to simply wake-up the AVP. bug 914504 Change-Id: I3075ba944d39749559f2c340a4851902821c344f Signed-off-by: Mandar Potdar <mpotdar@nvidia.com> Reviewed-on: http://git-master/r/93877 Reviewed-by: Automatic_Commit_Validation_User Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com> Reviewed-by: Gajanan Bhat <gbhat@nvidia.com> Reviewed-by: Mayuresh Kulkarni <mkulkarni@nvidia.com> Reviewed-by: Varun Wadekar <vwadekar@nvidia.com>
2012-04-10arm: tegra: p1852: Use GMI to untristate gpio X5/6Amlan Kundu
Using SPI1/SPI2 as initial pinmux for gpio X5/6 affecting spi controller. GMI A26/27 can be pinmuxed for SPI1_CS0 and SPI1_SCK balls. It will not affect GMI behavior because A26/27 presently not used on p1852. bug 927551 bug 875873 Reviewed-on: http://git-master/r/90551 (cherry-picked from 8b0123f835a671072b23abbe4fdb9d9aa16463cb) Change-Id: If39c93daa7d1b73777b56c729b0c9b9149770440 Signed-off-by: Amlan Kundu <akundu@nvidia.com> Reviewed-on: http://git-master/r/92499 Reviewed-by: Automatic_Commit_Validation_User Reviewed-by: Laxman Dewangan <ldewangan@nvidia.com> Reviewed-by: Gerrit_Virtual_Submit
2012-04-10arm: tegra: Change DDC freq to 10KHzHao Tang
Bug 949759 Reduce DDC freq. The original freq is 100KHz, but some edid communication at this rate on some monitors like acer H243HX may fail Change-Id: Ib087025a35ff085b4bf618b70100fe6670c3eaec Signed-off-by: Hao Tang <htang@nvidia.com> Reviewed-on: http://git-master/r/88261 Reviewed-by: Simone Willett <swillett@nvidia.com> Tested-by: Simone Willett <swillett@nvidia.com>
2012-04-08Revert "video: tegra: dc: Disable 1080p stereo support"Andrija Bosnjakovic
This reverts commit 75009bc2b1a0a2d2efbe1d166647e789b8a1b9f1. In order to work around bug 869099, this mode has been temporarily disabled. Since the bug is not so visible, enable again. Change-Id: Ie71dac4ecf620cd96796e2fde361b45dc7141497 Reviewed-on: http://git-master/r/92157 Reviewed-by: Alok Ahuja <alahuja@nvidia.com> Reviewed-by: Aleksandar Odorovic <aodorovic@nvidia.com> Reviewed-by: Dhiren Bhatia <dbhatia@nvidia.com> Reviewed-by: Andrija Bosnjakovic <abosnjakovic@nvidia.com> Tested-by: Andrija Bosnjakovic <abosnjakovic@nvidia.com> Reviewed-by: Jon Mayo <jmayo@nvidia.com>
2012-04-08asoc: aic326x machine: use common platform dataRavindra Lokhande
replace platform specific data with common platform data Change-Id: Ie34b9b9288bf76a004db0bcdf4fd59845e0c9d71 Signed-off-by: Ravindra Lokhande <rlokhande@nvidia.com> Reviewed-on: http://git-master/r/95083 Reviewed-by: Automatic_Commit_Validation_User Reviewed-by: Scott Peterson <speterson@nvidia.com>
generated by cgit v1.2.3 (git 2.0.4) at 2024-06-14 18:48:34 +0000